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C6726 code build broken when upgrade to CCS v3.3 release 12

Other Parts Discussed in Thread: OMAP-L137, SPRC203

I have been using CCS 3.3 (release version 3.3.82.2) for severals years now to compile and build code for a C6726B processor.

I wanted to investigate upgrading to a C6747 processor so I bought an OMAP-L137 kit and installed the software tools. My intention was to port the C6726 code to the OMAP-L137 kit, but ever since I installed tools that came with the kit I can no longer even run the code build for the C6726B processor!!! Fearing that the code generated with these tools would only run on the development kit, I uninstalled everything and started over. I found the following instructions on the wiki pages:

http://processors.wiki.ti.com/index.php/Getting_Started_Guide_for_C6747

I started with a new install of my original CCS 3.3 tools on my PC, and I could reproduce the same binary image and have it run on my C6726 processor. Already having a Platinum version of Code Composer Studio 3.3, I downloaded service release 12 of CCS 3.3 and installed it. I also downloaded and installed TI_CGT_C6000_6.1.9_setup.exe, bios_setupwin32_5_33_05.exe, and TI_CGT_C6000_6.1.9_setup.exe. I didn't expect the new tools to generate the same binary image for my C6726 processor, but I did have the simple expectation that the code would run. The code execution doesn't seem to make it to _c_int00 either with a XDS510 JTAG emulator or running the code using the software simulator for the C672x processor. (My C6726 code does not rely on the DSP/BIOS, and it simply uses an 8 KHz interrupt at the completion of a DMA transfer.)

I can't figure out what I am doing wrong. I need a version of Code Composer studio tools that will support my existing C6726 based product as well as any future migration to a C6747 processor.

Any help would be appreciated.

Joseph Zolyak

 

  • Joseph,

    We'll have to debug this in pieces.  The most significant thing that you said, to me, was "The code execution doesn't seem to make it to _c_int00 either with a XDS510 JTAG emulator or running the code using the software simulator for the C672x processor."  c_int00 is the code entry point when loading from the emulator (or simulator).  So,either a) the project is not telling the .out file that c_int00 is the entry point or b) the out file is putting c_int00 in some location where it's not supposed to be.  I would expect an error message from CCS in the b) case  So, the first thing that I woudl recommend you check is a) is the c runtime library getting linked (rts.lib)?  and b) does the project set the entry point to c_int00?

     

    Regards,

    Dan


     

  • I miss-spoke about the code execution not getting as far as _c_int00.  With the XDS510 USB JTAG debugger plugged in, I can see that the code execution makes it to main(), so at least the bootloader is working.  The code execution seems to be stuck inside the routine CSL_intcHookIsr.

    It has been over a year since I have needed to use the XDS510 to debugger, and I believe that I have to modify the way the production hardware boots up in order to use the debugger again. (There is a host processor that normally downloads the C6726 DSP code into SDRAM and kicks off the DSP chip. I'm going to have to disable this to ensure it isn't interferring with the XDS510 debugger controlling start up).

    The XDS510 debugger is obfuscating the real problem that I am running into, namely that C6726 DSP code compiled with CCS 3.3 (version 3.3.38.2. and Code Generation tools V6.0.8) produces a binary image that runs fine on the C6726, whereas after upgrading CCS 3.3 to version 3.3.83.19 and Code Generation tools V6.1.10 the DSP binary file does not run.

    My original posting lists all the software upgrades that I have performed thus far. I am wondering if there are any other pieces of the puzzle that I am missing?  For instance, there was a ROM patch that I needed to apply to get the original installation of CCS 3.3 (version 3.3.38.2) to work properly. Are there any other patches that must be made in conjunction with upgrading to Release 12 of CCS 3.3 (version 3.3.83.19)?

    Sincerely,

    Joseph Zolyak

  • If you're updating to the 6.1.x branch of tools you should update to the most recent version, 6.1.20:

    https://www-a.ti.com/downloads/sds_support/TICodegenerationTools/download.htm

    On the page above it's interesting to note that 6.1.10 is specifically not listed so I imagine there were some really serious issues with that release to get it pulled from the web!  In any case, 6.1.20 has fixed many, many bugs and you should move to that one first.  You might be encountering a bug that we already fixed years ago.

    Brad

  • I have updated the Code Generation tools to version 6.1.20 and that still did not resolve my problem.

    I also explored around the forums and found the link:

    http://www.ti.com/tool/sprc203#supportandcommunity

    I applied the System Patch from the zipped file, but that didn't help either. I am still stuck with my original problem of C6726 DSP code generated with CCS 3.3 (version 3.3.38.2) working fine, and after upgrading to Release 12 of CCS 3.3 (version 3.3.82.13) the new binary image does not run. The new binary image makes it past the bootloader step, but is getting hung up somewhere at the start of main( ) where I am configuring device peripherals and interrupts using the Chip Support Library functions. (My XDS510 USB JTAG debugger is not co-operating and I can't pin point the error to a specific routine).

    Joseph Zolyak

     

  • I think you'll really need to narrow this down to something specific in order for anyone to provide further guidance.  If you cannot get the emulator working properly then maybe you can try a different approach.  For example, if you can get a GPIO to toggle you could move that code around until you figure out exactly where it goes bad.

  • Joe,

    Here's a debug method I have used in the past that may help you out:

    Add the following code at the beginning of your main() and recompile to create new image:

    volatile int flag= 1;

    main()

    {

    while(flag);

    ....

    }

    Your host processor can now load the new image and boot up the 6747 device.

    You should now be able to connect the XDS510 emulator to the 6747 (do not use any GEL start up script file).

    After connection is made you should be able to see the 6747 halted in the spin loop. You can then set the flag variable to a zero.

    This will allow you to then step out of the loop and you can single step through the rest of the code or set breakpoints and run to them and debug as you would normally.

    Hopefully, this method will help you pinpoint exactly where the code is getting lost or hung up.

    Regards,

    Mark

     

  • Let me clarify the problem again. The C6726  binary image generated with CCS 3.3 (version 3.3.82.2, Code Gen tools 6.0.8), when it has been loaded into SDRAM by the host processor boots out of SDRAM and runs fine. The same code generated with CCS 3.3 (version 3.3.82.13, Code Gen tools 6.1.20) does not.

    When I plug in an XDS510 USB JTag debugger into my board, and then single step thru my code, the bootloader successfully completes and branches to main( ). I then start calling CSL functions to configure the DMAs, McASPs, etc. The puzzling aspect is that the DSP code gets stuck at the EXACT SAME point inside the CSL_intcHookIsr routine, looping between addresses 80050F50 and 80050F60, regardless of which set of tools generated the code. In the case shown below, the code execution has trampolined from internal RAM to external SDRAM where the CSL *.lib routines are linked/stored.  I have modified the linked code so that the CSL *.lib routines are linked/stored into internal RAM as well, however, the code execution gets stuck in a loop at the exact same 4 assembly instructions.

     

    80050C20          CSL_intcHookIsr:
    80050C20 04BC1059            MV.L1X        SP,A9
    80050C24 07FFAC52 ||         ADDK.S2       -168,SP
    80050C28 05250075            STW.D1T1      A10,*-A9[8]
    80050C2C 050026FE ||         STW.D2T2      B10,*+B15[38]
    80050C30 05A4E075            STW.D1T1      A11,*-A9[7]
    80050C34 058027FE ||         STW.D2T2      B11,*+B15[39]
    80050C38 0624C075            STW.D1T1      A12,*-A9[6]
    80050C3C 060028FE ||         STW.D2T2      B12,*+B15[40]
    80050C40 06A4A075            STW.D1T1      A13,*-A9[5]
    80050C44 068029FF ||         STW.D2T2      B13,*+B15[41]
    80050C48 068C005A ||         MV.L2         B3,B13
    80050C4C 07240275            STW.D1T1      A14,*+A9[0]
    80050C50 00000001 ||         NOP          
    80050C54 00000001 ||         NOP          
    80050C58 00000001 ||         NOP          
    80050C5C 00000000 ||         NOP          
    80050C60 019011A1            MV.S1X        B4,A3
    80050C64 0200480F ||         LDHU.D2T2     *+B14[72],B4
    80050C68 029008D9 ||         CMPGT.L1      0,A4,A5
    80050C6C 0280082B ||         MVK.S2        0x0010,B5
    80050C70 030000FA ||         ZERO.L2       B6
    80050C74 02942DD9            XOR.L1        1,A5,A5
    80050C78 030000A9 ||         MVK.S1        0x0001,A6
    80050C7C 033E82D6 ||         STH.D2T2      B6,*+SP[20]
    80050C80 0290B8FA            CMPGT.L2X     B5,A4,B5
    80050C84 033C62D4            STH.D2T1      A6,*+SP[3]
    80050C88 0094BF78            AND.L1X       A5,B5,A1
    80050C8C 00102F5A            AND.L2        1,B4,B0
    80050C90 208000A9     [ B0]  MVK.S1        0x0001,A1
    80050C94 20002E93 ||  [ B0]  B.S2          0x80050DF4 (PC+372 = 0x80050df4)
    80050C98 358000F9 ||  [!B0]  ZERO.L1       A11
    80050C9C 00000000 ||         NOP          
    80050CA0 90002A93     [!A1]  B.S2          0x80050DF4 (PC+340 = 0x80050df4)
    80050CA4 355ED028 ||  [!B0]  MVK.S1        0xffffbda0,A10
    80050CA8 36FFFFA9     [!B0]  MVK.S1        0xffffffff,A13
    80050CAC 3186702A ||  [!B0]  MVK.S2        0x0ce0,B3
    80050CB0 320D39A3     [!B0]  SHRU.S2X      A3,0x9,B4
    80050CB4 354002E8 ||  [!B0]  MVKH.S1       0x80050000,A10
    80050CB8 35900069     [!B0]  MVKH.S1       0x20000000,A11
    80050CBC 359006CA ||  [!B0]  CLR.S2        B4,0,6,B11
    80050CC0 36A00069     [!B0]  MVKH.S1       0x40000000,A13
    80050CC4 31C002EA ||  [!B0]  MVKH.S2       0x80050000,B3
    80050CC8 063F3D43            ADDAW.D2      SP,0x19,B12
    80050CCC 0510BCA3 ||         SHL.S2X       A4,0x5,B10
    80050CD0 023C9059 ||         ADD.L1X       4,SP,A4
    80050CD4 070E0908 ||         EXTU.S1       A3,16,9,A14
    80050CD8 00153C10            B.S1          CSL_intcGlobalDisable (PC+43488 = 0x8005b6a0)
    80050CDC 00008000            NOP           5
    80050CE0 00162010            B.S1          ASM$ (PC+45312 = 0x8005bde0)
    80050CE4 0186782A            MVK.S2        0x0cf0,B3
    80050CE8 01C002EA            MVKH.S2       0x80050000,B3
    80050CEC 00004000            NOP           3
    80050CF0 03280266            LDW.D1T2      *+A10[0],B6
    80050CF4 02282266            LDW.D1T2      *+A10[1],B4
    80050CF8 0328A265            LDW.D1T1      *+A10[5],A6
    80050CFC 00000000 ||         NOP          
    80050D00 06100059            MV.L1         A4,A12
    80050D04 0228E264 ||         LDW.D1T1      *+A10[7],A4
    80050D08 01A84264            LDW.D1T1      *+A10[2],A3
    80050D0C 03A88264            LDW.D1T1      *+A10[4],A7
    80050D10 05BF82F4            STW.D2T1      A11,*+SP[28]
    80050D14 02A86267            LDW.D1T2      *+A10[3],B5
    80050D18 06BFA2F5 ||         STW.D2T1      A13,*+SP[29]
    80050D1C 00000000 ||         NOP          
    80050D20 02A8C265            LDW.D1T1      *+A10[6],A5
    80050D24 033C42F6 ||         STW.D2T2      B6,*+SP[2]
    80050D28 0210F6CB            CLR.S2        B4,7,22,B4
    80050D2C 033CE2F4 ||         STW.D2T1      A6,*+SP[7]
    80050D30 00053811            B.S1          CSL_dmaxOpen (PC+10688 = 0x800536e0)
    80050D34 02389FFB ||         OR.L2X        B4,A14,B4
    80050D38 023D22F4 ||         STW.D2T1      A4,*+SP[9]
    80050D3C 023C62F6            STW.D2T2      B4,*+SP[3]
    80050D40 02BCA2F6            STW.D2T2      B5,*+SP[5]
    80050D44 018CF6C9            CLR.S1        A3,7,22,A3
    80050D48 0186C02B ||         MVK.S2        0x0d80,B3
    80050D4C 03BCC2F4 ||         STW.D2T1      A7,*+SP[6]
    80050D50 048D7FFB            OR.L2X        B11,A3,B9
    80050D54 02BD02F5 ||         STW.D2T1      A5,*+SP[8]
    80050D58 01C002EB ||         MVKH.S2       0x80050000,B3
    80050D5C 00000000 ||         NOP          
    80050D60 04BC82F7            STW.D2T2      B9,*+SP[4]
    80050D64 020000FB ||         ZERO.L2       B4
    80050D68 030000F9 ||         ZERO.L1       A6
    80050D6C 033CC1A3 ||         ADD.S2        6,SP,B6
    80050D70 023011A1 ||         MV.S1X        B12,A4
    80050D74 00000001 ||         NOP          
    80050D78 00000001 ||         NOP          
    80050D7C 00000000 ||         NOP          
    80050D80 023C62C7            LDH.D2T2      *+SP[3],B4
    80050D84 05C05029 ||         MVK.S1        0xffff80a0,A11
    80050D88 0187462B ||         MVK.S2        0x0e8c,B3
    80050D8C 03299079 ||         ADD.L1X       A12,B10,A6
    80050D90 048008C1 ||         ZERO.D1       A9
    80050D94 048000FB ||         ZERO.L2       B9
    80050D98 00000001 ||         NOP          
    80050D9C 00000000 ||         NOP          
    80050DA0 05100059            MV.L1         A4,A10
    80050DA4 05B10069 ||         MVKH.S1       0x62000000,A11
    80050DA8 01C002EB ||         MVKH.S2       0x80050000,B3
    80050DAC 040008C1 ||         ZERO.D1       A8
    80050DB0 010000FB ||         ZERO.L2       B2
    80050DB4 03BD7D43 ||         ADDAW.D2      SP,0xb,B7
    80050DB8 00000001 ||         NOP          
    80050DBC 00000000 ||         NOP          
    80050DC0 033D005B            ADD.L2        8,SP,B6
    80050DC4 06080029 ||         MVK.S1        0x1000,A12
    80050DC8 02BD5EC3 ||         ADDAD.D2      SP,0xa,B5
    80050DCC 0080012A ||         MVK.S2        0x0002,B1
    80050DD0 040001AA            MVK.S2        0x0003,B8
    80050DD4 038000A8            MVK.S1        0x0001,A7
    80050DD8 00102A5A            CMPEQ.L2      1,B4,B0
    80050DDC 20000C10     [ B0]  B.S1          0x80050E20 (PC+96 = 0x80050e20)
    80050DE0 028000A8            MVK.S1        0x0001,A5
    80050DE4 01800428            MVK.S1        0x0008,A3
    80050DE8 023FFD42            ADDAW.D2      SP,0x1f,B4
    80050DEC 228059BC     [ B0]  STB.D2T1      A5,*+B15[89]
    80050DF0 22AA8214     [ B0]  LDBU.D1T1     *+A10[20],A5
    80050DF4 053E63E6            LDDW.D2T2     *+SP[19],B11:B10
    80050DF8 063E43E5            LDDW.D2T1     *+SP[18],A13:A12
    80050DFC 00000000 ||         NOP          
    80050E00 01B4005B            MV.L2         B13,B3
    80050E04 053E23E4 ||         LDDW.D2T1     *+SP[17],A11:A10
    80050E08 000C0363            B.S2          B3
    80050E0C 07002AEC ||         LDW.D2T1      *+B15[42],A14
    80050E10 063E83E6            LDDW.D2T2     *+SP[20],B13:B12
    80050E14 07805452            ADDK.S2       168,SP
    80050E18 027FFFA8            MVK.S1        0xffffffff,A4
    80050E1C 00002000            NOP           2
    80050E20 028020FE            STW.D2T2      B5,*+B15[32]
    80050E24 04007CBC            STB.D2T1      A8,*+B15[124]
    80050E28 04007DBC            STB.D2T1      A8,*+B15[125]
    80050E2C 03BEA2F6            STW.D2T2      B7,*+SP[21]
    80050E30 043E82F6            STW.D2T2      B8,*+SP[20]
    80050E34 00805FBE            STB.D2T2      B1,*+B15[95]
    80050E38 04005EBC            STB.D2T1      A8,*+B15[94]
    80050E3C 04005DBC            STB.D2T1      A8,*+B15[93]
    80050E40 04005CBC            STB.D2T1      A8,*+B15[92]
    80050E44 04005BBC            STB.D2T1      A8,*+B15[91]
    80050E48 04005ABC            STB.D2T1      A8,*+B15[90]
    80050E4C 008058BE            STB.D2T2      B1,*+B15[88]
    80050E50 018024DC            STH.D2T1      A3,*+B15[36]
    80050E54 048025DE            STH.D2T2      B9,*+B15[37]
    80050E58 048026DE            STH.D2T2      B9,*+B15[38]
    80050E5C 03BFC2D4            STH.D2T1      A7,*+SP[30]
    80050E60 03BFE2D4            STH.D2T1      A7,*+SP[31]
    80050E64 048020DC            STH.D2T1      A9,*+B15[32]
    80050E68 048021DC            STH.D2T1      A9,*+B15[33]
    80050E6C 048022DC            STH.D2T1      A9,*+B15[34]
    80050E70 048023DD            STH.D2T1      A9,*+B15[35]
    80050E74 0FF95410 ||         B.S1          CSL_dmaxHwSetup (PC-13664 = 0x8004d900)
    80050E78 033D62F6            STW.D2T2      B6,*+SP[11]
    80050E7C 033D82F4            STW.D2T1      A6,*+SP[12]
    80050E80 013DA2F6            STW.D2T2      B2,*+SP[13]
    80050E84 013DC2F6            STW.D2T2      B2,*+SP[14]
    80050E88 028060BC            STB.D2T1      A5,*+B15[96]
    80050E8C 0FFB2410            B.S1          CSL_dmaxHwControl (PC-9952 = 0x8004e7a0)
    80050E90 0187522A            MVK.S2        0x0ea4,B3
    80050E94 020001AA            MVK.S2        0x0003,B4
    80050E98 01C002EA            MVKH.S2       0x80050000,B3
    80050E9C 02280058            MV.L1         A10,A4
    80050EA0 030000F8            ZERO.L1       A6
    80050EA4 0FFB2010            B.S1          CSL_dmaxHwControl (PC-9984 = 0x8004e7a0)
    80050EA8 01875E2A            MVK.S2        0x0ebc,B3
    80050EAC 0200022A            MVK.S2        0x0004,B4
    80050EB0 01C002EA            MVKH.S2       0x80050000,B3
    80050EB4 02280058            MV.L1         A10,A4
    80050EB8 030000F8            ZERO.L1       A6
    80050EBC 0FFB2010            B.S1          CSL_dmaxHwControl (PC-9984 = 0x8004e7a0)
    80050EC0 01876A2A            MVK.S2        0x0ed4,B3
    80050EC4 0200042A            MVK.S2        0x0008,B4
    80050EC8 01C002EA            MVKH.S2       0x80050000,B3
    80050ECC 02280058            MV.L1         A10,A4
    80050ED0 030000F8            ZERO.L1       A6
    80050ED4 063E82D4            STH.D2T1      A12,*+SP[20]
    80050ED8 003E8287            LDHU.D2T2     *+SP[20],B0
    80050EDC 01AA8214 ||         LDBU.D1T1     *+A10[20],A3
    80050EE0 00006000            NOP           4
    80050EE4 30000B91     [!B0]  B.S1          0x80050F3C (PC+92 = 0x80050f3c)
    80050EE8 0203E05B ||         SUB.L2        B0,1,B4
    80050EEC 01AC7C41 ||         ADDAW.D1      A11,A3,A3
    80050EF0 010001A3 ||         MV.S2         B0,B2
    80050EF4 00800942 ||         MV.D2         B0,B1
    80050EF8 023E82D7            STH.D2T2      B4,*+SP[20]
    80050EFC 018D0058 ||         ADD.L1        8,A3,A3
    80050F00 203E8286     [ B0]  LDHU.D2T2     *+SP[20],B0
    80050F04 720C0266     [!B2]  LDW.D1T2      *+A3[0],B4
    80050F08 410000A8     [ B1]  MVK.S1        0x0001,A2
    80050F0C 408000A8     [ B1]  MVK.S1        0x0001,A1
    80050F10 00000000            NOP          
    80050F14 0203E05B            SUB.L2        B0,1,B4
    80050F18 310000F9 ||  [!B0]  ZERO.L1       A2
    80050F1C 00000000 ||         NOP          
    80050F20 AFFFFE91     [ A2]  B.S1          0x80050F14 (PC-12 = 0x80050f14)
    80050F24 823E82D6 ||  [ A1]  STH.D2T2      B4,*+SP[20]
    80050F28 A03E8286     [ A2]  LDHU.D2T2     *+SP[20],B0
    80050F2C 00880058            MV.L1         A2,A1
    80050F30 00004000            NOP           3
    80050F34 020C0266            LDW.D1T2      *+A3[0],B4
    80050F38 00002000            NOP           2
    80050F3C 000000AA            MVK.S2        0x0001,B0
    80050F40 00000000            NOP          
    80050F44 023E82D6            STH.D2T2      B4,*+SP[20]
    80050F48 00BE8286            LDHU.D2T2     *+SP[20],B1
    80050F4C 00006000            NOP           4
    80050F50 500000FA     [!B1]  ZERO.L2       B0
    80050F54 20000211     [ B0]  B.S1          0x80050F50 (PC+16 = 0x80050f50)
    80050F58 223E82D6 ||  [ B0]  STH.D2T2      B4,*+SP[20]
    80050F5C 20BE8286     [ B0]  LDHU.D2T2     *+SP[20],B1
    80050F60 00006000            NOP           4
    80050F64 0FFB0810            B.S1          CSL_dmaxHwControl (PC-10176 = 0x8004e7a0)
    80050F68 0187BE2A            MVK.S2        0x0f7c,B3
    80050F6C 0200022A            MVK.S2        0x0004,B4
    80050F70 01C002EA            MVKH.S2       0x80050000,B3
    80050F74 02280058            MV.L1         A10,A4
    80050F78 030000F8            ZERO.L1       A6
    80050F7C 00132C10            B.S1          CSL_dmaxClose (PC+39264 = 0x8005a8c0)
    80050F80 0187C82A            MVK.S2        0x0f90,B3
    80050F84 01C002EA            MVKH.S2       0x80050000,B3
    80050F88 02280058            MV.L1         A10,A4
    80050F8C 00002000            NOP           2
    80050F90 0014FC10            B.S1          CSL_intcGlobalRestore (PC+42976 = 0x8005b760)
    80050F94 023C8294            LDBU.D2T1     *+SP[4],A4
    80050F98 0187D22A            MVK.S2        0x0fa4,B3
    80050F9C 01C002EA            MVKH.S2       0x80050000,B3
    80050FA0 00002000            NOP           2
    80050FA4 063E43E4            LDDW.D2T1     *+SP[18],A13:A12
    80050FA8 053E63E6            LDDW.D2T2     *+SP[19],B11:B10
    80050FAC 023C62C4            LDH.D2T1      *+SP[3],A4
    80050FB0 01B4005B            MV.L2         B13,B3
    80050FB4 07002AEC ||         LDW.D2T1      *+B15[42],A14
    80050FB8 000C0363            B.S2          B3
    80050FBC 053E23E4 ||         LDDW.D2T1     *+SP[17],A11:A10
    80050FC0 063E83E6            LDDW.D2T2     *+SP[20],B13:B12
    80050FC4 07805452            ADDK.S2       168,SP
    80050FC8 00004000            NOP           3
    80050FCC 00000000            NOP          
    80050FD0 00000000            NOP          
    80050FD4 00000000            NOP          
    80050FD8 00000000            NOP          
    80050FDC 00000000            NOP          

  • Joseph Zolyak said:
    The puzzling aspect is that the DSP code gets stuck at the EXACT SAME point inside the CSL_intcHookIsr routine, looping between addresses 80050F50 and 80050F60, regardless of which set of tools generated the code.

    So are you saying you can make the code break using codegen 6.0.8?  It works with 6.0.8 in CCS 3.3.82.3, but fails with 6.0.8 in CCS 3.3.82.13?

    Check your project options to see if you're linking any libraries into the project that are inside your CCS directory.  If so, there is probably a difference between the versions that ship with these versions of CCS.

    Make sure you have the latest 672x CSL: http://www.ti.com/tool/sprc223

    Also, make sure you're using the latest ROM patch: http://www.ti.com/tool/sprc203

  • The binary image generated with CCS 3.3.38.2 (not 3.3.82.2 that I incorrectly typed earlier) and Code Gen tools 6.0.8 runs fine when the DSP code is loaded into SDRAM by a host processor on my production hardware that boots up a power up. The code execution gets stuck at the indicated point when the code is downloaded to the C6726 and told to run via the XDS510 debugger.  When the code is downloaded via the XDS510 to the C6726 chip, it gets stuck in the same place regardless of whether the code was generated with Code Gen tools version 6.1.20 or 6.0.8.

    In answer to your second question, the code that was generated with CCS 3.3.82.13 and 6.1.20 tools * IS * using the latest patch and CSL libraries from the web pages you indicated. I am using two separate PCs for this experiment. One PC has CCS 3.3.38.2 and 6.0.8 tools that generates binary code for my production board. The second PC is configured with the latest release of CCS 3.3.82.13, 6.1.20 tools, CSL libraries, DSP/BIOS, etc. I move the XDS510 debugger between the two PCs and attach it on the other end to the same production board.

    I believe I am fighting with two separate problems here. The first problem is getting the CSL_intcHookIsr routine to execute properly when it is downloaded and run via the XDS510 debugger. The second problem is producing an executable binary image with the latest version of  CCS, Code Gen tools, and CSL libraries when loaded from the host processor and not the XDS510 debugger. (The whole point of this exercise is to migrate the C6726 code over to a C6747 chip, but I can't even get started doing that until the new tools and libraries produce a working binary image).

    By the way, can you/someone interpret what the assembly code is waiting for in the four stuck lines of looping code? Thanks!

     

     

     

  • Looking at the CSL source code, I believe it's waiting for DMA transfer to complete.

    It should eventually time out and exit the loop.

    Refer to file: csl_C672x_src_03_00_09_00\dsp\src\intc\csl_intcHookisr.c

    ........

                while (response--);

                /*
                 * Waiting for DMAX trasfer complete. This check for count0 in
                 * one dimentional transfer. This routine is for setting
                 * interupt handler the transfer complete interrupt is not used
                 */
                do {
                    response = *(Uint32 *) gpCount0Addr;
                } while (response != 0);

    .......

    Have you tried building, loading, and running the example project located here: csl_C672x_intc_03_00_09_00\dsp\examples\c672x\intc\src\ ?

    -Mark

  • Hello Mark,

    Per your request, I built and ran the example project on my production hardware via the XDS510 debugger and I got the same results!!! The code execution gets stuck on the same 4 lines of assembly code in the CSL_intcHookIsr routine. What I found interesting is that in intc_csl_example_Test( ), it was the first call to CSL_intcPlugEventHandler( ) that cause the code to get stuck i.e.

        /* Assigning the ISR */
        isrRec.handler = comp0Isr;
        /* No argument is passed to the ISR */
        isrRec.arg = (void *)0x0;
       
        CSL_intcPlugEventHandler(hIntc, &isrRec);

     

    In order to build and link this example I had to make the following changes to the example files:

    1. I took out the "-e int00" linker directive from c672x_c67.cmd to get around problem of undefined symbol.

    2. In intc_example.pjt,  I replaced "CPUFamily=TMS320C62XX"  with  "CPUFamily=TMS320C67XX".  Likewise I also replaced the included library csl_DA710.lib with csl_C6726.lib. (I am running the built code on my hardware platform and not as a software simuation).

    NOTE:  in intc_example.pjt, it still says to include applypatch.obj and c672xRomPatchV1_00_00.lib, which I did on my first attempt at this experiment.

    Next I modified intc_example.pjt to use the latest patch files:  applySystemPatch.obj and c672xSystemPatchV2_00_00.lib. The problem of getting stuck happened at the same 4 lines of assembly code again!!!

  • Joe,

    I do not have a 6726 EVM board to try this out on, so I'm flying a little blind.

    I found a strange thing.

    I built the example intc project after making same changes you did. I loaded and ran the .out file on the 672x simulator. When I halted the program, it was in the do-- while() loop. I forced contents of address 0x620080A8 to be 0 so that it would exit the do..while() loop.

    Address 0x620080A8 is the DMAX register location that is being checked . It initially contains an 8 and the code should stay in the loop until the contents reaches 0.

    I found that it did not exit the loop after forcing the contents to 0.

    So then I tried adding the csl_intcHookIsr.c file to the project so that when I built the project, this file would be compiled instead of linking in the one from the library (I'm using CGT v6.1.20).

    I loaded and ran it and tested it the same way and found that it did exit the loop when I forced the DMAX reg (0x620080A8) to 0.

    Can you try doing this and running it on your h/w to see if it is able to get through the loop and let me know your results?

    Here's snapshot of disassembly while program is in do...while() loop. In this case, the project was built with the csl_intcHookIsr.c file added. As you can see, the disassembly is different than when project uses the csl_intcHookIsr from the CSL library.

     

      

     

    Regards,

    Mark