Hi all,
We have designed customized h/w based on Netra (TMS320DM8168ACYG2). We have used 16 bit, Micron DDR-3 with both DDR controllers (512 MB to each controller, making total 1 GB memory).
We followed all steps as mentioned in sprugx8.pdf (Section - 7.5.2 DDR3 SDRAM Memory Initialization).
With these steps, DDR-0 controller works fine and we are able to access 512MB memory available on DDR-0.
But, For DDR-1 controller, we lose control of JTAG in CCS, if step 12 & 13("Write 0 to the INITREF_DIS bit in SDRRCR register to enable DDR3 initialization") are performed. The same initialization sequence is working fine for DDR-0 controller. I have attached my GEL file herewith.
Exact code block which hangs -
WR_MEM_32(EMIF4_1_SDRAM_REF_CTRL, 0x0000613B); //Initially a large refresh period
WR_MEM_32(EMIF4_1_SDRAM_REF_CTRL, 0x1000613B); //Trigger initialization
WR_MEM_32(EMIF4_1_SDRAM_REF_CTRL, (0x10000000|SDREF)); //Move to a smaller more correct one - Hangs here
If I comment the above line where it hang previously, I can see all 0's for address of DDR-1 controller and write of any other value doesn't succeed. In other words, it seems that DDR-1 controller can't access DDR-3 chips available on it.
Can any one please advice what can be issue ?
Thanks in advance,
Sweta
