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TDA4VM: PLL and MCU_SYS_CLK in WKUP MCU Domain , WDT and GPT Config.

Part Number: TDA4VM

Tool/software:

Hallo,

for the clock and PLL we have followed question to make clarfiy the seq. of the PLL setting and Sys clock in MCU domain, which also impact on the MCAL config. like WDT and GPT

based on our understanding form Technical Documentation, the 19.2 MHz is selected. As my understanding from TI, that the WKUP_HFOSC0, MCU_PLL0 and WKUP_PLL_CTRL0 is done by ROM code at begin(R5 first PLL lock by DMSC). After boot up, it can not be changed, even register of those PLL has description. Then what is the output freq. of MCU_SYSCLK0? 

After MCU_SYSCLK0 is confirmed, then to the WDG in MCU Domain.(RTI).  As my understanding the Functional Clock is used for the setting of the watchdog time.  Interface Clock --> what is usage? For the MCAL config. which freq. of the clock has impact to the configuration?

WdgRtiFrequency is default with 12.5MHz (internal CLK_12M_RC)?  this freqency setting is based on which clock? also for later GPT timer. How does the clock impact those configuration (principal)? 

  • Hi,

    based on our understanding form Technical Documentation, the 19.2 MHz is selected. As my understanding from TI, that the WKUP_HFOSC0, MCU_PLL0 and WKUP_PLL_CTRL0 is done by ROM code at begin(R5 first PLL lock by DMSC). After boot up, it can not be changed, even register of those PLL has description. Then what is the output freq. of MCU_SYSCLK0? 

    MCU_SYSCLK0 is 1000MHz clock. It is fixed.

    Interface Clock --> what is usage?

    Which is given from MCU_SYSCLK0/6 for the watchdog peripheral internal operation.
    FCLK: Is functional clock, used to drive the counter of the timer module which can be configured using Configurator.

    For the MCAL config. which freq. of the clock has impact to the configuration?

    Fclk is the one selection for watchdog counters from MCAL configuration.
    which can be 12.5MHz (CLK_12M_RC) / HFOSC0_CLKOUT (192.MHz) / LFXOSC0_CLKOUT (32.768KHz) /  CLK_32 (32KHz)

    WdgRtiFrequency is default with 12.5MHz (internal CLK_12M_RC)?  this freqency setting is based on which clock?

    12.5MHz is internal clock.

    You can change the functional clock used to driver the counters, and accordingly you need to configure the counters as per the clock selected.


    Best Regards,
    Sudheer

  • Hi,

    based on our understanding form Technical Documentation, the 19.2 MHz is selected. As my understanding from TI, that the WKUP_HFOSC0, MCU_PLL0 and WKUP_PLL_CTRL0 is done by ROM code at begin(R5 first PLL lock by DMSC). After boot up, it can not be changed, even register of those PLL has description. Then what is the output freq. of MCU_SYSCLK0? 

    MCU_SYSCLK0 is 1000MHz clock. It is fixed.

    Z.Xia: this means no matter  different external Osci. is selected, the ROM code will adapt it with setting of PLL Registers to reach output MCU_SYSCLK0 to 1 GHz (1000MHz)?
    Interface Clock --> what is usage?

    Which is given from MCU_SYSCLK0/6 for the watchdog peripheral internal operation.
    FCLK: Is functional clock, used to drive the counter of the timer module which can be configured using Configurator.

    Z.Xia: That means IClock is not interested for user, as it is for internal operation? Functional clock is selectable in EB tool?
    as it is just WdgRtiFrequency can be configured. Or you mean manual to input with WdgRtiFrequency=19200000 for selection with HFOSC0_CLKOUT (19.2MHz) ?
    For the MCAL config. which freq. of the clock has impact to the configuration?

    Fclk is the one selection for watchdog counters from MCAL configuration.
    which can be 12.5MHz (CLK_12M_RC) / HFOSC0_CLKOUT (192.MHz) / LFXOSC0_CLKOUT (32.768KHz) /  CLK_32 (32KHz)

    WdgRtiFrequency is default with 12.5MHz (internal CLK_12M_RC)?  this freqency setting is based on which clock?

    12.5MHz is internal clock.

    You can change the functional clock used to driver the counters, and accordingly you need to configure the counters as per the clock selected.

    Z.Xia  Clock Source as input Clock freq. with 19.2 MHz? the counter shall be adapted you mean blow?

    Value = <Clock Frequency in MHz> * <Required Time duration in seconds>


  • Hi,

    MCU_SYSCLK0 is 1000MHz clock. It is fixed.

    Z.Xia: this means no matter  different external Osci. is selected, the ROM code will adapt it with setting of PLL Registers to reach output MCU_SYSCLK0 to 1 GHz (1000MHz)?

    Yes, It is fixed and 1000MHz. As per input HFOSC clock PLL will be tuned for 1000MHz output.

    Z.Xia: That means IClock is not interested for user, as it is for internal operation?

    Yes. customer no need to interest in this. Also, it is not configurable.

    Functional clock is selectable in EB tool?
    as it is just WdgRtiFrequency can be configured.

    Yes, Which is configurable from EB tool.
    We can use choose either of below clocks.
    which can be 12.5MHz (CLK_12M_RC) / HFOSC0_CLKOUT (192.MHz) / LFXOSC0_CLKOUT (32.768KHz) /  CLK_32 (32KHz)

    Or you mean manual to input with WdgRtiFrequency=19200000 for selection with HFOSC0_CLKOUT (19.2MHz) ?

    There is no Manual input from external source. HFOSC0_CLKOUT is output clock with same frequency as input to HSOSC0.
    It is one of selection for wdt FCLK from muxed clock.

    You can change the functional clock used to driver the counters, and accordingly you need to configure the counters as per the clock selected.

    Z.Xia  Clock Source as input Clock freq. with 19.2 MHz? the counter shall be adapted you mean blow?

    Value = <Clock Frequency in MHz> * <Required Time duration in seconds>

    Yes. The counter values to be as per FCLK selected.

    Best Regards,
    Sudheer

  • Hi,

    MCU_SYSCLK0 is 1000MHz clock. It is fixed.

    Z.Xia: this means no matter  different external Osci. is selected, the ROM code will adapt it with setting of PLL Registers to reach output MCU_SYSCLK0 to 1 GHz (1000MHz)?

    Yes, It is fixed and 1000MHz. As per input HFOSC clock PLL will be tuned for 1000MHz output.

    Z.Xia: ok, then it is ROM code to grantee that the SYS CLK. That means if we select 20MHz or other Oscillator, still the same output?
    Z.Xia: That means IClock is not interested for user, as it is for internal operation?

    Yes. customer no need to interest in this. Also, it is not configurable.

    Z.Xia: ok.
    Functional clock is selectable in EB tool?
    as it is just WdgRtiFrequency can be configured.

    Yes, Which is configurable from EB tool.
    We can use choose either of below clocks.
    which can be 12.5MHz (CLK_12M_RC) / HFOSC0_CLKOUT (192.MHz) / LFXOSC0_CLKOUT (32.768KHz) /  CLK_32 (32KHz)

    Or you mean manual to input with WdgRtiFrequency=19200000 for selection with HFOSC0_CLKOUT (19.2MHz) ?

    There is no Manual input from external source. HFOSC0_CLKOUT is output clock with same frequency as input to HSOSC0.
    It is one of selection for wdt FCLK from muxed clock.

    Z.Xia, how to select the mux clock in EB tool between

    12.5MHz (CLK_12M_RC) / HFOSC0_CLKOUT (192.MHz) / LFXOSC0_CLKOUT (32.768KHz) /  CLK_32 (32KHz)

    , looks like no items can be selected. screenshot?
    The motivation is to understand why default with 12500000? What is this freq. mean? Or here even 1000000 can also be configured. The MCAL code generation will be adapted to select the corresponded mux clock?

    You can change the functional clock used to driver the counters, and accordingly you need to configure the counters as per the clock selected.

    Z.Xia  Clock Source as input Clock freq. with 19.2 MHz? the counter shall be adapted you mean blow?

    Value = <Clock Frequency in MHz> * <Required Time duration in seconds>

    Yes. The counter values to be as per FCLK selected.

    As the 1000000Hz is configured, then it is much easier to calculate the duration time?

  • HI,

    Yes, It is fixed and 1000MHz. As per input HFOSC clock PLL will be tuned for 1000MHz output.

    Z.Xia: ok, then it is ROM code to grantee that the SYS CLK. That means if we select 20MHz or other Oscillator, still the same output?

    Yes.

    Z.Xia, how to select the mux clock in EB tool between

    12.5MHz (CLK_12M_RC) / HFOSC0_CLKOUT (192.MHz) / LFXOSC0_CLKOUT (32.768KHz) /  CLK_32 (32KHz)

    , looks like no items can be selected. screenshot?

    Yes, EB Tool not having option to select the rtifrequency. The WdgRtiFrequecy is not using in configuration output.


    WdgRti Clock is configured form startup.c file. If you want to change the clock source you have to change from Startup.c file.

    Note:
    It is not possible to configure to any frequency. We can configure one of below.
    12.5MHz (CLK_12M_RC) / HFOSC0_CLKOUT (192.MHz) / LFXOSC0_CLKOUT (32.768KHz) /  CLK_32 (32KHz)

    Best Regards,
    Sudheer

  • HI,

    Z.Xia, how to select the mux clock in EB tool between

    12.5MHz (CLK_12M_RC) / HFOSC0_CLKOUT (192.MHz) / LFXOSC0_CLKOUT (32.768KHz) /  CLK_32 (32KHz)

    , looks like no items can be selected. screenshot?

    Yes, EB Tool not having option to select the rtifrequency. The WdgRtiFrequecy is not using in configuration output.

    WdgRtiFreqency is not defined in Autosar 4.3 version. why is appeared here? what is the use case of this parameter?

    WdgRti Clock is configured form startup.c file. If you want to change the clock source you have to change from Startup.c file.

    Note:
    It is not possible to configure to any frequency. We can configure one of below.
    12.5MHz (CLK_12M_RC) / HFOSC0_CLKOUT (192.MHz) / LFXOSC0_CLKOUT (32.768KHz) /  CLK_32 (32KHz)

    you mean this WdgRti clock is only selectable in startup.c file, with followed options, but irrelevant to WdgRtiFrequecy  in EB tool?

    12.5MHz (CLK_12M_RC) / HFOSC0_CLKOUT (192.MHz) / LFXOSC0_CLKOUT (32.768KHz) /  CLK_32 (32KHz)

  • Hi,

    WdgRtiFreqency is not defined in Autosar 4.3 version. why is appeared here? what is the use case of this parameter?

    There is no use of that parameter. You can ignore it.

    you mean this WdgRti clock is only selectable in startup.c file, with followed options, but irrelevant to WdgRtiFrequecy  in EB tool?

    12.5MHz (CLK_12M_RC) / HFOSC0_CLKOUT (192.MHz) / LFXOSC0_CLKOUT (32.768KHz) /  CLK_32 (32KHz)

    It has to be taken care in application.
    The reference example from TI, configuring in startup.c file.

    Best Regards,
    Sudheer