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AM3359: Board layout guidelines for GPMC Interface to Async Flash & Sync FPGA

Part Number: AM3359


Tool/software:

Hello All,

We are having Asynchronous NOR Flash (MT29F2G16ABAEAWP-AIT:E) and Xilinx Artix-7 FPGA connected to the GPMC interface of AM3359 processor (GPMC interface lines are shared/connected to both the devices from processor). Asynchronous NOR Flash is used to store the boot configuration file and is connected to 16bit Address-Data multiplexed Async GPMC interface. We are using 16bit Address-Data multiplexed Synchronous GPMC interface for communication with FPGA.

Can you please provide board layout suggestions for the GPMC interface. Any length matching to be considered (to meet the timing requirements) for the both Asynchronous & Synchronous GPMC interface, please let us know.