AM6442: When enabling fiber operation mode kernel exception happens: Internal error: SP/PC alignment exception: 000000008a000000 [#1] PREEMPT_RT SMP

Hello,

The subject owner is out of office, but will return in the 2^nd half of July. Feel free to ping the thread if you do not get a response by July 17.

Dear TI team,

Any update

Hello Chris,

Apologies for the delayed response - it will take another couple days for us to get back to you. I don't personally have any experience with fiber connections to the Ethernet ports, so it will take some time to get input from other team members.

Regards,

Nick

Dear Nick,

Have you heard back from your team members?

Thank you

Chris

Dear Nick,

Any update?

Thank you

Chris

Hello Chris,

Apologies for the delayed responses here. Was able to have some discussions, ran out of time today to put together a reply on the forums. Will provide more information tomorrow.

Regards,

Nick

Hello Chris,

Thanks again for your patience here. The guy I was able to talk with has seen issues in the past where the link speed was not set correctly (since fiber is a fixed duplex connection instead of auto-negotiating), but that shouldn't apply here since the issue is happening before a link can be established.

The kernel docs aren't very descriptive. e.g., I assume that the properties that are listed in the bindings documentation but not in your devicetree file are optional, but I'm not sure:
https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/Documentation/devicetree/bindings/net/ti,dp83869.yaml?h=ti-linux-6.1.y
https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/include/dt-bindings/net/ti-dp83869.h?h=ti-linux-6.1.y

I am sending your thread over to the PHY team to see if they have any additional insights.

Regards,

Nick

Hi Chris,

When the port is set as DP83869_RGMII_COPPER_ETHERNET and the crash disappears, are you able to communicate via the fiber port?

For DP83869_RGMII_100_BASE or DP83869_RGMII_1000_BASE set in dts, please share the register dump for DP83869 so I can confirm the PHY's config is set correctly. As Nick mentioned, it's possible the link speed is not set correctly on either MAC or PHY side, causing link to fail for fiber.

Thank you,
Evan

Dear Nick,

Thanks for the reply. Whether the exception is related to PRU-ICSSG binary. What do you think? I will go through the details you shared and come back

Thank you

Chris

Dear Evan,

Evan Mayhew said:

When the port is set as DP83869_RGMII_COPPER_ETHERNET and the crash disappears, are you able to communicate via the fiber port?

No. We are using an SFP port and it is expecting only a fiber module as per the design. So we can only check with a fiber module right now .

Evan Mayhew said:

For DP83869_RGMII_100_BASE or DP83869_RGMII_1000_BASE set in dts, please share the register dump for DP83869 so I can confirm the PHY's config is set correctly. As Nick mentioned, it's possible the link speed is not set correctly on either MAC or PHY side, causing link to fail for fiber.

Hello Chris,

It's hard to tell from my side whether the issue is related to something in the HW strapping / kernel configs, or related to the fact that it is connected to PRU Ethernet rather than CPSW. Let's keep debugging things from the PHY side for now, and while yall are doing that I'll ask around with a couple more team members.

Regards,

Nick

Hi Chris,

Incorrect register values could be a function of unintended strap behavior, but is more likely function of errors in the register read/write process for extended registers.

Please confirm this procedure is being used to read/write registers beyond address 0x1F:

write address 0xD = 0x1F
write address 0xE = 0x6E
write address 0xD = 0x401F
read address 0xD (returns the value in 0x6E)

Sharing 0x6E will help me confirm the intended straps are being set properly.

Thank you,

Evan

Followup from the PRU Ethernet firmware developers: As long as the PHY is setup correctly, it should work plug & play with the PRU Ethernet, just like with CPSW Ethernet. So it is good that we are focusing now on making sure the PHY configuration is correct.

Regards,

Nick

Thanks for confirming on the firmware side Nick.

In addition to the register read-out mentioned above, can you please confirm the DP83869 driver version is being used?

Here is out latest driver for 869, there are some fixes to configure_fiber function when using DP83869_RGMII_1000_BASE / DP83869_RGMII_100_BASE options:

https://github.com/TexasInstruments/ti-ethernet-software/blob/main/linux_drivers/dp83869.c

Is this the same driver being used in your system?

Thank you,
Evan

Thanks Nick. I will check the strapping details with hardware team and go from there

Thank you

Chris

Dear Evan,

Apologies for the delayed response.

Please see the register dumps

Register 0x00 = 0x1140
Register 0x01 = 0x6149
Register 0x02 = 0x2000
Register 0x03 = 0xa0f3
Register 0x04 = 0x0020
Register 0x05 = 0000
Register 0x06 = 0x0004
Register 0x07 = 0x2001
Register 0x08 = 0000
Register 0x09 = 0x1b00
Register 0x0A = 0x4000
Register 0x0B = 0000
Register 0x0C = 0000
Register 0x0D = 0x401f
Register 0x0E = 0x00d2
Register 0x0F = 0xf000
Register 0x10 = 0x5408
Register 0x11 = 0xa802
Register 0x12 = 0000
Register 0x13 = 0000
Register 0x14 = 0x2bc7
Register 0x15 = 0000
Register 0x16 = 0000
Register 0x17 = 0x0040
Register 0x18 = 0x6150
Register 0x19 = 0x4440
Register 0x1A = 0x0002
Register 0x1B = 0000
Register 0x1C = 0000
Register 0x1D = 0000
Register 0x1E = 0x0012
Register 0x1F = 0000
Register 0x31 = 0x10b0
Register 0x32 = 0x00d2
Register 0x33 = 0000
Register 0x34 = 0000
Register 0x35 = 0000
Register 0x36 = 0000
Register 0x37 = 0000
Register 0x38 = 0000
Register 0x39 = 0000
Register 0x3A = 0000
Register 0x43 = 0x07a0
Register 0x44 = 0000
Register 0x45 = 0000
Register 0x46 = 0000
Register 0x47 = 0000
Register 0x48 = 0000
Register 0x49 = 0000
Register 0x4A = 0000
Register 0x4B = 0000
Register 0x4C = 0000
Register 0x4D = 0000
Register 0x4E = 0000
Register 0x4F = 0x0230
Register 0x50 = 0x0453
Register 0x51 = 0x9ada
Register 0x52 = 0x01f4
Register 0x53 = 0x2055
Register 0x54 = 0000
Register 0x55 = 0000
Register 0x56 = 0000
Register 0x57 = 0000
Register 0x58 = 0000
Register 0x59 = 0000
Register 0x5A = 0000
Register 0x5B = 0000
Register 0x5C = 0000
Register 0x5D = 0000
Register 0x5E = 0000
Register 0x5F = 0000
Register 0x60 = 0x0008
Register 0x61 = 0000
Register 0x62 = 0x0001
Register 0x63 = 0000
Register 0x64 = 0x8000
Register 0x65 = 0x43aa
Register 0x66 = 0x2334
Register 0x67 = 0x03e8
Register 0x68 = 0000
Register 0x69 = 0x0020
Register 0x6A = 0000
Register 0x6B = 0000
Register 0x6C = 0x0289
Register 0x6D = 0x8912
Register 0x6E = 0x02f2
Register 0x1DF = 0x0001
Register 0x1E0 = 0x417a
Register 0x1E1 = 0x0002
Register 0x1E2 = 0x0025
Register 0x1E3 = 0x0018
Register 0x1E4 = 0x88f7
Register 0x1E5 = 0000
Register 0x1E6 = 0x0080
Register 0x1E7 = 0x0012
Register 0x1E8 = 0x0920
Register 0x1E9 = 0x036d
Register 0x1EA = 0000
Register 0x1EB = 0x4830
Register 0x1EC = 0x1ffd
Register 0xC00 = 0x1140
Register 0xC01 = 0x6149
Register 0xC02 = 0x2000
Register 0xC03 = 0xa0f3
Register 0xC04 = 0x0020
Register 0xC05 = 0000
Register 0xC06 = 0x0004
Register 0xC07 = 0x2001
Register 0xC08 = 0000
Register 0xC09 = 0000
Register 0xC0A = 0000
Register 0xC0B = 0000
Register 0xC0C = 0000
Register 0xC0D = 0000
Register 0xC0E = 0000
Register 0xC0F = 0000
Register 0xC10 = 0x3348
Register 0xC11 = 0000
Register 0xC12 = 0x10b4
Register 0xC13 = 0x0400
Register 0xC14 = 0x0100
Register 0xC15 = 0x652a
Register 0xC16 = 0x0029
Register 0xC17 = 0x0002
Register 0xC18 = 0x01ff
Register 0xC19 = 0000

Thank you

Chris
 

Dear Evan,

Evan Mayhew said:

In addition to the register read-out mentioned above, can you please confirm the DP83869 driver version is being used?

We tried using the driver versions available in the PSDK 09.02.01.09 and 09.00.00.03 releases so far. 

I am seeing some difference between these two versions (09.02.01.09 and the shared link). Will incorporate these change in the Linux image and check. What do you think?

4,15d3
+ *
+ * 23Apr2024 Alvaro Reyes (a-reyes1@ti.com)
+ * Updated Functions:
+ * dp83869_configure_fiber
+ *
+ * 21Mar2024 Alvaro Reyes (a-reyes1@ti.com)
+ *
+ * New PHY_ID for 869 Added
+ *
+ * Updated Functions:
+ * dp83869_set_strapped_mode
+ * dp83869_configure_mode
30,31c18
+ #define DP83869_REV0_PHY_ID	0x2000a0f1
+ #define DP83869_REV1_PHY_ID 0x2000a0f3
---
- #define DP83869_PHY_ID		0x2000a0f1
32a20
- #define DP83869_DEVADDR		0x1f
34,35d21
+ #define PHY_IDEN_REG1		0x2
+ #define PHY_IDEN_REG2		0x3
40d25
+ #define LEDS_CFG1_DP83869	0x18
45,46c30
+ #define DP83869_DEVADDR		0x1f
+ #define DP83869_GEN_CFG3	0x0031
---
- #define DP83869_GEN_CFG3        0x0031
103c87
+ #define DP83869_STRAP_OP_MODE_MASK		GENMASK(11, 9)
---
- #define DP83869_STRAP_OP_MODE_MASK		GENMASK(2, 0)
123d106
+ #define DP83869_LED1_MUX_RXER				0xE
155,161d137
+ /* OPMODE Configure, as per section 9.4.8 of data sheet*/
+ #define RGMII_to_SGMII			0x43
+ #define MEDIA_CONVERT_1000M		0x44
+ #define MEDIA_CONVERT_100M		0x45
+ #define SGMII_to_COPPER			0x46
+ 
+ 
538c514
+ val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1);
---
- val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1);
542c518
+ dp83869->mode = (val & DP83869_STRAP_OP_MODE_MASK) >> 9;
---
- dp83869->mode = val & DP83869_STRAP_OP_MODE_MASK;
615,616c591
+ dp83869->rx_int_delay =
+ dp83869_internal_delay[DP83869_CLK_DELAY_DEF];
---
- dp83869->rx_int_delay = DP83869_CLK_DELAY_DEF;
622,623c597
+ dp83869->tx_int_delay =
+ dp83869_internal_delay[DP83869_CLK_DELAY_DEF];
---
- dp83869->tx_int_delay = DP83869_CLK_DELAY_DEF;
684,692d657
+ }
+ /* Auto neg is not supported in Fiber mode */
+ bmcr = phy_read(phydev, MII_BMCR);
+ if (bmcr < 0)
+ return bmcr;
+ 
+ phydev->autoneg = AUTONEG_DISABLE;
+ linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->supported);
+ linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->advertising);
694,697c659,672
+ if (bmcr & BMCR_ANENABLE) {
+ ret =  phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0);
+ if (ret < 0)
+ return ret;
---
- /* Auto neg is not supported in 100base FX mode */
- bmcr = phy_read(phydev, MII_BMCR);
- if (bmcr < 0)
- return bmcr;
- 
- phydev->autoneg = AUTONEG_DISABLE;
- linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->supported);
- linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->advertising);
- 
- if (bmcr & BMCR_ANENABLE) {
- ret =  phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0);
- if (ret < 0)
- return ret;
- }
720c695,708
+ ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE, dp83869->mode);
---
- phy_ctrl_val = dp83869->mode;
- if (phydev->interface == PHY_INTERFACE_MODE_MII) {
- if (dp83869->mode == DP83869_100M_MEDIA_CONVERT ||
- dp83869->mode == DP83869_RGMII_100_BASE ||
- dp83869->mode == DP83869_RGMII_COPPER_ETHERNET) {
- phy_ctrl_val |= DP83869_OP_MODE_MII;
- } else {
- phydev_err(phydev, "selected op-mode is not valid with MII mode\n");
- return -EINVAL;
- }
- }
- 
- ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE,
- phy_ctrl_val);
734c722,723
+ ret = phy_write(phydev, MII_DP83869_PHYCTRL, phy_ctrl_val);
---
- ret = phy_write(phydev, MII_DP83869_PHYCTRL,
- phy_ctrl_val);
747c736,738
+ ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE, RGMII_to_SGMII);
---
- ret = phy_modify_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE,
- DP83869_SGMII_RGMII_BRIDGE,
- DP83869_SGMII_RGMII_BRIDGE);
751c742,743
+ ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_FX_CTRL, DP83869_FX_CTRL_DEFAULT);
---
- ret = phy_write_mmd(phydev, DP83869_DEVADDR,
- DP83869_FX_CTRL, DP83869_FX_CTRL_DEFAULT);
757c749,750
+ ret = phy_write(phydev, MII_DP83869_PHYCTRL, phy_ctrl_val);
---
- ret = phy_write(phydev, MII_DP83869_PHYCTRL,
- phy_ctrl_val);
761,765c754,755
+ ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE, MEDIA_CONVERT_1000M);
+ if (ret)
+ return ret;
+ 
+ ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_FX_CTRL, DP83869_FX_CTRL_DEFAULT);
---
- ret = phy_write_mmd(phydev, DP83869_DEVADDR,
- DP83869_FX_CTRL, DP83869_FX_CTRL_DEFAULT);
770c760,761
+ ret = phy_write(phydev, MII_DP83869_PHYCTRL, phy_ctrl_val);
---
- ret = phy_write(phydev, MII_DP83869_PHYCTRL,
- phy_ctrl_val);
773,781d763
+ 
+ ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE, MEDIA_CONVERT_100M);
+ if (ret)
+ return ret;
+ 
+ ret = phy_write(phydev, LEDS_CFG1_DP83869, DP83869_LED1_MUX_RXER);
+ if (ret)
+ return ret;
+ 
784,788c766,767
+ ret = phy_write(phydev, MII_DP83869_PHYCTRL, phy_ctrl_val);
+ if (ret)
+ return ret;
+ 
+ ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE, SGMII_to_COPPER);
---
- ret = phy_write(phydev, MII_DP83869_PHYCTRL,
- phy_ctrl_val);
796c775,776
+ ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_FX_CTRL, DP83869_FX_CTRL_DEFAULT);
---
- ret = phy_write_mmd(phydev, DP83869_DEVADDR,
- DP83869_FX_CTRL, DP83869_FX_CTRL_DEFAULT);
892c872
+ 
---
- 
915c895
+ PHY_ID_MATCH_EXACT(_id),				\
---
- PHY_ID_MATCH_MODEL(_id),				\
931,933c911,912
+ static struct phy_driver dp83869_driver[] = {
+ DP83869_PHY_DRIVER(DP83869_REV1_PHY_ID, "TI DP83869 Rev1"),
+ DP83869_PHY_DRIVER(DP83869_REV0_PHY_ID, "TI DP83869 Rev0"),
---
- static struct phy_driver dp83869_driver[] = {
- DP83869_PHY_DRIVER(DP83869_PHY_ID, "TI DP83869"),
935c914
+ 
---
- 
940,942c919,920
+ { PHY_ID_MATCH_EXACT(DP83869_REV0_PHY_ID) },
+ { PHY_ID_MATCH_EXACT(DP83869_REV1_PHY_ID) },
+ { PHY_ID_MATCH_EXACT(DP83561_PHY_ID) },
---
- { PHY_ID_MATCH_MODEL(DP83869_PHY_ID) },
- { PHY_ID_MATCH_MODEL(DP83561_PHY_ID) },
949c927
+ MODULE_LICENSE("GPL v2");
\ No newline at end of file
---
- MODULE_LICENSE("GPL v2");

Thanks

Chris

Hi Chris,

It looks like the DP83869 driver in 9.02 / 9.00 does not yet include the patch for configure_fiber function.

This latest patch includes some additional register configuration to set auto-negotiation / speed settings for fiber mode.

Please let me know if you see similar functional issues after incorporating this into Linux.

Thank you,

Evan

Dear Evan,

I have updated the DP83869 driver and loaded the new Linux image, but the exception issue persists. 

root@am64xx-evm:/boot# ls -l
drwxr-xr-x    3 root     root          4096 Mar  9  2018 EFI
lrwxrwxrwx    1 root     root            37 Mar  9  2018 Image -> Image-6.1.80-rt26-ti-rt-g3c08dbfd7bfd
-rw-r--r--    1 root     root      15444480 Aug  6 08:59 Image-6.1.80-rt26-ti-rt-g3c08dbfd7bfd
-rw-r--r--    1 root     root      15442432 May 10 07:38 Image-6.1.80-rt26-ti-rt-g3c08dbfd7bfd_bkp
drwxr-xr-x    3 root     root          4096 Mar  9  2018 dtb
lrwxrwxrwx    1 root     root            40 Mar  9  2018 fitImage -> fitImage-6.1.80-rt26-ti-rt-g3c08dbfd7bfd
-rw-r--r--    1 root     root       6541690 Mar  9  2018 fitImage-6.1.80-rt26-ti-rt-g3c08dbfd7bfd
root@am64xx-evm:/boot# reboot
         Stopping Session c1 of User root...
[  OK  ] Removed slice Slice /system/dropbear.
[  OK  ] Removed slice Slice /system/modprobe.
[  OK  ] Stopped target Multi-User System.
[  OK  ] Stopped target Login Prompts.
[  OK  ] Stopped target RPC Port Mapper.
[  OK  ] Stopped target System Time Set.
[  OK  ] Stopped target Timer Units.
[  OK  ] Stopped Daily Cleanup of Temporary Directories.
[  OK  ] Stopped target Hardware activated USB gadget.
[  OK  ] Closed Process Core Dump Socket.
[  OK  ] Closed Load/Save RF Kill Switch Status /dev/rfkill Watch.
         Stopping Avahi mDNS/DNS-SD Stack...
         Stopping containerd container runtime...
         Stopping Getty on tty1...
         Stopping Netperf Benchmark Server...
         Stopping NFS status monitor for NFSv2/3 locking....
[  OK  ] Stopped Expand the rootfs …full size of the boot device..
         Stopping Serial Getty on ttyS2...
         Stopping Load/Save Random Seed...
         Stopping TEE Supplicant...
         Stopping Telnet Server...
[  OK  ] Stopped TEE Supplicant.
[  OK  ] Stopped Avahi mDNS/DNS-SD Stack.
[  OK  ] Stopped Netperf Benchmark Server.
[  OK  ] Stopped NFS status monitor for NFSv2/3 locking..
[  OK  ] Stopped containerd container runtime.
[  OK  ] Stopped Getty on tty1.
[  OK  ] Stopped Serial Getty on ttyS2.
[  OK  ] Stopped Load/Save Random Seed.
[  OK  ] Stopped Telnet Server.
[  OK  ] Stopped Session c1 of User root.
[  OK  ] Removed slice Slice /system/getty.
[  OK  ] Removed slice Slice /system/serial-getty.
[  OK  ] Stopped target Host and Network Name Lookups.
         Stopping User Login Management...
         Stopping User Manager for UID 0...
[  OK  ] Stopped User Login Management.
[  OK  ] Stopped User Manager for UID 0.
         Stopping User Runtime Directory /run/user/0...
[  OK  ] Unmounted /run/user/0.
[  OK  ] Stopped User Runtime Directory /run/user/0.
[  OK  ] Removed slice User Slice of UID 0.
         Stopping Permit User Sessions...
[  OK  ] Stopped Permit User Sessions.
[  OK  ] Stopped target Network.
[  OK  ] Stopped target Remote File Systems.
         Stopping Network Name Resolution...
[  OK  ] Stopped Network Name Resolution.
         Stopping Network Configuration...
[  OK  ] Stopped Network Configuration.
[  OK  ] Stopped target Preparation for Network.
[  OK  ] Stopped IPv6 Packet Filtering Framework.
[  OK  ] Stopped IPv4 Packet Filtering Framework.
[  OK  ] Stopped target Basic System.
[  OK  ] Stopped target Path Units.
[  OK  ] Stopped Dispatch Password …ts to Console Directory Watch.
[  OK  ] Stopped Forward Password R…uests to Wall Directory Watch.
[  OK  ] Stopped target Slice Units.
[  OK  ] Removed slice User and Session Slice.
[  OK  ] Stopped target Socket Units.
[  OK  ] Closed Avahi mDNS/DNS-SD Stack Activation Socket.
[  OK  ] Closed Docker Socket for the API.
[  OK  ] Closed dropbear.socket.
[  OK  ] Closed Network Service Netlink Socket.
         Stopping D-Bus System Message Bus...
[  OK  ] Stopped D-Bus System Message Bus.
[  OK  ] Closed D-Bus System Message Bus Socket.
[  OK  ] Stopped target System Initialization.
[  OK  ] Stopped Apply Kernel Variables.
[  OK  ] Stopped Load Kernel Modules.
         Stopping Network Time Synchronization...
[  OK  ] Stopped Network Time Synchronization.
[  OK  ] Stopped Create Volatile Files and Directories.
[  OK  ] Stopped target Local File Systems.
         Unmounting /media/ram...
         Unmounting Temporary Directory /tmp...
         Unmounting /var/volatile...
[  OK  ] Unmounted /media/ram.
[  OK  ] Unmounted Temporary Directory /tmp.
[  OK  ] Unmounted /var/volatile.
[  OK  ] Stopped target Preparation for Local File Systems.
[  OK  ] Stopped target Swaps.
[  OK  ] Reached target Unmount All Filesystems.
[  OK  ] Stopped Remount Root and Kernel File Systems.
[  OK  ] Stopped Create Static Device Nodes in /dev.
[  OK  ] Reached target System Shutdown.
[  OK  ] Reached target Late Shutdown Services.
[  OK  ] Finished System Reboot.
[  OK  ] Reached target System Reboot.
[ 1761.461579] watchdog: watchdog0: nowayout prevents watchdog being stopped!
[ 1761.461602] watchdog: watchdog0: watchdog did not stop!
[ 1761.481536] systemd-shutdown[1]: Using hardware watchdog 'K3 RTI Watchdog', version 0, device /dev/watchdog0
[ 1761.481562] systemd-shutdown[1]: Modifying watchdog timeout is not supported, reusing the programmed timeout.
[ 1761.481582] systemd-shutdown[1]: Watchdog running with a timeout of 1min.
[ 1761.493589] systemd-shutdown[1]: Syncing filesystems and block devices.
[ 1761.499729] systemd-shutdown[1]: Sending SIGTERM to remaining processes...
[ 1761.515215] systemd-journald[146]: Received SIGTERM from PID 1 (systemd-shutdow).
[ 1761.520955] audit: type=1335 audit(1722934840.771:3): pid=146 uid=0 auid=4294967295 tty=(none) ses=4294967295 comm="systemd-journal" exe="/lib/systemd/systemd-journald" nl-mcgrp=1 op=disconnect res=1
[ 1761.551794] systemd-shutdown[1]: Sending SIGKILL to remaining processes...
[ 1761.570030] systemd-shutdown[1]: Unmounting file systems.
[ 1761.573347] [520]: Remounting '/' read-only with options 'n/a'.
[ 1761.588888] EXT4-fs (mmcblk0p1): re-mounted. Quota mode: none.
[ 1761.594398] systemd-shutdown[1]: All filesystems unmounted.
[ 1761.594421] systemd-shutdown[1]: Deactivating swaps.
[ 1761.594660] systemd-shutdown[1]: All swaps deactivated.
[ 1761.594672] systemd-shutdown[1]: Detaching loop devices.
[ 1761.599513] systemd-shutdown[1]: All loop devices detached.
[ 1761.599534] systemd-shutdown[1]: Stopping MD devices.
[ 1761.599889] systemd-shutdown[1]: All MD devices stopped.
[ 1761.599901] systemd-shutdown[1]: Detaching DM devices.
[ 1761.600223] systemd-shutdown[1]: All DM devices detached.
[ 1761.600236] systemd-shutdown[1]: All filesystems, swaps, loop devices, MD devices and DM devices detached.
[ 1761.607440] systemd-shutdown[1]: Syncing filesystems and block devices.
[ 1761.609048] systemd-shutdown[1]: Rebooting.
[ 1761.680006] reboot: Restarting system

U-Boot SPL 2023.04-dirty (May 28 2024 - 11:52:26 +0530)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)')
SPL initial stack usage: 13408 bytes
Trying to boot from MMC1
Authentication passed
Authentication passed
Loading Environment from MMC... OK
init_env from device 9 not supported!
Authentication passed
Authentication passed
Starting ATF on ARM64 core...

NOTICE:  BL31: v2.10.0(release):v2.10.0-367-g00f1ec6b87-dirty
NOTICE:  BL31: Built : 16:09:05, Feb  9 2024
I/TC:
I/TC: OP-TEE version: 4.1.0-51-g012cdca49 (gcc version 11.4.0 (GCC)) #1 Tue Jan 30 10:48:03 UTC 2024 aarch64
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html
I/TC: Primary CPU initializing
I/TC: GIC redistributor base address not provided
I/TC: Assuming default GIC group status and modifier
I/TC: SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)')
I/TC: HUK Initialized
I/TC: Activated SA2UL device
I/TC: Enabled firewalls for SA2UL TRNG device
I/TC: SA2UL TRNG initialized
I/TC: SA2UL Drivers initialized
I/TC: Primary CPU switching to normal world boot

U-Boot SPL 2023.04-dirty (May 28 2024 - 12:12:40 +0530)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)')
Trying to boot from MMC1
Authentication passed
Authentication passed


U-Boot 2023.04-dirty (May 28 2024 - 12:12:40 +0530)

SoC:   AM64X SR2.0 HS-FS
Model: Texas Instruments AM642 EVM
DRAM:  2 GiB
Core:  79 devices, 31 uclasses, devicetree: separate
MMC:   mmc@fa10000: 0
Loading Environment from MMC... OK
In:    serial@2800000
Out:   serial@2800000
Err:   serial@2800000
Failed to probe am65_cpsw_nuss driver
Net:   phy_config() failed: -22prueth icssg1-eth: phy_init failed
No ethernet found.

Hit any key to stop autoboot:  0
switch to partitions #0, OK
mmc0(part 0) is current device
SD/MMC found on device 0
Failed to load 'boot.scr'
Can't set block device
## Error: "main_cpsw0_qsgmii_phyinit" not defined
15444480 bytes read in 199 ms (74 MiB/s)
60036 bytes read in 27 ms (2.1 MiB/s)
Working FDT set to 88000000
## Flattened Device Tree blob at 88000000
   Booting using the fdt blob at 0x88000000
Working FDT set to 88000000
   Loading Device Tree to 000000008feee000, end 000000008fffffff ... OK
Working FDT set to 8feee000

Starting kernel ...

[    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
[    0.000000] Linux version 6.1.80-rt26-dirty (root@ubuntu-2204) (aarch64-oe-linux-gcc (GCC) 11.4.0, GNU ld (GNU Binutils) 2.38.20220708) #1 SMP PREEMPT_RT Tue Aug  6 14:09:03 IST 2024
[    0.000000] Machine model: Texas Instruments AM642 EVM
[    0.000000] earlycon: ns16550a0 at MMIO32 0x0000000002800000 (options '')
[    0.000000] printk: bootconsole [ns16550a0] enabled
[    0.000000] efi: UEFI not found.
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a0000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node r5f-dma-memory@a0000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a0100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node r5f-memory@a0100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a1000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node r5f-dma-memory@a1000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a1100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node r5f-memory@a1100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a2000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node r5f-dma-memory@a2000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a2100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node r5f-memory@a2100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a3000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node r5f-dma-memory@a3000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a3100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node r5f-memory@a3100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a4000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node m4f-dma-memory@a4000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a4100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node m4f-memory@a4100000, compatible id shared-dma-pool
[    0.000000] Zone ranges:
[    0.000000]   DMA      [mem 0x0000000080000000-0x00000000ffffffff]
[    0.000000]   DMA32    empty
[    0.000000]   Normal   empty
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000080000000-0x000000009e7fffff]
[    0.000000]   node   0: [mem 0x000000009e800000-0x00000000a57fffff]
[    0.000000]   node   0: [mem 0x00000000a5800000-0x00000000ffffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x00000000ffffffff]
[    0.000000] cma: Reserved 32 MiB at 0x00000000fbe00000
[    0.000000] psci: probing for conduit method from DT.
[    0.000000] psci: PSCIv1.1 detected in firmware.
[    0.000000] psci: Using standard PSCI v0.2 function IDs
[    0.000000] psci: Trusted OS migration not required
[    0.000000] psci: SMC Calling Convention v1.4
[    0.000000] percpu: Embedded 20 pages/cpu s44928 r8192 d28800 u81920
[    0.000000] Detected VIPT I-cache on CPU0
[    0.000000] CPU features: detected: GIC system register CPU interface
[    0.000000] CPU features: kernel page table isolation disabled by kernel configuration
[    0.000000] CPU features: detected: ARM erratum 845719
[    0.000000] alternatives: applying boot alternatives
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 516096
[    0.000000] Kernel command line: console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000 omap2-nand.0:2m(NAND.tiboot3),2m(NAND.tispl),2m(NAND.tiboot3.backup),4m(NAND.u-boot),256k(NAND.u-boot-env),256k(NAND.u-boot-env.backup),-(NAND.file-system) root=PARTUUID=d1ce0046-79e1-4258-8b97-85b8df75ece8 rw rootfstype=ext4 rootwait
[    0.000000] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
[    0.000000] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] Memory: 1897772K/2097152K available (9792K kernel code, 1194K rwdata, 2244K rodata, 1728K init, 420K bss, 166612K reserved, 32768K cma-reserved)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[    0.000000] rcu: Preemptible hierarchical RCU implementation.
[    0.000000] rcu:     RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=2.
[    0.000000] rcu:     RCU_SOFTIRQ processing moved to rcuc kthreads.
[    0.000000]  No expedited grace period (rcu_normal_after_boot).
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 100 jiffies.
[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[    0.000000] GICv3: GIC: Using split EOI/Deactivate mode
[    0.000000] GICv3: 256 SPIs implemented
[    0.000000] GICv3: 0 Extended SPIs implemented
[    0.000000] Root IRQ handler: 0xffff800008411560
[    0.000000] GICv3: GICv3 features: 16 PPIs
[    0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000000001840000
[    0.000000] ITS [mem 0x01820000-0x0182ffff]
[    0.000000] GIC: enabling workaround for ITS: Socionext Synquacer pre-ITS
[    0.000000] ITS@0x0000000001820000: Devices Table too large, reduce ids 20->19
[    0.000000] ITS@0x0000000001820000: allocated 524288 Devices @80800000 (flat, esz 8, psz 64K, shr 0)
[    0.000000] ITS: using cache flushing for cmd queue
[    0.000000] GICv3: using LPI property table @0x0000000080030000
[    0.000000] GIC: using cache flushing for LPI property table
[    0.000000] GICv3: CPU0: using allocated LPI pending table @0x0000000080040000
[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
[    0.000000] arch_timer: cp15 timer(s) running at 200.00MHz (phys).
[    0.000000] clocksource: arch_sys_counter: mask: 0x3ffffffffffffff max_cycles: 0x2e2049d3e8, max_idle_ns: 440795210634 ns
[    0.000001] sched_clock: 58 bits at 200MHz, resolution 5ns, wraps every 4398046511102ns
[    0.000275] Console: colour dummy device 80x25
[    0.540242] Calibrating delay loop (skipped), value calculated using timer frequency.. 400.00 BogoMIPS (lpj=200000)
[    0.540253] pid_max: default: 32768 minimum: 301
[    0.540354] LSM: Security Framework initializing
[    0.540494] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
[    0.540519] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
[    0.542357] rcu: Hierarchical SRCU implementation.
[    0.542366] rcu:     Max phase no-delay instances is 400.
[    0.542412] printk: bootconsole [ns16550a0] printing thread started
n[/  T C: 0 S.5e9c4o8nd6a4]ry  PlCaPtU fo1r mi nMiStiI:a lmiszii-ngco
 trIo/TllCe:r S@e18co2n0d0a0r0y d ComPaU in1  csrweiatctheidn
I [t  o   n0o.r5m9a5l1 w5o1r] lPdC bI/ooMSt
 : /bus@f4000/interrupt-controller@1800000/msi-controller@1820000 domain created
[    0.595265] EFI services will not be available.
[    0.595535] smp: Bringing up secondary CPUs ...
[    0.612482] Detected VIPT I-cache on CPU1
[    0.612614] GICv3: CPU1: found redistributor 1 region 0:0x0000000001860000
[    0.612631] GICv3: CPU1: using allocated LPI pending table @0x0000000080050000
[    0.612688] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
[    0.654013] smp: Brought up 1 node, 2 CPUs
[    0.654023] SMP: Total of 2 processors activated.
[    0.654029] CPU features: detected: 32-bit EL0 Support
[    0.654033] CPU features: detected: CRC32 instructions
[    0.654080] CPU: All CPU(s) started at EL2
[    0.654083] alternatives: applying system-wide alternatives
[    0.655646] devtmpfs: initialized
[    0.668381] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000 ns
[    0.668405] futex hash table entries: 512 (order: 3, 32768 bytes, linear)
[    0.670113] pinctrl core: initialized pinctrl subsystem
[    0.670810] DMI not present or invalid.
[    0.671404] NET: Registered PF_NETLINK/PF_ROUTE protocol family
[    0.699330] DMA: preallocated 256 KiB GFP_KERNEL pool for atomic allocations
[    0.699572] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
[    0.699782] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
[    0.699951] audit: initializing netlink subsys (disabled)
[    0.700850] thermal_sys: Registered thermal governor 'step_wise'
[    0.701107] ASID allocator initialised with 65536 entries
[    0.710079] audit: type=2000 audit(0.698:1): state=initialized audit_enabled=0 res=1
[    0.722498] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
[    0.722509] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
[    0.722514] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
[    0.722518] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
[    0.722522] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
[    0.722525] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
[    0.722530] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
[    0.722534] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
[    0.727409] k3-chipinfo 43000014.chipid: Family:AM64X rev:SR2.0 JTAGID[0x1bb3802f] Detected
[    0.729337] iommu: Default domain type: Translated
[    0.729348] iommu: DMA domain TLB invalidation policy: strict mode
[    0.729729] SCSI subsystem initialized
[    0.730161] usbcore: registered new interface driver usbfs
[    0.730330] usbcore: registered new interface driver hub
[    0.730365] usbcore: registered new device driver usb
[    0.730841] pps_core: LinuxPPS API ver. 1 registered
[    0.730845] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    0.730863] PTP clock support registered
[    0.730993] EDAC MC: Ver: 3.0.0
[    0.731991] omap-mailbox 29020000.mailbox: omap mailbox rev 0x66fc9100
[    0.732326] omap-mailbox 29040000.mailbox: omap mailbox rev 0x66fc9100
[    0.732522] omap-mailbox 29060000.mailbox: omap mailbox rev 0x66fc9100
[    0.733023] FPGA manager framework
er   0.733148]I /AdTvC:an cReeds erLivendux  sShaourendd  Amrecmohirty eicstu reen aDbrlievd
   II/nTitCi: aDliynzaedm.ic
ce[ h a r ed0 .m73em44o1r5y ]i scl eocnkasboleudr
  : IS/wTCit:c hNeodrm atol  Wcloorcldks ovuirrtceu alairzcha_tsiyosn _scuouppnoterrt
2s[  d  i s0ab.l73e4d7
s7]I/ VTFCS::  AsDiysnck hrquonootuass  ndoqtuoift_ic6a.6ti.o0n
] a[r e    di0.s7ab3l47e6d9
  VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[    0.742576] NET: Registered PF_INET protocol family
[    0.742863] IP idents hash table entries: 32768 (order: 6, 262144 bytes, linear)
[    0.745013] tcp_listen_portaddr_hash hash table entries: 1024 (order: 3, 40960 bytes, linear)
[    0.745066] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
[    0.745081] TCP established hash table entries: 16384 (order: 5, 131072 bytes, linear)
[    0.745331] TCP bind hash table entries: 16384 (order: 8, 1310720 bytes, linear)
[    0.746828] TCP: Hash tables configured (established 16384 bind 16384)
[    0.747051] UDP hash table entries: 1024 (order: 4, 98304 bytes, linear)
[    0.747206] UDP-Lite hash table entries: 1024 (order: 4, 98304 bytes, linear)
[    0.747595] NET: Registered PF_UNIX/PF_LOCAL protocol family
[    0.748305] RPC: Registered named UNIX socket transport module.
[    0.748313] RPC: Registered udp transport module.
[    0.748316] RPC: Registered tcp transport module.
[    1.036[    0.748319] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    0.748331] PCI: CLS 0 bytes, default 64
[    0.782347] Initialise system trusted keyrings
[    0.782635] workingset: timestamp_bits=62 max_order=19 bucket_o641] printk: console [ttyS2] printing thread started
rder=0
[    1.036661] printk: console [ttyS2] enabled
[    1.036666] printk: bootconsole [ns16550a0] disabled
[    1.063906] printk: bootconsole [ns16550a0] printing thread stopped
[    1.071312] am65-cpts 39000000.cpts: CPTS ver 0x4e8a010c, freq:500000000, add_val:1 pps:0
[    1.073153] mmc0: CQHCI version 5.10
[    1.078270] pca953x 1-0022: supply vcc not found, using dummy regulator
[    1.078483] pca953x 1-0022: using AI
[    1.090471] pca953x 1-0022: failed writing register
[    1.090734] pca953x: probe of 1-0022 failed with error -121
[    1.091031] pca953x 1-0023: supply vcc not found, using dummy regulator
[    1.091226] pca953x 1-0023: using AI
[    1.091327] pca953x 1-0023: failed writing register
[    1.091535] pca953x: probe of 1-0023 failed with error -121
[    1.092930] debugfs: Directory 'pd:114' with parent 'pm_genpd' already present!
[    1.102483] ALSA device list:
[    1.102496]   No soundcards found.
[    1.115637] mmc0: SDHCI controller on fa10000.mmc [fa10000.mmc] using ADMA 64-bit
[    1.115910] Waiting for root device PARTUUID=d1ce0046-79e1-4258-8b97-85b8df75ece8...
[    1.261288] mmc0: Command Queue Engine enabled
[    1.261315] mmc0: new DDR MMC card at address 0001
[    1.262181] mmcblk0: mmc0:0001 00020G 19.2 GiB
[    1.266249]  mmcblk0: p1
[    1.267090] mmcblk0boot0: mmc0:0001 00020G 31.5 MiB
[    1.268651] mmcblk0boot1: mmc0:0001 00020G 31.5 MiB
[    1.270024] mmcblk0rpmb: mmc0:0001 00020G 4.00 MiB, chardev (240:0)
[    1.282540] EXT4-fs (mmcblk0p1): mounted filesystem with ordered data mode. Quota mode: none.
[    1.282635] VFS: Mounted root (ext4 filesystem) on device 179:1.
[    1.285559] devtmpfs: mounted
[    1.286763] Freeing unused kernel memory: 1728K
[    1.286894] Run /sbin/init as init process
[    1.424269] systemd[1]: System time before build time, advancing clock.
[    1.505267] NET: Registered PF_INET6 protocol family
[    1.507536] Segment Routing with IPv6
[    1.507580] In-situ OAM (IOAM) with IPv6
[    1.524287] systemd[1]: systemd 250.5+ running in system mode (+PAM -AUDIT -SELINUX -APPARMOR +IMA -SMACK +SECCOMP -GCRYPT -GNUTLS -OPENSSL +ACL +BLKID -CURL -ELFUTILS -FIDO2 -IDN2 -IDN -IPTC +KMOD -LIBCRYPTSETUP +LIBFDISK -PCRE2 -PWQUALITY -P11KIT -QRENCODE -BZIP2 -LZ4 -XZ -ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=hybrid)

Welcome to Arago 2023.10!

[    1.525021] systemd[1]: Detected architecture arm64.
[    1.566186] systemd[1]: Hostname set to <am64xx-evm>.
[    1.706739] systemd-sysv-generator[136]: SysV service '/etc/init.d/thermal-zone-init' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package to include a native systemd unit file, in order to make it more safe and robust.
[    2.058633] systemd[1]: /etc/systemd/system/sync-clocks.service:11: Standard output type syslog is obsolete, automatically updating to journal. Please update your unit file, and consider removing the setting altogether.
[    2.139530] systemd[1]: Queued start job for default target Multi-User System.
[    2.164202] systemd[1]: Created slice Slice /system/getty.
[  OK  ] Created slice Slice /system/getty.
[  OK  ] Created slice Slice /system/modprob[    2.180694] systemd[1]: Created slice Slice /system/modprobe.
e.
[  OK  ] Created slice Slice /system/serial-[    2.196623] systemd[1]: Created slice Slice /system/serial-getty.
getty.
[  OK  ] Created slice User and Session Slic[    2.213067] systemd[1]: Created slice User and Session Slice.
e.
[    2.228140] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
[  OK  ] Started Dispatch Password …ts to Console Directory Watch.
[  OK  ] Started Forward Password R…uests [    2.248080] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
to Wall Directory Watch.
[  OK  ] Reached target Path Units.[    2.265123] systemd[1]: Reached target Path Units.

[  OK  ] Reached target Remote File Systems systemd[1]: Reached target Remote File Systems.
[0m.
[  OK  ] Reached target Slice Units.
[    2.292763] systemd[1]: Reached target Slice Units.
[  OK  ] Reached target Swaps.
[    2.303691] systemd[1]: Reached target Swaps.
[    2.318366] systemd[1]: Listening on RPCbind Server Activation Socket.
[  OK  ] Listening on RPCbind Server Activation Socket.
[  OK  ] Reached target RPC Port Mapper.[    2.333760] systemd[1]: Reached target RPC Port Mapper.

[  OK  ] Listening on Process Core Dump Sock[    2.356484] systemd[1]: Listening on Process Core Dump Socket.
et.
[    2.371200] systemd[1]: Listening on initctl Compatibility Named Pipe.
[  OK  ] Listening on initctl Compatibility Named Pipe.
[  OK  ] Listening on Journal Audit Socket    2.387922] systemd[1]: Listening on Journal Audit Socket.
0m.
[  OK  ] Listening on Journal Socket (/dev/l[    2.402613] systemd[1]: Listening on Journal Socket (/dev/log).
og).
[  OK  ] Listening on Journal Socket.
[    2.418741] systemd[1]: Listening on Journal Socket.
[  OK  ] Listening on Network Service Netlin[    2.430991] systemd[1]: Listening on Network Service Netlink Socket.
k Socket.
[    2.448195] systemd[1]: Listening on udev Control Socket.
[  OK  ] Listening on udev Control Socket.
[    2.463377] systemd[1]: Listening on udev Kernel Socket.
[  OK  ] Listening on udev Kernel Socket.
[  OK  ] Listening on User Database Manager [    2.478676] systemd[1]: Listening on User Database Manager Socket.
Socket.
[    2.503146] systemd[1]: Mounting Huge Pages File System...
         Mounting Huge Pages File System...
         Mounting POSIX Message Queue File System..[    2.525066] systemd[1]: Mounting POSIX Message Queue File System...
.
[    2.549117] systemd[1]: Mounting Kernel Debug File System...
         Mounting Kernel Debug File System...
[    2.563236] systemd[1]: Kernel Trace File System was skipped because of a failed condition check (ConditionPathExists=/sys/kernel/tracing).
[    2.585156] systemd[1]: Mounting Temporary Directory /tmp...
         Mounting Temporary Directory /tmp...
         Starting Create List of Static Device Nodes    2.609579] systemd[1]: Starting Create List of Static Device Nodes...
m...
         Starting Load Kernel Module configfs...
[    2.633614] systemd[1]: Starting Load Kernel Module configfs...
         Starting Load Kernel Module drm...
[    2.656731] systemd[1]: Starting Load Kernel Module drm...
         Starting Load Kernel Module fuse...
[    2.677754] systemd[1]: Starting Load Kernel Module fuse...
         Starting RPC Bind...
[    2.705833] systemd[1]: Starting RPC Bind...
[    2.715008] systemd[1]: File System Check on Root Device was skipped because of a failed condition check (ConditionPathIsReadWrite=!/).
[    2.719594] systemd[1]: systemd-journald.service: unit configures an IP firewall, but the local system does not support BPF/cgroup firewalling.
[    2.719623] systemd[1]: (This warning is only shown for the first unit using IP firewalling.)
         Starting Journal Service...
[    2.723738] fuse: init (API version 7.37)
[    2.747841] systemd[1]: Starting Journal Service...
         Starting Load Kernel Modules...[    2.781782] systemd[1]: Starting Load Kernel Modules...

         Starting Generate network …ts from Kernel co[    2.805570] systemd[1]: Starting Generate network units from Kernel command line...
mmand line...
         Starting Remount Root and Kernel File Systems systemd[1]: Starting Remount Root and Kernel File Systems...
[0m...
[    2.861227] systemd[1]: Starting Coldplug All udev Devices...
         Starting Coldplug All udev Devices...
[  OK  ] Started RPC Bind.
[    2.892126] systemd[1]: Started RPC Bind.
[  OK  ] Started Journal Service.
[    2.904383] systemd[1]: Started Journal Service.
[    2.933279] EXT4-fs (mmcblk0p1): re-mounted. Quota mode: none.
[  OK  ] Mounted Huge Pages File System.
[  OK  ] Mounted POSIX Message Queue File System.
[  OK  ] Mounted Kernel Debug File System.
[  OK  ] Mounted Temporary Directory /tmp.
[  OK  ] Finished Create List of Static Device Nodes.
[  OK  ] Finished Load Kernel Module configfs.
[  OK  ] Finished Load Kernel Module drm.
[  OK  ] Finished Load Kernel Module fuse.
[  OK  ] Finished Load Kernel Modules.
[  OK  ] Finished Generate network units from Kernel command line.
[  OK  ] Finished Remount Root and Kernel File Systems.
         Mounting FUSE Control File System...
         Mounting Kernel Configuration File System...
         Starting Flush Journal to Persistent Storage...
         Starting Apply Kernel Variables...
[    3.173544] systemd-journald[146]: Received client request to flush runtime journal.
         Starting Create Static Device Nodes in /dev...
[  OK  ] Mounted FUSE Control File System.
[  OK  ] Mounted Kernel Configuration File System.
[  OK  ] Finished Flush Journal to Persistent Storage.
[  OK  ] Finished Apply Kernel Variables.
[  OK  ] Finished Create Static Device Nodes in /dev.
[  OK  ] Reached target Preparation for Local File Systems.
         Mounting /media/ram...
         Mounting /var/volatile...
         Starting Rule-based Manage…for Device Events and Files...
[  OK  ] Mounted /media/ram.
[  OK  ] Mounted /var/volatile.
         Starting Load/Save Random Seed...
[  OK  ] Reached target Local File Systems.
         Starting Create Volatile Files and Directories...
[  OK  ] Finished Create Volatile Files and Directories.
         Starting Network Time Synchronization...
         Starting Record System Boot/Shutdown in UTMP...
[  OK  ] Started Rule-based Manager for Device Events and Files.
[  OK  ] Finished Record System Boot/Shutdown in UTMP.
[    3.742483] random: crng init done
[  OK  ] Finished Coldplug All udev Devices.
[  OK  ] Finished Load/Save Random Seed.
[    4.097142] systemd-journald[146]: Oldest entry in /run/log/journal/b9779b948ba64cc88433fe12171d068b/system.journal is older than the configured file retention duration (1month), suggesting rotation.
[  OK  ] Started Network Time Synchronizatio[    4.097172] systemd-journald[146]: /run/log/journal/b9779b948ba64cc88433fe12171d068b/system.journal: Journal header limits reached or header out-of-date, rotating.
n.
[  OK  ] Reached target System Initialization.
[  OK  ] Started Daily Cleanup of Temporary Directories.
[  OK  ] Reached target System Time Set.
[  OK  ] Reached target Timer Units.
[  OK  ] Listening on Avahi mDNS/DNS-SD Stack Activation Socket.
[  OK  ] Listening on D-Bus System Message Bus Socket.
         Starting Docker Socket for the API...
[  OK  ] Listening on dropbear.socket.
         Starting D-Bus System Message Bus...
[  OK  ] Listening on Docker Socket for the API.
[  OK  ] Reached target Socket Units.
[    4.355935] CAN device driver interface
[  OK  ] Found device /dev/ttyS2.
[    4.466812] lm75 0-0048: supply vs not found, using dummy regulator
[    4.466811] at24 0-0050: supply vcc not found, using dummy regulator
[    4.469961] hwmon hwmon0: temp1_input not attached to any thermal zone
[    4.469980] lm75 0-0048: hwmon0: sensor 'tmp100'
[    4.492684] pcf85363 0-0051: registered as rtc0
[    4.493779] at24 0-0050: 65536 byte 24c512 EEPROM, writable, 128 bytes/write
[    4.494889] pcf85363 0-0051: setting system clock to 2024-08-06T09:00:50 UTC (1722934850)
[    4.609818] davinci_mdio 300b2400.mdio: Configuring MDIO in manual mode
[    4.654880] k3-m4-rproc 5000000.m4fss: assigned reserved memory node m4f-dma-memory@a4000000
[    4.661507] davinci_mdio 300b2400.mdio: davinci mdio revision 1.7, bus freq 1000000
[    4.665600] k3-m4-rproc 5000000.m4fss: configured M4 for remoteproc mode
[    4.666489] k3-m4-rproc 5000000.m4fss: local reset is deasserted for device
[    4.671062] remoteproc remoteproc0: 5000000.m4fss is available
[    4.673136] remoteproc remoteproc0: Direct firmware load for am64-mcu-m4f0_0-fw failed with error -2
[    4.673171] remoteproc remoteproc0: powering up 5000000.m4fss
[    4.673216] remoteproc remoteproc0: Direct firmware load for am64-mcu-m4f0_0-fw failed with error -2
[    4.673226] remoteproc remoteproc0: request_firmware failed: -2
[    4.735091] davinci_mdio 300b2400.mdio: phy[3]: device 300b2400.mdio:03, driver TI DP83869 Rev1
[    4.735112] davinci_mdio 300b2400.mdio: phy[15]: device 300b2400.mdio:0f, driver TI DP83869 Rev1
[    4.853571] platform 78000000.r5f: configured R5F for remoteproc mode
[    4.853983] platform 78000000.r5f: assigned reserved memory node r5f-dma-memory@a0000000
[    4.858181] remoteproc remoteproc1: 78000000.r5f is available
[  OK  ] Started D-Bus System Message Bus    4.858498] remoteproc remoteproc1: Direct firmware load for am64-main-r5f0_0-fw failed with error -2
m.
[    4.858518] remoteproc remoteproc1: powering up 78000000.r5f
[    4.858556] remoteproc remoteproc1: Direct firmware load for am64-main-r5f0_0-fw failed with error -2
[    4.858566] remoteproc remoteproc1: request_firmware failed: -2
[    4.961059] m_can_platform 20701000.can: m_can device registered (irq=403, version=32)
[  OK  ] Reached target Basic System.
         Starting Print notice about GPLv3 packages...
[    5.081678] remoteproc remoteproc2: 3000a000.txpru is available
         Starting IPv6 Packet Filtering Framework..[    5.082214] remoteproc remoteproc3: 3000c000.txpru is available
.
         Starting IPv4 Packet Filtering Framework...
[    5.087152] remoteproc remoteproc4: 3008a000.txpru is available
         Starting Expand the rootfs…ll size of the bo[    5.090900] remoteproc remoteproc5: 3008c000.txpru is available
ot device....
         Starting User Login Management...
[  OK  ] Started TEE Supplicant.
         Starting Telnet Server...
[  OK  ] Finished IPv6 Packet Filtering Framework.
[  OK  ] Finished IPv4 Packet Filtering Framework.
[  OK  ] Finished Telnet Server.
[  OK  ] Finished Expand the rootfs…full size of the boot device..
[  OK  ] Reached target Preparation for Network.
         Starting Network Configuration...
[    6.747624] remoteproc remoteproc6: 30004000.rtu is available
[    6.754702] remoteproc remoteproc7: 30038000.pru is available
[    6.756363] remoteproc remoteproc8: 30006000.rtu is available
[    6.759868] remoteproc remoteproc9: 30034000.pru is available
[    6.762162] remoteproc remoteproc10: 300b4000.pru is available
[    6.772377] remoteproc remoteproc11: 30084000.rtu is available
[  OK  ] Started User Login Management.[    6.776094] remoteproc remoteproc12: 300b8000.pru is available

[    6.789702] remoteproc remoteproc13: 30086000.rtu is available
[    6.841269] icssg-prueth icssg1-eth: port 1: using random MAC addr: 22:2b:2b:fb:d9:00
[    6.853774] icssg-prueth icssg1-eth: port 2: using random MAC addr: ba:96:ac:6d:80:66
[    6.861876] TI DP83869 Rev1 300b2400.mdio:0f: attached PHY driver (mii_bus:phy_addr=300b2400.mdio:0f, irq=POLL)
[    6.882503] k3_r5_rproc bus@f4000:r5fss@78000000: Timed out waiting for 78000000.r5f core to power up!
[    6.887751] platform 78400000.r5f: configured R5F for remoteproc mode
[    6.888170] platform 78400000.r5f: assigned reserved memory node r5f-dma-memory@a2000000
[    6.900704] remoteproc remoteproc14: 78400000.r5f is available
[    6.901385] remoteproc remoteproc14: Direct firmware load for am64-main-r5f1_0-fw failed with error -2
[    6.901482] remoteproc remoteproc14: powering up 78400000.r5f
[    6.901561] remoteproc remoteproc14: Direct firmware load for am64-main-r5f1_0-fw failed with error -2
[    6.901573] remoteproc remoteproc14: request_firmware failed: -2
[    6.937610] TI DP83869 Rev1 300b2400.mdio:03: attached PHY driver (mii_bus:phy_addr=300b2400.mdio:03, irq=POLL)
[    6.937655] icssg-prueth icssg1-eth: TI PRU ethernet driver initialized: dual EMAC mode
[    7.101524] m_can_platform 20701000.can main_mcan0: renamed from can0
[    7.348496] cfg80211: Loading compiled-in X.509 certificates for regulatory database
[    7.449596] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
[    7.457910] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
[  OK  ] Reached target Hardware activated USB gadget.
[  OK  ] Listening on Load/Save RF …itch Status /dev/rfkill Watch.
[    7.458106] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
[    7.458129] cfg80211: failed to load regulatory.db
[  OK  ] Started Network Configuration.
         Starting Network Name Resolution...
[    7.680989] remoteproc remoteproc10: powering up 300b4000.pru
[    7.689864] remoteproc remoteproc10: Booting fw image ti-pruss/am65x-sr2-pru0-prueth-fw.elf, size 40816
[    7.689899] remoteproc remoteproc10: unsupported resource 5
[    7.689928] remoteproc remoteproc10: remote processor 300b4000.pru is now up
[    7.689972] remoteproc remoteproc11: powering up 30084000.rtu
[    7.693636] remoteproc remoteproc11: Booting fw image ti-pruss/am65x-sr2-rtu0-prueth-fw.elf, size 30888
[    7.693704] remoteproc remoteproc11: remote processor 30084000.rtu is now up
[    7.693754] remoteproc remoteproc4: powering up 3008a000.txpru
***************************************************************[    7.695043] remoteproc remoteproc4: Booting fw image ti-pruss/am65x-sr2-txpru0-prueth-fw.elf, size 36672

**************************************************************[    7.695106] remoteproc remoteproc4: remote processor 3008a000.txpru is now up
*
NOTICE: This file system contains the following GPL-3.0 packa[    7.695394] remoteproc remoteproc12: powering up 300b8000.pru
ges:
        bash
        cifs-utils
        dosfstools
        grub-common
        grub-edite[    7.702584] remoteproc remoteproc12: Booting fw image ti-pruss/am65x-sr2-pru1-prueth-fw.elf, size 41092
nv
        grub-efi
        less
        libdw1
        libelf1
        libgcc1
        libreadline8[    7.702630] remoteproc remoteproc12: unsupported resource 5

        libstdc++6
        parted

If you do not wish to distribute GPL-3[    7.702662] remoteproc remoteproc12: remote processor 300b8000.pru is now up
.0 components please remove
the above packages prior to distrib[    7.702703] remoteproc remoteproc13: powering up 30086000.rtu
ution.  This can be done using
[    7.703841] remoteproc remoteproc13: Booting fw image ti-pruss/am65x-sr2-rtu1-prueth-fw.elf, size 30124

    opkg remove <package>
Where <package> is the name printed [    7.703902] remoteproc remoteproc13: remote processor 30086000.rtu is now up
in the list above

NOTE: If the package is a dependency of ano[    7.703950] remoteproc remoteproc5: powering up 3008c000.txpru
ther package you
      will be notified of the dependent packag[    7.707225] remoteproc remoteproc5: Booting fw image ti-pruss/am65x-sr2-txpru1-prueth-fw.elf, size 35184
es.  You should
      use the --force-removal-of-dependent-pack[    7.707283] remoteproc remoteproc5: remote processor 3008c000.txpru is now up
ages option to
      also remove the dependent packages as well[    7.708828] pps pps0: new PPS source ptp1

**************************************************************[    7.834679] Internal error: SP/PC alignment exception: 000000008a000000 [#1] PREEMPT_RT SMP
*
*************************************************************[    7.834699] Modules linked in: cfg80211 rfkill cdns3 cdns_usb_common irq_pruss_intc crct10dif_ce icssg_prueth pru_rproc hsr icss_iep phy_can_transceiver cdns3_ti rti_wdt ti_k3_r5_remoteproc(+) virtio_rpmsg_bus rpmsg_ns ti_k3_m4_remoteproc ti_k3_common k3_j72xx_bandgap lm75 at24 rtc_pcf85363 pruss sa2ul m_can_platform m_can can_dev fuse drm drm_panel_orientation_quirks ipv6
**
[    7.834824] CPU: 1 PID: 9 Comm: kworker/u4:0 Not tainted 6.1.80-rt26-dirty #1
[  OK  ] Started Network Name Resolution[    7.834834] Hardware name: Texas Instruments AM642 EVM (DT)
.
[    7.834838] Workqueue: events_power_efficient 0xffff800008623c75
[    7.834848] pstate: 40000005 (nZcv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[    7.834857] pc : 0xffff800008623c75
[  OK  ] Finished Print notice about GPLv3 p[    7.834860] lr : 0xffff800008050940
ackages.
[    7.834862] sp : ffff0000000ffdc0
[    7.834865] x29: ffff0000000ffdc0 x28: 0000000000000000 x27: 0000000000000000
[    7.834876] x26: ffff800008d98000 x25: ffff000000005105 x24: ffff0000018b6ca8
[    7.834886] x23: ffff000000005100 x22: ffff000000008000 x21: 0000000000000000
[  OK  ] Reached target Network.[    7.834896] x20: ffff000000061800 x19: ffff0000018b6ca0 x18: 0000018c0fed15cf

[    7.834907] x17: 000633199a405584 x16: 0000000000000008 x15: ffff8000089a9b18
[    7.834916] x14: 0000000000000003 x13: 000000000003e0f9 x12: 00000000d744fcc9
[    7.834926] x11: 0000000000000000 x10: 00000000a93cb17d x9 : ffff0000010ebcc0
[    7.834936] x8 : 0000000000027a1a x7 : 0000000000000003 x6 : 0000000000000000
[    7.834945] x5 : ffff800008b6e5b8 x4 : ffff800008b6e5b8 x3 : ffff0000017fb000
[    7.834956] x2 : 0000000100000000 x1 : ffff800008623c75 x0 : ffff0000018b6ca0
[  OK  ] Reached target Host and Network Nam[    7.834967] Call trace:
e Lookups.
[    7.834970]  0xffff800008623c75
[    7.834973]  0xffff800008050bc4
[    7.834976]  0xffff8000080584a4
[    7.834979]  0xffff800008014cb0
[    7.834986] Code: c0a8c17b 00d65f03 c0528000 fdd65f03 (fda9bb7b)
[    7.834993] ---[ end trace 0000000000000000 ]---
         Starting Avahi mDNS/DNS-SD Stack...
         Starting containerd container runtime...
[  OK  ] Started Netperf Benchmark Server.
[  OK  ] Started NFS status monitor for NFSv2/3 locking..
         Starting Permit User Sessions...
[  OK  ] Finished Permit User Sessions.
[  OK  ] Started Avahi mDNS/DNS-SD Stack.
[  OK  ] Started Getty on tty1.
[  OK  ] Started Serial Getty on ttyS2.
[  OK  ] Reached target Login Prompts.
         Starting Synchronize System and HW clocks...
[    8.930475] k3_r5_rproc bus@f4000:r5fss@78400000: Timed out waiting for 78400000.r5f core to power up!
[  OK  ] Finished Synchronize System and HW clocks.
[  OK  ] Started containerd container runtime.
[  OK  ] Reached target Multi-User System.
         Starting Record Runlevel Change in UTMP...
[  OK  ] Finished Record Runlevel Change in UTMP.

 _____                    _____           _         _
|  _  |___ ___ ___ ___   |  _  |___ ___  |_|___ ___| |_
|     |  _| .'| . | . |  |   __|  _| . | | | -_|  _|  _|
|__|__|_| |__,|_  |___|  |__|  |_| |___|_| |___|___|_|
              |___|                    |___|

Arago Project am64xx-evm -

Arago 2023.10 am64xx-evm -

am64xx-evm login: [   10.787043] icssg-prueth icssg1-eth eth1: Link is Up - 1Gbps/Full - flow control off
[   10.787127] IPv6: ADDRCONF(NETDEV_CHANGE): eth1: link becomes ready

am64xx-evm login:
am64xx-evm login: root
[  814.060159] audit: type=1006 audit(1722935660.494:2): pid=450 uid=0 old-auid=4294967295 auid=0 tty=(none) old-ses=4294967295 ses=1 res=1
[  814.060193] audit: type=1300 audit(1722935660.494:2): arch=c00000b7 syscall=64 success=yes exit=1 a0=8 a1=fffffd32f708 a2=1 a3=0 items=0 ppid=1 pid=450 auid=0 uid=0 gid=0 euid=0 suid=0 fsuid=0 egid=0 sgid=0 fsgid=0 tty=(none) ses=1 comm="(systemd)" exe="/lib/systemd/systemd" key=(null)
[  814.060208] audit: type=1327 audit(1722935660.494:2): proctitle="(systemd)"
root@am64xx-evm:~#
root@am64xx-evm:~# ifconfig
eth0      Link encap:Ethernet  HWaddr 86:1A:06:0F:F9:7F
          UP BROADCAST MULTICAST  MTU:1500  Metric:1
          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
          TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:0 (0.0 B)  TX bytes:0 (0.0 B)

eth1      Link encap:Ethernet  HWaddr 92:01:74:2B:1D:F9
          inet addr:192.168.29.4  Bcast:192.168.29.255  Mask:255.255.255.0
          inet6 addr: 2405:201:f020:501e:9001:74ff:fe2b:1df9/64 Scope:Global
          inet6 addr: fe80::9001:74ff:fe2b:1df9/64 Scope:Link
          UP BROADCAST RUNNING MULTICAST  MTU:1500  Metric:1
          RX packets:4198 errors:0 dropped:229 overruns:0 frame:0
          TX packets:296 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:356345 (347.9 KiB)  TX bytes:26527 (25.9 KiB)

lo        Link encap:Local Loopback
          inet addr:127.0.0.1  Mask:255.0.0.0
          inet6 addr: ::1/128 Scope:Host
          UP LOOPBACK RUNNING  MTU:65536  Metric:1
          RX packets:93 errors:0 dropped:0 overruns:0 frame:0
          TX packets:93 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:7714 (7.5 KiB)  TX bytes:7714 (7.5 KiB)

root@am64xx-evm:~#
root@am64xx-evm:~# uname -a
Linux am64xx-evm 6.1.80-rt26-dirty #1 SMP PREEMPT_RT Tue Aug  6 14:09:03 IST 2024 aarch64 GNU/Linux
root@am64xx-evm:~# dmesg | grep "fail"
[    0.992703] tps65219: probe of 0-0030 failed with error -22
[    1.090471] pca953x 1-0022: failed writing register
[    1.090734] pca953x: probe of 1-0022 failed with error -121
[    1.091327] pca953x 1-0023: failed writing register
[    1.091535] pca953x: probe of 1-0023 failed with error -121
[    2.563236] systemd[1]: Kernel Trace File System was skipped because of a failed condition check (ConditionPathExists=/sys/kernel/tracing).
[    2.715008] systemd[1]: File System Check on Root Device was skipped because of a failed condition check (ConditionPathIsReadWrite=!/).
[    4.673136] remoteproc remoteproc0: Direct firmware load for am64-mcu-m4f0_0-fw failed with error -2
[    4.673216] remoteproc remoteproc0: Direct firmware load for am64-mcu-m4f0_0-fw failed with error -2
[    4.673226] remoteproc remoteproc0: request_firmware failed: -2
[    4.858498] remoteproc remoteproc1: Direct firmware load for am64-main-r5f0_0-fw failed with error -2
[    4.858556] remoteproc remoteproc1: Direct firmware load for am64-main-r5f0_0-fw failed with error -2
[    4.858566] remoteproc remoteproc1: request_firmware failed: -2
[    6.901385] remoteproc remoteproc14: Direct firmware load for am64-main-r5f1_0-fw failed with error -2
[    6.901561] remoteproc remoteproc14: Direct firmware load for am64-main-r5f1_0-fw failed with error -2
[    6.901573] remoteproc remoteproc14: request_firmware failed: -2
[    7.458106] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
[    7.458129] cfg80211: failed to load regulatory.db
root@am64xx-evm:~# dmesg | grep "mdio"
[    4.609818] davinci_mdio 300b2400.mdio: Configuring MDIO in manual mode
[    4.661507] davinci_mdio 300b2400.mdio: davinci mdio revision 1.7, bus freq 1000000
[    4.735091] davinci_mdio 300b2400.mdio: phy[3]: device 300b2400.mdio:03, driver TI DP83869 Rev1
[    4.735112] davinci_mdio 300b2400.mdio: phy[15]: device 300b2400.mdio:0f, driver TI DP83869 Rev1
[    6.861876] TI DP83869 Rev1 300b2400.mdio:0f: attached PHY driver (mii_bus:phy_addr=300b2400.mdio:0f, irq=POLL)
[    6.937610] TI DP83869 Rev1 300b2400.mdio:03: attached PHY driver (mii_bus:phy_addr=300b2400.mdio:03, irq=POLL)
root@am64xx-evm:~#

Are the register dumps ok for fiber configurations? Have you noticed any issues?

Thank you

Chris

Dear Evan,

I have also checked the newer SDK file system (both RT and non-RT versions of 09_02_01_10), and the same issue occurs there as well. The non-RT log is attached below.

[   77.240764] audit: type=1334 audit(1723040544.946:18): prog-id=16 op=LOAD

root@am64xx-evm:~# dmesg
[    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
[    0.000000] Linux version 6.1.83-ti-gc1c2f1971fbf (oe-user@oe-host) (aarch64-oe-linux-gcc (GCC) 11.4.0, GNU ld (GNU Binutils) 2.38.20220708) #1 SMP PREEMPT Mon May 13 20:19:51 UTC 2024
[    0.000000] Machine model: Texas Instruments AM642 EVM
[    0.000000] earlycon: ns16550a0 at MMIO32 0x0000000002800000 (options '')
[    0.000000] printk: bootconsole [ns16550a0] enabled
[    0.000000] efi: UEFI not found.
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a0000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node r5f-dma-memory@a0000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a0100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node r5f-memory@a0100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a1000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node r5f-dma-memory@a1000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a1100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node r5f-memory@a1100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a2000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node r5f-dma-memory@a2000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a2100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node r5f-memory@a2100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a3000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node r5f-dma-memory@a3000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a3100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node r5f-memory@a3100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a4000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node m4f-dma-memory@a4000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a4100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node m4f-memory@a4100000, compatible id shared-dma-pool
[    0.000000] Zone ranges:
[    0.000000]   DMA      [mem 0x0000000080000000-0x00000000ffffffff]
[    0.000000]   DMA32    empty
[    0.000000]   Normal   empty
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000080000000-0x000000009e7fffff]
[    0.000000]   node   0: [mem 0x000000009e800000-0x00000000a57fffff]
[    0.000000]   node   0: [mem 0x00000000a5800000-0x00000000ffffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x00000000ffffffff]
[    0.000000] cma: Reserved 32 MiB at 0x00000000fba00000
[    0.000000] psci: probing for conduit method from DT.
[    0.000000] psci: PSCIv1.1 detected in firmware.
[    0.000000] psci: Using standard PSCI v0.2 function IDs
[    0.000000] psci: Trusted OS migration not required
[    0.000000] psci: SMC Calling Convention v1.4
[    0.000000] percpu: Embedded 20 pages/cpu s41064 r8192 d32664 u81920
[    0.000000] pcpu-alloc: s41064 r8192 d32664 u81920 alloc=20*4096
[    0.000000] pcpu-alloc: [0] 0 [0] 1
[    0.000000] Detected VIPT I-cache on CPU0
[    0.000000] CPU features: detected: GIC system register CPU interface
[    0.000000] CPU features: detected: ARM erratum 845719
[    0.000000] alternatives: applying boot alternatives
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 516096
[    0.000000] Kernel command line: console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000 omap2-nand.0:2m(NAND.tiboot3),2m(NAND.tispl),2m(NAND.tiboot3.backup),4m(NAND.u-boot),256k(NAND.u-boot-env),256k(NAND.u-boot-env.backup),-(NAND.file-system) root=PARTUUID=d1ce0046-79e1-4258-8b97-85b8df75ece8 rw rootfstype=ext4 rootwait
[    0.000000] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
[    0.000000] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] Memory: 1890092K/2097152K available (11712K kernel code, 1258K rwdata, 3816K rodata, 1984K init, 438K bss, 174292K reserved, 32768K cma-reserved)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[    0.000000] rcu: Preemptible hierarchical RCU implementation.
[    0.000000] rcu:     RCU event tracing is enabled.
[    0.000000] rcu:     RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=2.
[    0.000000]  Trampoline variant of Tasks RCU enabled.
[    0.000000]  Tracing variant of Tasks RCU enabled.
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[    0.000000] GICv3: GIC: Using split EOI/Deactivate mode
[    0.000000] GICv3: 256 SPIs implemented
[    0.000000] GICv3: 0 Extended SPIs implemented
[    0.000000] Root IRQ handler: gic_handle_irq
[    0.000000] GICv3: GICv3 features: 16 PPIs
[    0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000000001840000
[    0.000000] ITS [mem 0x01820000-0x0182ffff]
[    0.000000] GIC: enabling workaround for ITS: Socionext Synquacer pre-ITS
[    0.000000] ITS@0x0000000001820000: Devices Table too large, reduce ids 20->19
[    0.000000] ITS@0x0000000001820000: allocated 524288 Devices @80800000 (flat, esz 8, psz 64K, shr 0)
[    0.000000] ITS: using cache flushing for cmd queue
[    0.000000] GICv3: using LPI property table @0x0000000080030000
[    0.000000] GIC: using cache flushing for LPI property table
[    0.000000] GICv3: CPU0: using allocated LPI pending table @0x0000000080040000
[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
[    0.000000] arch_timer: cp15 timer(s) running at 200.00MHz (phys).
[    0.000000] clocksource: arch_sys_counter: mask: 0x3ffffffffffffff max_cycles: 0x2e2049d3e8, max_idle_ns: 440795210634 ns
[    0.000000] sched_clock: 58 bits at 200MHz, resolution 5ns, wraps every 4398046511102ns
[    0.008596] Console: colour dummy device 80x25
[    0.013201] Calibrating delay loop (skipped), value calculated using timer frequency.. 400.00 BogoMIPS (lpj=800000)
[    0.023881] pid_max: default: 32768 minimum: 301
[    0.028658] LSM: Security Framework initializing
[    0.033525] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
[    0.041110] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
[    0.051095] cblist_init_generic: Setting adjustable number of callback queues.
[    0.058561] cblist_init_generic: Setting shift to 1 and lim to 1.
[    0.064876] cblist_init_generic: Setting adjustable number of callback queues.
[    0.072272] cblist_init_generic: Setting shift to 1 and lim to 1.
[    0.078687] rcu: Hierarchical SRCU implementation.
[    0.083600] rcu:     Max phase no-delay instances is 1000.
[    0.089260] Platform MSI: msi-controller@1820000 domain created
[    0.095637] PCI/MSI: /bus@f4000/interrupt-controller@1800000/msi-controller@1820000 domain created
[    0.105100] EFI services will not be available.
[    0.110064] smp: Bringing up secondary CPUs ...
[    0.123709] Detected VIPT I-cache on CPU1
[    0.123847] GICv3: CPU1: found redistributor 1 region 0:0x0000000001860000
[    0.123867] GICv3: CPU1: using allocated LPI pending table @0x0000000080050000
[    0.123928] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
[    0.124060] smp: Brought up 1 node, 2 CPUs
[    0.153445] SMP: Total of 2 processors activated.
[    0.158257] CPU features: detected: 32-bit EL0 Support
[    0.163527] CPU features: detected: CRC32 instructions
[    0.168840] CPU: All CPU(s) started at EL2
[    0.173026] alternatives: applying system-wide alternatives
[    0.180718] devtmpfs: initialized
[    0.193519] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[    0.203538] futex hash table entries: 512 (order: 3, 32768 bytes, linear)
[    0.212110] pinctrl core: initialized pinctrl subsystem
[    0.218162] DMI not present or invalid.
[    0.222883] NET: Registered PF_NETLINK/PF_ROUTE protocol family
[    0.230257] DMA: preallocated 256 KiB GFP_KERNEL pool for atomic allocations
[    0.237726] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
[    0.245855] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
[    0.254067] audit: initializing netlink subsys (disabled)
[    0.259965] audit: type=2000 audit(0.164:1): state=initialized audit_enabled=0 res=1
[    0.260621] thermal_sys: Registered thermal governor 'step_wise'
[    0.267901] thermal_sys: Registered thermal governor 'power_allocator'
[    0.274321] cpuidle: using governor menu
[    0.285236] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
[    0.292247] ASID allocator initialised with 65536 entries
[    0.308957] KASLR disabled due to lack of seed
[    0.321760] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
[    0.328730] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
[    0.335139] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
[    0.342076] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
[    0.348483] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
[    0.355418] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
[    0.361822] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
[    0.368757] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
[    0.377100] k3-chipinfo 43000014.chipid: Family:AM64X rev:SR2.0 JTAGID[0x1bb3802f] Detected
[    0.387564] iommu: Default domain type: Translated
[    0.392568] iommu: DMA domain TLB invalidation policy: strict mode
[    0.399339] SCSI subsystem initialized
[    0.403440] libata version 3.00 loaded.
[    0.403689] usbcore: registered new interface driver usbfs
[    0.409351] usbcore: registered new interface driver hub
[    0.414817] usbcore: registered new device driver usb
[    0.420433] pps_core: LinuxPPS API ver. 1 registered
[    0.425513] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    0.434861] PTP clock support registered
[    0.438998] EDAC MC: Ver: 3.0.0
[    0.443391] omap-mailbox 29020000.mailbox: omap mailbox rev 0x66fc9100
[    0.450349] omap-mailbox 29040000.mailbox: omap mailbox rev 0x66fc9100
[    0.457199] omap-mailbox 29060000.mailbox: omap mailbox rev 0x66fc9100
[    0.464455] FPGA manager framework
[    0.468085] Advanced Linux Sound Architecture Driver Initialized.
[    0.475551] clocksource: Switched to clocksource arch_sys_counter
[    0.482146] VFS: Disk quotas dquot_6.6.0
[    0.486228] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[    0.500576] NET: Registered PF_INET protocol family
[    0.505909] IP idents hash table entries: 32768 (order: 6, 262144 bytes, linear)
[    0.515631] tcp_listen_portaddr_hash hash table entries: 1024 (order: 2, 16384 bytes, linear)
[    0.524474] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
[    0.532421] TCP established hash table entries: 16384 (order: 5, 131072 bytes, linear)
[    0.540644] TCP bind hash table entries: 16384 (order: 7, 524288 bytes, linear)
[    0.548678] TCP: Hash tables configured (established 16384 bind 16384)
[    0.555663] UDP hash table entries: 1024 (order: 3, 32768 bytes, linear)
[    0.562598] UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes, linear)
[    0.570170] NET: Registered PF_UNIX/PF_LOCAL protocol family
[    0.576581] RPC: Registered named UNIX socket transport module.
[    0.582691] RPC: Registered udp transport module.
[    0.587500] RPC: Registered tcp transport module.
[    0.592308] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    0.598903] NET: Registered PF_XDP protocol family
[    0.603843] PCI: CLS 0 bytes, default 64
[    0.608693] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
[    0.618791] Initialise system trusted keyrings
[    0.623728] workingset: timestamp_bits=46 max_order=19 bucket_order=0
[    0.635754] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.642538] NFS: Registering the id_resolver key type
[    0.647784] Key type id_resolver registered
[    0.652064] Key type id_legacy registered
[    0.656227] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
[    0.663085] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
[    0.713662] Key type asymmetric registered
[    0.717869] Asymmetric key parser 'x509' registered
[    0.722924] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 245)
[    0.730734] io scheduler mq-deadline registered
[    0.735383] io scheduler kyber registered
[    0.742696] pinctrl-single 4084000.pinctrl: 33 pins, size 132
[    0.749179] pinctrl-single f4000.pinctrl: 180 pins, size 720
[    0.762324] Serial: 8250/16550 driver, 12 ports, IRQ sharing enabled
[    0.779752] loop: module loaded
[    0.784192] megasas: 07.719.03.00-rc1
[    0.791313] tun: Universal TUN/TAP device driver, 1.6
[    0.797355] VFIO - User Level meta-driver version: 0.3
[    0.803507] usbcore: registered new interface driver usb-storage
[    0.810270] i2c_dev: i2c /dev entries driver
[    0.815745] sdhci: Secure Digital Host Controller Interface driver
[    0.822087] sdhci: Copyright(c) Pierre Ossman
[    0.826768] sdhci-pltfm: SDHCI platform and OF driver helper
[    0.833099] ledtrig-cpu: registered to indicate activity on CPUs
[    0.839437] SMCCC: SOC_ID: ARCH_SOC_ID not implemented, skipping ....
[    0.846321] usbcore: registered new interface driver usbhid
[    0.852027] usbhid: USB HID core driver
[    0.856942] optee: probing for conduit method.
[    0.861553] optee: revision 4.1 (012cdca4)
[    0.878281] optee: dynamic shared memory is enabled
[    0.887988] optee: initialized driver
[    0.893707] Initializing XFRM netlink socket
[    0.898164] NET: Registered PF_PACKET protocol family
[    0.903427] Key type dns_resolver registered
[    0.908340] registered taskstats version 1
[    0.912575] Loading compiled-in X.509 certificates
[    0.928409] ti-sci 44043000.system-controller: ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)')
[    0.974275] tps65219 0-0030: Failed to request IRQ 0 for tps65219_irq: -22
[    0.981451] tps65219: probe of 0-0030 failed with error -22
[    0.987630] pca953x 0-0022: supply vcc not found, using dummy regulator
[    0.994543] pca953x 0-0022: using AI
[    1.020883] omap_i2c 20000000.i2c: bus 0 rev0.12 at 400 kHz
[    1.028370] omap_i2c 20020000.i2c: bus 1 rev0.12 at 400 kHz
[    1.034583] ti-sci-intr bus@f4000:interrupt-controller@a00000: Interrupt Router 3 domain created
[    1.043988] ti-sci-inta 48000000.interrupt-controller: Interrupt Aggregator domain 28 created
[    1.053052] ti-udma 485c0100.dma-controller: Number of rings: 68
[    1.060576] ti-udma 485c0100.dma-controller: Channels: 24 (bchan: 12, tchan: 6, rchan: 6)
[    1.070779] ti-udma 485c0000.dma-controller: Number of rings: 288
[    1.086052] ti-udma 485c0000.dma-controller: Channels: 44 (tchan: 29, rchan: 15)
[    1.097266] printk: console [ttyS2] disabled
[    1.101735] 2800000.serial: ttyS2 at MMIO 0x2800000 (irq = 305, base_baud = 3000000) is a 8250
[    1.110629] printk: console [ttyS2] enabled
[    1.119088] printk: bootconsole [ns16550a0] disabled
[    1.131495] am65-cpts 39000000.cpts: CPTS ver 0x4e8a010c, freq:500000000, add_val:1 pps:0
[    1.141679] mmc0: CQHCI version 5.10
[    1.144745] pca953x 1-0022: supply vcc not found, using dummy regulator
[    1.152114] pca953x 1-0022: using AI
[    1.179604] pca953x 1-0022: failed writing register
[    1.184731] pca953x: probe of 1-0022 failed with error -121
[    1.186784] mmc0: SDHCI controller on fa10000.mmc [fa10000.mmc] using ADMA 64-bit
[    1.190649] pca953x 1-0023: supply vcc not found, using dummy regulator
[    1.204709] pca953x 1-0023: using AI
[    1.208474] pca953x 1-0023: failed writing register
[    1.213577] pca953x: probe of 1-0023 failed with error -121
[    1.220375] debugfs: Directory 'pd:114' with parent 'pm_genpd' already present!
[    1.237018] ALSA device list:
[    1.240048]   No soundcards found.
[    1.243904] Waiting for root device PARTUUID=d1ce0046-79e1-4258-8b97-85b8df75ece8...
[    1.374379] mmc0: Command Queue Engine enabled
[    1.378900] mmc0: new HS200 MMC card at address 0001
[    1.384815] mmcblk0: mmc0:0001 00020G 19.2 GiB
[    1.392756]  mmcblk0: p1
[    1.396207] mmcblk0boot0: mmc0:0001 00020G 31.5 MiB
[    1.402622] mmcblk0boot1: mmc0:0001 00020G 31.5 MiB
[    1.408803] mmcblk0rpmb: mmc0:0001 00020G 4.00 MiB, chardev (240:0)
[    1.434106] EXT4-fs (mmcblk0p1): mounted filesystem with ordered data mode. Quota mode: none.
[    1.442762] VFS: Mounted root (ext4 filesystem) on device 179:1.
[    1.451047] devtmpfs: mounted
[    1.455429] Freeing unused kernel memory: 1984K
[    1.460173] Run /sbin/init as init process
[    1.464284]   with arguments:
[    1.464288]     /sbin/init
[    1.464292]   with environment:
[    1.464295]     HOME=/
[    1.464298]     TERM=linux
[    1.563960] systemd[1]: System time before build time, advancing clock.
[    1.599722] NET: Registered PF_INET6 protocol family
[    1.606138] Segment Routing with IPv6
[    1.609907] In-situ OAM (IOAM) with IPv6
[    1.637814] systemd[1]: systemd 250.5+ running in system mode (+PAM -AUDIT -SELINUX -APPARMOR +IMA -SMACK +SECCOMP -GCRYPT -GNUTLS -OPENSSL +ACL +BLKID -CURL -ELFUTILS -FIDO2 -IDN2 -IDN -IPTC +KMOD -LIBCRYPTSETUP +LIBFDISK -PCRE2 -PWQUALITY -P11KIT -QRENCODE -BZIP2 -LZ4 -XZ -ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=hybrid)
[    1.669733] systemd[1]: Detected architecture arm64.
[    1.728541] systemd[1]: Hostname set to <am64xx-evm>.
[    1.878934] systemd-sysv-generator[131]: SysV service '/etc/init.d/thermal-zone-init' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package to include a native systemd unit file, in order to make it more safe and robust.
[    2.202543] systemd[1]: /etc/systemd/system/sync-clocks.service:11: Standard output type syslog is obsolete, automatically updating to journal. Please update your unit file, and consider removing the setting altogether.
[    2.301673] systemd[1]: Queued start job for default target Multi-User System.
[    2.368131] systemd[1]: Created slice Slice /system/getty.
[    2.395352] systemd[1]: Created slice Slice /system/modprobe.
[    2.419416] systemd[1]: Created slice Slice /system/serial-getty.
[    2.442706] systemd[1]: Created slice User and Session Slice.
[    2.464246] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
[    2.488185] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
[    2.512174] systemd[1]: Reached target Path Units.
[    2.527876] systemd[1]: Reached target Remote File Systems.
[    2.547865] systemd[1]: Reached target Slice Units.
[    2.563900] systemd[1]: Reached target Swaps.
[    2.621743] systemd[1]: Listening on RPCbind Server Activation Socket.
[    2.643986] systemd[1]: Reached target RPC Port Mapper.
[    2.672611] systemd[1]: Listening on Process Core Dump Socket.
[    2.696329] systemd[1]: Listening on initctl Compatibility Named Pipe.
[    2.721007] systemd[1]: Listening on Journal Audit Socket.
[    2.744679] systemd[1]: Listening on Journal Socket (/dev/log).
[    2.768709] systemd[1]: Listening on Journal Socket.
[    2.784987] systemd[1]: Listening on Network Service Netlink Socket.
[    2.808883] systemd[1]: Listening on udev Control Socket.
[    2.832536] systemd[1]: Listening on udev Kernel Socket.
[    2.856644] systemd[1]: Listening on User Database Manager Socket.
[    2.908311] systemd[1]: Mounting Huge Pages File System...
[    2.930457] systemd[1]: Mounting POSIX Message Queue File System...
[    2.958484] systemd[1]: Mounting Kernel Debug File System...
[    2.976389] systemd[1]: Kernel Trace File System was skipped because of a failed condition check (ConditionPathExists=/sys/kernel/tracing).
[    3.012341] systemd[1]: Mounting Temporary Directory /tmp...
[    3.035818] systemd[1]: Starting Create List of Static Device Nodes...
[    3.066093] systemd[1]: Starting Load Kernel Module configfs...
[    3.090244] systemd[1]: Starting Load Kernel Module drm...
[    3.116330] systemd[1]: Starting Load Kernel Module fuse...
[    3.140628] fuse: init (API version 7.37)
[    3.168891] systemd[1]: Starting RPC Bind...
[    3.184157] systemd[1]: File System Check on Root Device was skipped because of a failed condition check (ConditionPathIsReadWrite=!/).
[    3.206555] systemd[1]: Starting Journal Service...
[    3.252125] systemd[1]: Starting Load Kernel Modules...
[    3.275448] systemd[1]: Starting Generate network units from Kernel command line...
[    3.289901] cryptodev: loading out-of-tree module taints kernel.
[    3.302011] cryptodev: driver 1.12 loaded.
[    3.340355] systemd[1]: Starting Remount Root and Kernel File Systems...
[    3.389227] systemd[1]: Starting Coldplug All udev Devices...
[    3.431824] EXT4-fs (mmcblk0p1): re-mounted. Quota mode: none.
[    3.435176] systemd[1]: Started RPC Bind.
[    3.463961] systemd[1]: Started Journal Service.
[    3.833983] systemd-journald[145]: Received client request to flush runtime journal.
[    4.038677] audit: type=1334 audit(1651167747.472:2): prog-id=5 op=LOAD
[    4.050751] audit: type=1334 audit(1651167747.480:3): prog-id=6 op=LOAD
[    5.383614] random: crng init done
[    5.612079] CAN device driver interface
[    5.690977] pcf85363 0-0051: registered as rtc0
[    5.716807] pcf85363 0-0051: setting system clock to 2024-08-07T14:21:11 UTC (1723040471)
[    5.717395] systemd-journald[145]: Oldest entry in /run/log/journal/a79e2e5e775840759bd746e81fb1cfd0/system.journal is older than the configured file retention duration (1month), suggesting rotation.
[    5.779032] audit: type=1334 audit(1723040471.556:4): prog-id=7 op=LOAD
[    5.789135] audit: type=1334 audit(1723040471.568:5): prog-id=8 op=LOAD
[    5.807723] systemd-journald[145]: /run/log/journal/a79e2e5e775840759bd746e81fb1cfd0/system.journal: Journal header limits reached or header out-of-date, rotating.
[    5.884322] systemd-journald[145]: Oldest entry in /run/log/journal/a79e2e5e775840759bd746e81fb1cfd0/system.journal is older than the configured file retention duration (1month), suggesting rotation.
[    5.923818] lm75 0-0048: supply vs not found, using dummy regulator
[    5.947847] systemd-journald[145]: /run/log/journal/a79e2e5e775840759bd746e81fb1cfd0/system.journal: Journal header limits reached or header out-of-date, rotating.
[    6.034098] at24 0-0050: supply vcc not found, using dummy regulator
[    6.193973] hwmon hwmon0: temp1_input not attached to any thermal zone
[    6.206423] lm75 0-0048: hwmon0: sensor 'tmp100'
[    6.226222] at24 0-0050: 65536 byte 24c512 EEPROM, writable, 128 bytes/write
[    6.324650] davinci_mdio 300b2400.mdio: Configuring MDIO in manual mode
[    6.451656] davinci_mdio 300b2400.mdio: davinci mdio revision 1.7, bus freq 1000000
[    6.623218] platform 78000000.r5f: configured R5F for remoteproc mode
[    6.667881] k3-m4-rproc 5000000.m4fss: assigned reserved memory node m4f-dma-memory@a4000000
[    6.733664] platform 78000000.r5f: assigned reserved memory node r5f-dma-memory@a0000000
[    6.737021] davinci_mdio 300b2400.mdio: phy[3]: device 300b2400.mdio:03, driver TI DP83869
[    6.794260] cfg80211: Loading compiled-in X.509 certificates for regulatory database
[    6.830206] remoteproc remoteproc0: 78000000.r5f is available
[    6.844769] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
[    6.852669] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
[    6.864310] davinci_mdio 300b2400.mdio: phy[15]: device 300b2400.mdio:0f, driver TI DP83869
[    6.873553] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
[    6.885626] cfg80211: failed to load regulatory.db
[    6.957484] remoteproc remoteproc0: Direct firmware load for am64-main-r5f0_0-fw failed with error -2
[    6.968344] remoteproc remoteproc0: powering up 78000000.r5f
[    6.974187] remoteproc remoteproc0: Direct firmware load for am64-main-r5f0_0-fw failed with error -2
[    6.985939] remoteproc remoteproc0: request_firmware failed: -2
[    6.996976] k3-m4-rproc 5000000.m4fss: configured M4 for remoteproc mode
[    7.023342] k3-m4-rproc 5000000.m4fss: local reset is deasserted for device
[    7.134008] remoteproc remoteproc1: 5000000.m4fss is available
[    7.185893] remoteproc remoteproc1: Direct firmware load for am64-mcu-m4f0_0-fw failed with error -2
[    7.195336] remoteproc remoteproc1: powering up 5000000.m4fss
[    7.203685] remoteproc remoteproc1: Direct firmware load for am64-mcu-m4f0_0-fw failed with error -2
[    7.213037] remoteproc remoteproc1: request_firmware failed: -2
[    7.448386] m_can_platform 20701000.can: m_can device registered (irq=404, version=32)
[    7.545488] remoteproc remoteproc2: 3000a000.txpru is available
[    7.576733] remoteproc remoteproc3: 3000c000.txpru is available
[    7.643875] remoteproc remoteproc4: 3008a000.txpru is available
[    7.696855] remoteproc remoteproc5: 3008c000.txpru is available
[    8.978048] k3_r5_rproc bus@f4000:r5fss@78000000: Timed out waiting for 78000000.r5f core to power up!
[    9.234267] platform 78400000.r5f: configured R5F for remoteproc mode
[    9.280482] platform 78400000.r5f: assigned reserved memory node r5f-dma-memory@a2000000
[    9.482703] remoteproc remoteproc6: 78400000.r5f is available
[    9.489873] remoteproc remoteproc6: Direct firmware load for am64-main-r5f1_0-fw failed with error -2
[    9.499247] remoteproc remoteproc6: powering up 78400000.r5f
[    9.508346] remoteproc remoteproc6: Direct firmware load for am64-main-r5f1_0-fw failed with error -2
[    9.519647] remoteproc remoteproc6: request_firmware failed: -2
[    9.551953] remoteproc remoteproc7: 30038000.pru is available
[    9.564887] remoteproc remoteproc8: 30006000.rtu is available
[    9.571868] remoteproc remoteproc9: 30034000.pru is available
[    9.588893] remoteproc remoteproc10: 30004000.rtu is available
[    9.621246] remoteproc remoteproc11: 300b4000.pru is available
[    9.628274] remoteproc remoteproc12: 30084000.rtu is available
[    9.640805] remoteproc remoteproc13: 300b8000.pru is available
[    9.652738] remoteproc remoteproc14: 30086000.rtu is available
[    9.671977] icssg-prueth icssg1-eth: port 1: using random MAC addr: aa:ee:31:b4:4a:e2
[    9.678555] icssg-prueth icssg1-eth: port 2: using random MAC addr: 22:35:b4:7c:73:fe
[    9.684489] TI DP83869 300b2400.mdio:0f: attached PHY driver (mii_bus:phy_addr=300b2400.mdio:0f, irq=POLL)
[    9.690871] TI DP83869 300b2400.mdio:03: attached PHY driver (mii_bus:phy_addr=300b2400.mdio:03, irq=POLL)
[    9.690913] icssg-prueth icssg1-eth: TI PRU ethernet driver initialized: dual EMAC mode
[   10.327225] m_can_platform 20701000.can main_mcan0: renamed from can0
[   10.469612] remoteproc remoteproc11: powering up 300b4000.pru
[   10.481692] remoteproc remoteproc11: Booting fw image ti-pruss/am65x-sr2-pru0-prueth-fw.elf, size 40816
[   10.493616] remoteproc remoteproc11: unsupported resource 5
[   10.501660] remoteproc remoteproc11: remote processor 300b4000.pru is now up
[   10.512626] remoteproc remoteproc12: powering up 30084000.rtu
[   10.521674] remoteproc remoteproc12: Booting fw image ti-pruss/am65x-sr2-rtu0-prueth-fw.elf, size 30888
[   10.531225] remoteproc remoteproc12: remote processor 30084000.rtu is now up
[   10.538368] remoteproc remoteproc4: powering up 3008a000.txpru
[   10.546442] remoteproc remoteproc4: Booting fw image ti-pruss/am65x-sr2-txpru0-prueth-fw.elf, size 36672
[   10.556031] remoteproc remoteproc4: remote processor 3008a000.txpru is now up
[   10.563500] remoteproc remoteproc13: powering up 300b8000.pru
[   10.571336] remoteproc remoteproc13: Booting fw image ti-pruss/am65x-sr2-pru1-prueth-fw.elf, size 41092
[   10.580808] remoteproc remoteproc13: unsupported resource 5
[   10.586451] remoteproc remoteproc13: remote processor 300b8000.pru is now up
[   10.593563] remoteproc remoteproc14: powering up 30086000.rtu
[   10.601313] remoteproc remoteproc14: Booting fw image ti-pruss/am65x-sr2-rtu1-prueth-fw.elf, size 30124
[   10.610822] remoteproc remoteproc14: remote processor 30086000.rtu is now up
[   10.617941] remoteproc remoteproc5: powering up 3008c000.txpru
[   10.625670] remoteproc remoteproc5: Booting fw image ti-pruss/am65x-sr2-txpru1-prueth-fw.elf, size 35184
[   10.635254] remoteproc remoteproc5: remote processor 3008c000.txpru is now up
[   10.643909] pps pps0: new PPS source ptp1
[   10.686387] Internal error: SP/PC alignment exception: 000000008a000000 [#1] PREEMPT SMP
[   10.694506] Modules linked in: cdns3 cdns_usb_common irq_pruss_intc overlay icssg_prueth crct10dif_ce pru_rproc hsr icss_iep phy_can_transceiver cdns3_ti cfg80211 rfkill ti_k3_m4_remoteproc ti_k3_common ti_k3_r5_remoteproc(+) k3_j72xx_bandgap virtio_rpmsg_bus rpmsg_ns rti_wdt lm75 m_can_platform m_can at24 rtc_pcf85363 can_dev sa2ul pruss optee_rng rng_core cryptodev(O) fuse drm drm_panel_orientation_quirks ipv6
[   10.731071] CPU: 1 PID: 105 Comm: kworker/u4:2 Tainted: G           O       6.1.83-ti-gc1c2f1971fbf #1
[   10.740367] Hardware name: Texas Instruments AM642 EVM (DT)
[   10.745930] Workqueue: events_power_efficient phy_state_machine
[   10.751861] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[   10.758810] pc : phy_state_machine+0x1/0x270
[   10.763075] lr : process_one_work+0x1d0/0x320
[   10.767429] sp : ffff800009eabdc0
[   10.770732] x29: ffff800009eabdc0 x28: 0000000000000000 x27: 0000000000000000
[   10.777861] x26: ffff800009280b60 x25: ffff000000009105 x24: ffff0000048de498
[   10.784989] x23: ffff000000009100 x22: ffff00000000c000 x21: 0000000000000000
[   10.792116] x20: ffff000000d0db00 x19: ffff0000048de490 x18: 0000000000000000
[   10.799243] x17: ffff800076bdd000 x16: ffff800008008000 x15: 000002388ce4e8c2
[   10.806371] x14: 0000000000000198 x13: 0000000000000001 x12: 0000000000000000
[   10.813497] x11: 0000000000000002 x10: 0000000000000198 x9 : 00000000000005c7
[   10.820624] x8 : 0000000000006185 x7 : ffff00007fbd1dc0 x6 : 0000000000000001
[   10.827751] x5 : 0000000000000000 x4 : ffff00007fbd1dc0 x3 : ffff000001399c80
[   10.834878] x2 : 0000000000000000 x1 : ffff80000878ce51 x0 : ffff0000048de490
[   10.842007] Call trace:
[   10.844445]  phy_state_machine+0x1/0x270
[   10.848365]  worker_thread+0x14c/0x444
[   10.852112]  kthread+0x10c/0x110
[   10.855335]  ret_from_fork+0x10/0x20
[   10.858910] Code: c0d50323 00d65f03 c0528000 3fd65f03 (ffd50323)
[   10.864991] ---[ end trace 0000000000000000 ]---
[   11.531578] k3_r5_rproc bus@f4000:r5fss@78400000: Timed out waiting for 78400000.r5f core to power up!
[   13.708166] icssg-prueth icssg1-eth eth1: Link is Up - 1Gbps/Full - flow control off
[   13.715990] IPv6: ADDRCONF(NETDEV_CHANGE): eth1: link becomes ready
[   16.593174] audit: type=1334 audit(1723040482.372:6): prog-id=9 op=LOAD
[   16.604985] audit: type=1334 audit(1723040482.380:7): prog-id=10 op=LOAD
[   47.052237] audit: type=1334 audit(1723040514.769:8): prog-id=10 op=UNLOAD
[   47.059326] audit: type=1334 audit(1723040514.769:9): prog-id=9 op=UNLOAD
[   66.178125] audit: type=1334 audit(1723040533.893:10): prog-id=11 op=LOAD
[   66.187735] audit: type=1334 audit(1723040533.905:11): prog-id=12 op=LOAD
[   66.606139] audit: type=1006 audit(1723040534.321:12): pid=442 uid=0 old-auid=4294967295 auid=0 tty=(none) old-ses=4294967295 ses=1 res=1
[   66.618848] audit: type=1300 audit(1723040534.321:12): arch=c00000b7 syscall=64 success=yes exit=1 a0=8 a1=ffffcd20b368 a2=1 a3=0 items=0 ppid=1 pid=442 auid=0 uid=0 gid=0 euid=0 suid=0 fsuid=0 egid=0 sgid=0 fsgid=0 tty=(none) ses=1 comm="(systemd)" exe="/lib/systemd/systemd" key=(null)
[   66.644632] audit: type=1327 audit(1723040534.321:12): proctitle="(systemd)"
[   66.658348] audit: type=1334 audit(1723040534.373:13): prog-id=13 op=LOAD
[   66.665817] audit: type=1300 audit(1723040534.373:13): arch=c00000b7 syscall=280 success=yes exit=8 a0=5 a1=fffff4189200 a2=78 a3=0 items=0 ppid=1 pid=442 auid=0 uid=0 gid=0 euid=0 suid=0 fsuid=0 egid=0 sgid=0 fsgid=0 tty=(none) ses=1 comm="systemd" exe="/lib/systemd/systemd" key=(null)
[   66.692755] audit: type=1327 audit(1723040534.373:13): proctitle="(systemd)"
[   66.701328] audit: type=1334 audit(1723040534.373:14): prog-id=13 op=UNLOAD
[   66.709275] audit: type=1334 audit(1723040534.373:15): prog-id=14 op=LOAD
[   77.194883] icssg-prueth icssg1-eth eth1: Link is Down
[   77.221232] kauditd_printk_skb: 3 callbacks suppressed
[   77.221250] audit: type=1334 audit(1723040544.938:17): prog-id=15 op=LOAD
[   77.240764] audit: type=1334 audit(1723040544.946:18): prog-id=16 op=LOAD
root@am64xx-evm:~# ifconfig
eth0      Link encap:Ethernet  HWaddr DE:0C:E4:5A:AB:89
          UP BROADCAST MULTICAST  MTU:1500  Metric:1
          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
          TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:0 (0.0 B)  TX bytes:0 (0.0 B)

eth1      Link encap:Ethernet  HWaddr BE:C8:97:13:A7:0E
          inet6 addr: fe80::bcc8:97ff:fe13:a70e/64 Scope:Link
          UP BROADCAST MULTICAST  MTU:1500  Metric:1
          RX packets:72 errors:0 dropped:0 overruns:0 frame:0
          TX packets:59 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:6674 (6.5 KiB)  TX bytes:7383 (7.2 KiB)

lo        Link encap:Local Loopback
          inet addr:127.0.0.1  Mask:255.0.0.0
          inet6 addr: ::1/128 Scope:Host
          UP LOOPBACK RUNNING  MTU:65536  Metric:1
          RX packets:93 errors:0 dropped:0 overruns:0 frame:0
          TX packets:93 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:7714 (7.5 KiB)  TX bytes:7714 (7.5 KiB)

root@am64xx-evm:~# uname -a
Linux am64xx-evm 6.1.83-ti-gc1c2f1971fbf #1 SMP PREEMPT Mon May 13 20:19:51 UTC 2024 aarch64 GNU/Linux
root@am64xx-evm:~# dmesg | g[  107.705396] audit: type=1334 audit(1723040575.427:19): prog-id=16 op=UNLOAD
[  107.713059] audit: type=1334 audit(1723040575.427:20): prog-id=15 op=UNLOAD
rep "fail"
[    0.981451] tps65219: probe of 0-0030 failed with error -22
[    1.179604] pca953x 1-0022: failed writing register
[    1.184731] pca953x: probe of 1-0022 failed with error -121
[    1.208474] pca953x 1-0023: failed writing register
[    1.213577] pca953x: probe of 1-0023 failed with error -121
[    2.976389] systemd[1]: Kernel Trace File System was skipped because of a failed condition check (ConditionPathExists=/sys/kernel/tracing).
[    3.184157] systemd[1]: File System Check on Root Device was skipped because of a failed condition check (ConditionPathIsReadWrite=!/).
[    6.873553] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
[    6.885626] cfg80211: failed to load regulatory.db
[    6.957484] remoteproc remoteproc0: Direct firmware load for am64-main-r5f0_0-fw failed with error -2
[    6.974187] remoteproc remoteproc0: Direct firmware load for am64-main-r5f0_0-fw failed with error -2
[    6.985939] remoteproc remoteproc0: request_firmware failed: -2
[    7.185893] remoteproc remoteproc1: Direct firmware load for am64-mcu-m4f0_0-fw failed with error -2
[    7.203685] remoteproc remoteproc1: Direct firmware load for am64-mcu-m4f0_0-fw failed with error -2
[    7.213037] remoteproc remoteproc1: request_firmware failed: -2
[    9.489873] remoteproc remoteproc6: Direct firmware load for am64-main-r5f1_0-fw failed with error -2
[    9.508346] remoteproc remoteproc6: Direct firmware load for am64-main-r5f1_0-fw failed with error -2
[    9.519647] remoteproc remoteproc6: request_firmware failed: -2
root@am64xx-evm:~# dmesg | grep "mdio"
[    6.324650] davinci_mdio 300b2400.mdio: Configuring MDIO in manual mode
[    6.451656] davinci_mdio 300b2400.mdio: davinci mdio revision 1.7, bus freq 1000000
[    6.737021] davinci_mdio 300b2400.mdio: phy[3]: device 300b2400.mdio:03, driver TI DP83869
[    6.864310] davinci_mdio 300b2400.mdio: phy[15]: device 300b2400.mdio:0f, driver TI DP83869
[    9.684489] TI DP83869 300b2400.mdio:0f: attached PHY driver (mii_bus:phy_addr=300b2400.mdio:0f, irq=POLL)
[    9.690871] TI DP83869 300b2400.mdio:03: attached PHY driver (mii_bus:phy_addr=300b2400.mdio:03, irq=POLL)
root@am64xx-evm:~#

Can we find any clues in the trace log?

Thank you

Chris

Hi Chris,

Sorry for the delay here, I will review and provide suggestions today.

Thank you,

Evan

Hi Chris,

Please try writing 0x0[13] = '0', and 0x0[6] = '1'. These bits control the speed for communication while auto-negotiation is disabled.

All other register values look correct for fiber communication. If both link partners have compatible SFP modules and are forced in the same speed, I expect link to come up. Otherwise, please share the schematic for review.

Thank you,

Evan

Dear Evan,

Thanks for the suggestion.

The BMCR register value initially displayed as 0x1140 (default). I attempted to disable auto-negotiation by setting the value to 0x140 using the phytool command ( phytool write eth0/15/0 0x140). This change successfully brought up the OFC interface with a valid IP address, although I still encountered an exception during boot. I tested this with the existing PHY driver from PSDK release 09.02.01.09, and it worked. However, after updating the PHY driver to the latest version from the git source, this method no longer works—setting the PHY register value to 0x140 is ineffective.

I am also attaching the OFC section schematic also as a reference purpose

A3_OFC.pdf

Thank you

Chris

Hi Chris,

Sorry for the challenges on the newer driver version, there may be a dependency change that is not compatible with the PSDK.

We can revert and test with the original driver. As long as register access is possible, the PHY should be able to configure into an appropriate mode for fiber communication (independent from driver). Please try the forced speed setting with auto-negotiation disabled on the original driver.

Thank you,

Evan

Dear Evan,

Thanks. I will change the existing driver and come back

Thank you

Chris

Dear Evan,

I've tried implementing the changes suggested in the existing driver, but they haven't worked. I can see that the BMCR register value is being updated by the driver to 0x140, and it appears that the configuration is invoked three times (I noticed this after adding some print statements to the driver). However, if I modify the register configuration similarly to how it was done for 100x, it doesn't work, and even terminal commands fail when this change is applied in the driver. It seems that any changes made to the register settings in the driver are not taking effect at all. I'm at a loss for what to try next. The only way it works is through terminal commands. The attached log shows the value being written directly to the BMCR register from the driver in 1000x mode, followed by a rewrite from the terminal command. Any ideas on what's going on?

root@am64xx-evm:~# ethtool eth0
Settings for eth0:
        Supported ports: [ TP    MII     FIBRE ]
        Supported link modes:   100baseT/Full
                                1000baseT/Full
                                1000baseX/Full
        Supported pause frame use: No
        Supports auto-negotiation: Yes
        Supported FEC modes: Not reported
        Advertised link modes:  100baseT/Full
                                1000baseT/Full
                                1000baseX/Full
        Advertised pause frame use: No
        Advertised auto-negotiation: Yes
        Advertised FEC modes: Not reported
        Speed: Unknown!
        Duplex: Unknown! (255)
        Auto-negotiation: on
        Port: FIBRE
        PHYAD: 15
        Transceiver: external
        Current message level: 0x00000000 (0)

        Link detected: no
root@am64xx-evm:~# phytool eth0/0xf/0
ieee-phy: reg:BMCR(0x00) val:0x0140
   flags:          -reset -loopback -aneg-enable -power-down -isolate -aneg-restart -collision-test
   speed:          1000-full
root@am64xx-evm:~# phytool write eth0/0xf/0 0x140
[   75.983687] icssg-prueth icssg1-eth eth0: Link is Up - 1Gbps/Full - flow control off
[   75.983765] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
root@am64xx-evm:~# phytool eth0/0xf/0
ieee-phy: reg:BMCR(0x00) val:0x0140
   flags:          -reset -loopback -aneg-enable -power-down -isolate -aneg-restart -collision-test
   speed:          1000-full
root@am64xx-evm:~# ethtool eth0
Settings for eth0:
        Supported ports: [ TP    MII     FIBRE ]
        Supported link modes:   100baseT/Full
                                1000baseT/Full
                                1000baseX/Full
        Supported pause frame use: No
        Supports auto-negotiation: Yes
        Supported FEC modes: Not reported
        Advertised link modes:  100baseT/Full
                                1000baseT/Full
                                1000baseX/Full
        Advertised pause frame use: No
        Advertised auto-negotiation: Yes
        Advertised FEC modes: Not reported
        Speed: 1000Mb/s
        Duplex: Full
        Auto-negotiation: off
        master-slave cfg: forced master
        master-slave status: master
        Port: FIBRE
        PHYAD: 15
        Transceiver: external
        Current message level: 0x00000000 (0)

        Link detected: yes
root@am64xx-evm:~#

In my earlier messages in this post, I mentioned an exception. Could that be causing the issue? Do you have any idea what might be triggering this exception? Is it possible to simulate this condition in your setup?

Thank you

Chris

Hi Chris,

Can you please share the driver changes you have made? It's possible the change has affected other register read/write sequences in the driver.

For proof of concept, can we attempt the suggested register setting manually using phytool or ethtool in terminal? After we confirm the config that works for communication, I can help suggest driver edits.

Thank you,

Evan 

Dear Evan

After booting with the original driver, using the command phytool write eth0/0xf/0 0x140 successfully brings the interface up.

I applied the same changes directly in the original driver file within the 'dp83869_configure_fiber' function using the following code:

ret = phy_write(phydev, MII_BMCR, 0x0140);

However, this does not bring up the fiber interface. I've verified that the register value set by the function is correct.

I've attached the modifications made to the original driver. Most of the changes are within the 'dp83869_configure_fiber' function, while others are attempts or debugging efforts.

--- original_dp83869.c
+++ edited_dp83869.c
@@ -167,8 +167,13 @@
 			if (dp83869->mode == DP83869_RGMII_100_BASE)
 				phydev->speed = SPEED_100;
 		} else {
+			#if 1
 			phydev->speed = SPEED_UNKNOWN;
 			phydev->duplex = DUPLEX_UNKNOWN;
+			#else //Added for testing
+			phydev->speed = SPEED_1000;
+			phydev->duplex = DUPLEX_FULL;
+			#endif
 		}
 	}
 
@@ -650,26 +655,69 @@
 	if (dp83869->mode == DP83869_RGMII_1000_BASE) {
 		linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
 				 phydev->supported);
+		 #if 0 // Added for testig
+		 //phydev->speed = SPEED_1000;
+		 #else
+		 //phy_write(phydev, MII_BMCR, 0x0140);
+		 #endif
 	} else {
 		linkmode_set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT,
 				 phydev->supported);
 		linkmode_set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT,
 				 phydev->supported);
-
-		/* Auto neg is not supported in 100base FX mode */
+		#if 0 // Added for testig
+		 //phydev->speed = SPEED_100;
+		#endif
+	}
+
+	/* Auto neg is not supported in 100base FX mode */
+	bmcr = phy_read(phydev, MII_BMCR);
+	if (bmcr < 0)
+		return bmcr;
+
+	#if 1
+	phydev->autoneg = AUTONEG_DISABLE;
+	#endif
+	
+	#if 1
+	linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->supported);
+	linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->advertising);
+	#endif
+
+	if (bmcr & BMCR_ANENABLE) {
+	
+		#if 0
+		ret =  phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0);
+		if (ret < 0)
+			return ret;
+		
+		#if 1 //Added for test
 		bmcr = phy_read(phydev, MII_BMCR);
-		if (bmcr < 0)
-			return bmcr;
-
-		phydev->autoneg = AUTONEG_DISABLE;
-		linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->supported);
-		linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->advertising);
-
-		if (bmcr & BMCR_ANENABLE) {
-			ret =  phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0);
-			if (ret < 0)
-				return ret;
-		}
+		printk(KERN_ERR "dp83869: 1.bmcr: %x\n", bmcr);
+		#endif
+
+		if(dp83869->mode == DP83869_RGMII_1000_BASE){
+		#if 1 //Added for test
+			printk(KERN_ERR "dp83869: Setting speed 1000 - 0x%x\n", BMCR_SPEED1000);
+			ret =  phy_modify(phydev, MII_BMCR, BMCR_SPEED1000, 1);
+		#endif
+		}else {
+		#if 1 //Added for test
+			printk(KERN_ERR "dp83869: Setting speed 100 - 0x%x\n", BMCR_SPEED100);
+			ret =  phy_modify(phydev, MII_BMCR, BMCR_SPEED100, 1);
+		#endif
+		}
+		#else /* Added for test */
+		ret = phy_write(phydev, MII_BMCR, 0x0140);
+		printk(KERN_ERR "dp83869: Writing directly 0x0140\n");
+		#endif
+		if (ret < 0)
+			return ret;	
+		
+		#if 1 /* Added for test */
+		bmcr = phy_read(phydev, MII_BMCR);
+		printk(KERN_ERR "dp83869: 2.bmcr: 0x%x\n", bmcr);
+		#endif 
 	}
 
 	/* Update advertising from supported */
@@ -696,6 +744,9 @@
 	if (phydev->interface == PHY_INTERFACE_MODE_MII) {
 		if (dp83869->mode == DP83869_100M_MEDIA_CONVERT ||
 		    dp83869->mode == DP83869_RGMII_100_BASE ||
+#if 0
+		    dp83869->mode == DP83869_RGMII_1000_BASE ||
+#endif
 		    dp83869->mode == DP83869_RGMII_COPPER_ETHERNET) {
 			phy_ctrl_val |= DP83869_OP_MODE_MII;
 		} else {
@@ -709,9 +760,16 @@
 	if (ret)
 		return ret;
 
+#if 0 // Added condition for testing
+	if(dp83869->mode != DP83869_RGMII_1000_BASE) 
+	{
+#endif
 	ret = phy_write(phydev, MII_BMCR, MII_DP83869_BMCR_DEFAULT);
 	if (ret)
 		return ret;
+#if 0 
+		}
+#endif
 
 	phy_ctrl_val = (dp83869->rx_fifo_depth << DP83869_RX_FIFO_SHIFT |
 			dp83869->tx_fifo_depth << DP83869_TX_FIFO_SHIFT |
@@ -731,6 +789,7 @@
 		ret = dp83869_configure_rgmii(phydev, dp83869);
 		if (ret)
 			return ret;
+		printk(KERN_ERR "dp83869: Copper Ethernet\n");
 		break;
 	case DP83869_RGMII_SGMII_BRIDGE:
 		ret = phy_modify_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE,
@@ -780,6 +839,7 @@
 		break;
 	case DP83869_RGMII_1000_BASE:
 	case DP83869_RGMII_100_BASE:
+		printk(KERN_ERR "dp83869: Fiber Ethernet\n");
 		ret = dp83869_configure_fiber(phydev, dp83869);
 		break;
 	default:
@@ -798,11 +858,17 @@
 	ret = phy_modify(phydev, DP83869_CFG2, DP83869_DOWNSHIFT_EN,
 			 DP83869_DOWNSHIFT_EN);
 	if (ret)
+	{	
+		printk(KERN_ERR "dp83869: DP83869_DOWNSHIFT_EN\n");
 		return ret;
+		}
 
 	ret = dp83869_configure_mode(phydev, dp83869);
 	if (ret)
+	{
+		printk(KERN_ERR "dp83869: dp83869_configure_mode\n");
 		return ret;
+		}
 
 	/* Enable Interrupt output INT_OE in CFG4 register */
 	if (phy_interrupt_is_valid(phydev)) {
@@ -827,7 +893,10 @@
 				    dp83869->rx_int_delay |
 			dp83869->tx_int_delay << DP83869_RGMII_CLK_DELAY_SHIFT);
 		if (ret)
-			return ret;
+		{
+			printk(KERN_ERR "dp83869: phy_interface_is_rgmii\n");
+			return ret;
+			}
 
 		val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL);
 		val |= (DP83869_RGMII_TX_CLK_DELAY_EN |
@@ -854,17 +923,25 @@
 {
 	struct dp83869_private *dp83869;
 	int ret;
-
+	printk(KERN_ERR "dp83869: Probing Started\n");
 	dp83869 = devm_kzalloc(&phydev->mdio.dev, sizeof(*dp83869),
 			       GFP_KERNEL);
+	printk(KERN_ERR "dp83869: Devaddr: %px\n", dp83869);
+	
 	if (!dp83869)
+	{
+		printk(KERN_ERR "dp83869: ENOMEM\n");
 		return -ENOMEM;
+		}
 
 	phydev->priv = dp83869;
 
 	ret = dp83869_of_init(phydev);
 	if (ret)
+	{
+		printk(KERN_ERR "dp83869: Init failed\n");
 		return ret;
+		}
 
 	if (dp83869->mode == DP83869_RGMII_100_BASE ||
 	    dp83869->mode == DP83869_RGMII_1000_BASE)
@@ -882,6 +959,7 @@
 		return ret;
 
 	usleep_range(10, 20);
+	
 
 	/* Global sw reset sets all registers to default.
 	 * Need to set the registers in the PHY to the right config.

// SPDX-License-Identifier: GPL-2.0
/* Driver for the Texas Instruments DP83869 PHY
 * Copyright (C) 2019 Texas Instruments Inc.
 */

#include <linux/ethtool.h>
#include <linux/etherdevice.h>
#include <linux/kernel.h>
#include <linux/mii.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/phy.h>
#include <linux/delay.h>
#include <linux/bitfield.h>

#include <dt-bindings/net/ti-dp83869.h>

#define DP83869_PHY_ID		0x2000a0f1
#define DP83561_PHY_ID		0x2000a1a4
#define DP83869_DEVADDR		0x1f

#define MII_DP83869_PHYCTRL	0x10
#define MII_DP83869_MICR	0x12
#define MII_DP83869_ISR		0x13
#define DP83869_CFG2		0x14
#define DP83869_CTRL		0x1f
#define DP83869_CFG4		0x1e

/* Extended Registers */
#define DP83869_GEN_CFG3        0x0031
#define DP83869_RGMIICTL	0x0032
#define DP83869_STRAP_STS1	0x006e
#define DP83869_RGMIIDCTL	0x0086
#define DP83869_RXFCFG		0x0134
#define DP83869_RXFPMD1		0x0136
#define DP83869_RXFPMD2		0x0137
#define DP83869_RXFPMD3		0x0138
#define DP83869_RXFSOP1		0x0139
#define DP83869_RXFSOP2		0x013A
#define DP83869_RXFSOP3		0x013B
#define DP83869_IO_MUX_CFG	0x0170
#define DP83869_OP_MODE		0x01df
#define DP83869_FX_CTRL		0x0c00

#define DP83869_SW_RESET	BIT(15)
#define DP83869_SW_RESTART	BIT(14)

/* MICR Interrupt bits */
#define MII_DP83869_MICR_AN_ERR_INT_EN		BIT(15)
#define MII_DP83869_MICR_SPEED_CHNG_INT_EN	BIT(14)
#define MII_DP83869_MICR_DUP_MODE_CHNG_INT_EN	BIT(13)
#define MII_DP83869_MICR_PAGE_RXD_INT_EN	BIT(12)
#define MII_DP83869_MICR_AUTONEG_COMP_INT_EN	BIT(11)
#define MII_DP83869_MICR_LINK_STS_CHNG_INT_EN	BIT(10)
#define MII_DP83869_MICR_FALSE_CARRIER_INT_EN	BIT(8)
#define MII_DP83869_MICR_SLEEP_MODE_CHNG_INT_EN	BIT(4)
#define MII_DP83869_MICR_WOL_INT_EN		BIT(3)
#define MII_DP83869_MICR_XGMII_ERR_INT_EN	BIT(2)
#define MII_DP83869_MICR_POL_CHNG_INT_EN	BIT(1)
#define MII_DP83869_MICR_JABBER_INT_EN		BIT(0)

#define MII_DP83869_BMCR_DEFAULT	(BMCR_ANENABLE | \
					 BMCR_FULLDPLX | \
					 BMCR_SPEED1000)

#define MII_DP83869_FIBER_ADVERTISE    (ADVERTISED_FIBRE | \
					ADVERTISED_Pause | \
					ADVERTISED_Asym_Pause)

/* This is the same bit mask as the BMCR so re-use the BMCR default */
#define DP83869_FX_CTRL_DEFAULT	MII_DP83869_BMCR_DEFAULT

/* CFG1 bits */
#define DP83869_CFG1_DEFAULT	(ADVERTISE_1000HALF | \
				 ADVERTISE_1000FULL | \
				 CTL1000_AS_MASTER)

/* RGMIICTL bits */
#define DP83869_RGMII_TX_CLK_DELAY_EN		BIT(1)
#define DP83869_RGMII_RX_CLK_DELAY_EN		BIT(0)

/* RGMIIDCTL */
#define DP83869_RGMII_CLK_DELAY_SHIFT		4
#define DP83869_CLK_DELAY_DEF			7

/* STRAP_STS1 bits */
#define DP83869_STRAP_OP_MODE_MASK		GENMASK(2, 0)
#define DP83869_STRAP_STS1_RESERVED		BIT(11)
#define DP83869_STRAP_MIRROR_ENABLED           BIT(12)

/* PHYCTRL bits */
#define DP83869_RX_FIFO_SHIFT	12
#define DP83869_TX_FIFO_SHIFT	14

/* PHY_CTRL lower bytes 0x48 are declared as reserved */
#define DP83869_PHY_CTRL_DEFAULT	0x48
#define DP83869_PHYCR_FIFO_DEPTH_MASK	GENMASK(15, 12)
#define DP83869_PHYCR_RESERVED_MASK	BIT(11)

/* IO_MUX_CFG bits */
#define DP83869_IO_MUX_CFG_IO_IMPEDANCE_CTRL	0x1f

#define DP83869_IO_MUX_CFG_IO_IMPEDANCE_MAX	0x0
#define DP83869_IO_MUX_CFG_IO_IMPEDANCE_MIN	0x1f
#define DP83869_IO_MUX_CFG_CLK_O_SEL_MASK	(0x1f << 8)
#define DP83869_IO_MUX_CFG_CLK_O_SEL_SHIFT	8

/* CFG3 bits */
#define DP83869_CFG3_PORT_MIRROR_EN              BIT(0)

/* CFG4 bits */
#define DP83869_INT_OE	BIT(7)

/* OP MODE */
#define DP83869_OP_MODE_MII			BIT(5)
#define DP83869_SGMII_RGMII_BRIDGE		BIT(6)

/* RXFCFG bits*/
#define DP83869_WOL_MAGIC_EN		BIT(0)
#define DP83869_WOL_PATTERN_EN		BIT(1)
#define DP83869_WOL_BCAST_EN		BIT(2)
#define DP83869_WOL_UCAST_EN		BIT(4)
#define DP83869_WOL_SEC_EN		BIT(5)
#define DP83869_WOL_ENH_MAC		BIT(7)

/* CFG2 bits */
#define DP83869_DOWNSHIFT_EN		(BIT(8) | BIT(9))
#define DP83869_DOWNSHIFT_ATTEMPT_MASK	(BIT(10) | BIT(11))
#define DP83869_DOWNSHIFT_1_COUNT_VAL	0
#define DP83869_DOWNSHIFT_2_COUNT_VAL	1
#define DP83869_DOWNSHIFT_4_COUNT_VAL	2
#define DP83869_DOWNSHIFT_8_COUNT_VAL	3
#define DP83869_DOWNSHIFT_1_COUNT	1
#define DP83869_DOWNSHIFT_2_COUNT	2
#define DP83869_DOWNSHIFT_4_COUNT	4
#define DP83869_DOWNSHIFT_8_COUNT	8

enum {
	DP83869_PORT_MIRRORING_KEEP,
	DP83869_PORT_MIRRORING_EN,
	DP83869_PORT_MIRRORING_DIS,
};

struct dp83869_private {
	int tx_fifo_depth;
	int rx_fifo_depth;
	s32 rx_int_delay;
	s32 tx_int_delay;
	int io_impedance;
	int port_mirroring;
	bool rxctrl_strap_quirk;
	int clk_output_sel;
	int mode;
};

static int dp83869_read_status(struct phy_device *phydev)
{
	struct dp83869_private *dp83869 = phydev->priv;
	int ret;

	ret = genphy_read_status(phydev);
	if (ret)
		return ret;

	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported)) {
		if (phydev->link) {
			if (dp83869->mode == DP83869_RGMII_100_BASE)
				phydev->speed = SPEED_100;
		} else {
			phydev->speed = SPEED_UNKNOWN;
			phydev->duplex = DUPLEX_UNKNOWN;
		}
	}

	return 0;
}

static int dp83869_ack_interrupt(struct phy_device *phydev)
{
	int err = phy_read(phydev, MII_DP83869_ISR);

	if (err < 0)
		return err;

	return 0;
}

static int dp83869_config_intr(struct phy_device *phydev)
{
	int micr_status = 0, err;

	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
		err = dp83869_ack_interrupt(phydev);
		if (err)
			return err;

		micr_status = phy_read(phydev, MII_DP83869_MICR);
		if (micr_status < 0)
			return micr_status;

		micr_status |=
			(MII_DP83869_MICR_AN_ERR_INT_EN |
			MII_DP83869_MICR_SPEED_CHNG_INT_EN |
			MII_DP83869_MICR_AUTONEG_COMP_INT_EN |
			MII_DP83869_MICR_LINK_STS_CHNG_INT_EN |
			MII_DP83869_MICR_DUP_MODE_CHNG_INT_EN |
			MII_DP83869_MICR_SLEEP_MODE_CHNG_INT_EN);

		err = phy_write(phydev, MII_DP83869_MICR, micr_status);
	} else {
		err = phy_write(phydev, MII_DP83869_MICR, micr_status);
		if (err)
			return err;

		err = dp83869_ack_interrupt(phydev);
	}

	return err;
}

static irqreturn_t dp83869_handle_interrupt(struct phy_device *phydev)
{
	int irq_status, irq_enabled;

	irq_status = phy_read(phydev, MII_DP83869_ISR);
	if (irq_status < 0) {
		phy_error(phydev);
		return IRQ_NONE;
	}

	irq_enabled = phy_read(phydev, MII_DP83869_MICR);
	if (irq_enabled < 0) {
		phy_error(phydev);
		return IRQ_NONE;
	}

	if (!(irq_status & irq_enabled))
		return IRQ_NONE;

	phy_trigger_machine(phydev);

	return IRQ_HANDLED;
}

static int dp83869_set_wol(struct phy_device *phydev,
			   struct ethtool_wolinfo *wol)
{
	struct net_device *ndev = phydev->attached_dev;
	int val_rxcfg, val_micr;
	const u8 *mac;
	int ret;

	val_rxcfg = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG);
	if (val_rxcfg < 0)
		return val_rxcfg;

	val_micr = phy_read(phydev, MII_DP83869_MICR);
	if (val_micr < 0)
		return val_micr;

	if (wol->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_UCAST |
			    WAKE_BCAST)) {
		val_rxcfg |= DP83869_WOL_ENH_MAC;
		val_micr |= MII_DP83869_MICR_WOL_INT_EN;

		if (wol->wolopts & WAKE_MAGIC ||
		    wol->wolopts & WAKE_MAGICSECURE) {
			mac = (const u8 *)ndev->dev_addr;

			if (!is_valid_ether_addr(mac))
				return -EINVAL;

			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
					    DP83869_RXFPMD1,
					    mac[1] << 8 | mac[0]);
			if (ret)
				return ret;

			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
					    DP83869_RXFPMD2,
					    mac[3] << 8 | mac[2]);
			if (ret)
				return ret;

			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
					    DP83869_RXFPMD3,
					    mac[5] << 8 | mac[4]);
			if (ret)
				return ret;

			val_rxcfg |= DP83869_WOL_MAGIC_EN;
		} else {
			val_rxcfg &= ~DP83869_WOL_MAGIC_EN;
		}

		if (wol->wolopts & WAKE_MAGICSECURE) {
			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
					    DP83869_RXFSOP1,
					    (wol->sopass[1] << 8) | wol->sopass[0]);
			if (ret)
				return ret;

			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
					    DP83869_RXFSOP2,
					    (wol->sopass[3] << 8) | wol->sopass[2]);
			if (ret)
				return ret;
			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
					    DP83869_RXFSOP3,
					    (wol->sopass[5] << 8) | wol->sopass[4]);
			if (ret)
				return ret;

			val_rxcfg |= DP83869_WOL_SEC_EN;
		} else {
			val_rxcfg &= ~DP83869_WOL_SEC_EN;
		}

		if (wol->wolopts & WAKE_UCAST)
			val_rxcfg |= DP83869_WOL_UCAST_EN;
		else
			val_rxcfg &= ~DP83869_WOL_UCAST_EN;

		if (wol->wolopts & WAKE_BCAST)
			val_rxcfg |= DP83869_WOL_BCAST_EN;
		else
			val_rxcfg &= ~DP83869_WOL_BCAST_EN;
	} else {
		val_rxcfg &= ~DP83869_WOL_ENH_MAC;
		val_micr &= ~MII_DP83869_MICR_WOL_INT_EN;
	}

	ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG, val_rxcfg);
	if (ret)
		return ret;

	return phy_write(phydev, MII_DP83869_MICR, val_micr);
}

static void dp83869_get_wol(struct phy_device *phydev,
			    struct ethtool_wolinfo *wol)
{
	int value, sopass_val;

	wol->supported = (WAKE_UCAST | WAKE_BCAST | WAKE_MAGIC |
			WAKE_MAGICSECURE);
	wol->wolopts = 0;

	value = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG);
	if (value < 0) {
		phydev_err(phydev, "Failed to read RX CFG\n");
		return;
	}

	if (value & DP83869_WOL_UCAST_EN)
		wol->wolopts |= WAKE_UCAST;

	if (value & DP83869_WOL_BCAST_EN)
		wol->wolopts |= WAKE_BCAST;

	if (value & DP83869_WOL_MAGIC_EN)
		wol->wolopts |= WAKE_MAGIC;

	if (value & DP83869_WOL_SEC_EN) {
		sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR,
					  DP83869_RXFSOP1);
		if (sopass_val < 0) {
			phydev_err(phydev, "Failed to read RX SOP 1\n");
			return;
		}

		wol->sopass[0] = (sopass_val & 0xff);
		wol->sopass[1] = (sopass_val >> 8);

		sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR,
					  DP83869_RXFSOP2);
		if (sopass_val < 0) {
			phydev_err(phydev, "Failed to read RX SOP 2\n");
			return;
		}

		wol->sopass[2] = (sopass_val & 0xff);
		wol->sopass[3] = (sopass_val >> 8);

		sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR,
					  DP83869_RXFSOP3);
		if (sopass_val < 0) {
			phydev_err(phydev, "Failed to read RX SOP 3\n");
			return;
		}

		wol->sopass[4] = (sopass_val & 0xff);
		wol->sopass[5] = (sopass_val >> 8);

		wol->wolopts |= WAKE_MAGICSECURE;
	}

	if (!(value & DP83869_WOL_ENH_MAC))
		wol->wolopts = 0;
}

static int dp83869_get_downshift(struct phy_device *phydev, u8 *data)
{
	int val, cnt, enable, count;

	val = phy_read(phydev, DP83869_CFG2);
	if (val < 0)
		return val;

	enable = FIELD_GET(DP83869_DOWNSHIFT_EN, val);
	cnt = FIELD_GET(DP83869_DOWNSHIFT_ATTEMPT_MASK, val);

	switch (cnt) {
	case DP83869_DOWNSHIFT_1_COUNT_VAL:
		count = DP83869_DOWNSHIFT_1_COUNT;
		break;
	case DP83869_DOWNSHIFT_2_COUNT_VAL:
		count = DP83869_DOWNSHIFT_2_COUNT;
		break;
	case DP83869_DOWNSHIFT_4_COUNT_VAL:
		count = DP83869_DOWNSHIFT_4_COUNT;
		break;
	case DP83869_DOWNSHIFT_8_COUNT_VAL:
		count = DP83869_DOWNSHIFT_8_COUNT;
		break;
	default:
		return -EINVAL;
	}

	*data = enable ? count : DOWNSHIFT_DEV_DISABLE;

	return 0;
}

static int dp83869_set_downshift(struct phy_device *phydev, u8 cnt)
{
	int val, count;

	if (cnt > DP83869_DOWNSHIFT_8_COUNT)
		return -EINVAL;

	if (!cnt)
		return phy_clear_bits(phydev, DP83869_CFG2,
				      DP83869_DOWNSHIFT_EN);

	switch (cnt) {
	case DP83869_DOWNSHIFT_1_COUNT:
		count = DP83869_DOWNSHIFT_1_COUNT_VAL;
		break;
	case DP83869_DOWNSHIFT_2_COUNT:
		count = DP83869_DOWNSHIFT_2_COUNT_VAL;
		break;
	case DP83869_DOWNSHIFT_4_COUNT:
		count = DP83869_DOWNSHIFT_4_COUNT_VAL;
		break;
	case DP83869_DOWNSHIFT_8_COUNT:
		count = DP83869_DOWNSHIFT_8_COUNT_VAL;
		break;
	default:
		phydev_err(phydev,
			   "Downshift count must be 1, 2, 4 or 8\n");
		return -EINVAL;
	}

	val = DP83869_DOWNSHIFT_EN;
	val |= FIELD_PREP(DP83869_DOWNSHIFT_ATTEMPT_MASK, count);

	return phy_modify(phydev, DP83869_CFG2,
			  DP83869_DOWNSHIFT_EN | DP83869_DOWNSHIFT_ATTEMPT_MASK,
			  val);
}

static int dp83869_get_tunable(struct phy_device *phydev,
			       struct ethtool_tunable *tuna, void *data)
{
	switch (tuna->id) {
	case ETHTOOL_PHY_DOWNSHIFT:
		return dp83869_get_downshift(phydev, data);
	default:
		return -EOPNOTSUPP;
	}
}

static int dp83869_set_tunable(struct phy_device *phydev,
			       struct ethtool_tunable *tuna, const void *data)
{
	switch (tuna->id) {
	case ETHTOOL_PHY_DOWNSHIFT:
		return dp83869_set_downshift(phydev, *(const u8 *)data);
	default:
		return -EOPNOTSUPP;
	}
}

static int dp83869_config_port_mirroring(struct phy_device *phydev)
{
	struct dp83869_private *dp83869 = phydev->priv;

	if (dp83869->port_mirroring == DP83869_PORT_MIRRORING_EN)
		return phy_set_bits_mmd(phydev, DP83869_DEVADDR,
					DP83869_GEN_CFG3,
					DP83869_CFG3_PORT_MIRROR_EN);
	else
		return phy_clear_bits_mmd(phydev, DP83869_DEVADDR,
					  DP83869_GEN_CFG3,
					  DP83869_CFG3_PORT_MIRROR_EN);
}

static int dp83869_set_strapped_mode(struct phy_device *phydev)
{
	struct dp83869_private *dp83869 = phydev->priv;
	int val;

	val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1);
	if (val < 0)
		return val;

	dp83869->mode = val & DP83869_STRAP_OP_MODE_MASK;

	return 0;
}

#if IS_ENABLED(CONFIG_OF_MDIO)
static const int dp83869_internal_delay[] = {250, 500, 750, 1000, 1250, 1500,
					     1750, 2000, 2250, 2500, 2750, 3000,
					     3250, 3500, 3750, 4000};

static int dp83869_of_init(struct phy_device *phydev)
{
	struct dp83869_private *dp83869 = phydev->priv;
	struct device *dev = &phydev->mdio.dev;
	struct device_node *of_node = dev->of_node;
	int delay_size = ARRAY_SIZE(dp83869_internal_delay);
	int ret;

	if (!of_node)
		return -ENODEV;

	dp83869->io_impedance = -EINVAL;

	/* Optional configuration */
	ret = of_property_read_u32(of_node, "ti,clk-output-sel",
				   &dp83869->clk_output_sel);
	if (ret || dp83869->clk_output_sel > DP83869_CLK_O_SEL_REF_CLK)
		dp83869->clk_output_sel = DP83869_CLK_O_SEL_REF_CLK;

	ret = of_property_read_u32(of_node, "ti,op-mode", &dp83869->mode);
	if (ret == 0) {
		if (dp83869->mode < DP83869_RGMII_COPPER_ETHERNET ||
		    dp83869->mode > DP83869_SGMII_COPPER_ETHERNET)
			return -EINVAL;
	} else {
		ret = dp83869_set_strapped_mode(phydev);
		if (ret)
			return ret;
	}

	if (of_property_read_bool(of_node, "ti,max-output-impedance"))
		dp83869->io_impedance = DP83869_IO_MUX_CFG_IO_IMPEDANCE_MAX;
	else if (of_property_read_bool(of_node, "ti,min-output-impedance"))
		dp83869->io_impedance = DP83869_IO_MUX_CFG_IO_IMPEDANCE_MIN;

	if (of_property_read_bool(of_node, "enet-phy-lane-swap")) {
		dp83869->port_mirroring = DP83869_PORT_MIRRORING_EN;
	} else {
		/* If the lane swap is not in the DT then check the straps */
		ret = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1);
		if (ret < 0)
			return ret;

		if (ret & DP83869_STRAP_MIRROR_ENABLED)
			dp83869->port_mirroring = DP83869_PORT_MIRRORING_EN;
		else
			dp83869->port_mirroring = DP83869_PORT_MIRRORING_DIS;

		ret = 0;
	}

	if (of_property_read_u32(of_node, "rx-fifo-depth",
				 &dp83869->rx_fifo_depth))
		dp83869->rx_fifo_depth = DP83869_PHYCR_FIFO_DEPTH_4_B_NIB;

	if (of_property_read_u32(of_node, "tx-fifo-depth",
				 &dp83869->tx_fifo_depth))
		dp83869->tx_fifo_depth = DP83869_PHYCR_FIFO_DEPTH_4_B_NIB;

	dp83869->rx_int_delay = phy_get_internal_delay(phydev, dev,
						       &dp83869_internal_delay[0],
						       delay_size, true);
	if (dp83869->rx_int_delay < 0)
		dp83869->rx_int_delay = DP83869_CLK_DELAY_DEF;

	dp83869->tx_int_delay = phy_get_internal_delay(phydev, dev,
						       &dp83869_internal_delay[0],
						       delay_size, false);
	if (dp83869->tx_int_delay < 0)
		dp83869->tx_int_delay = DP83869_CLK_DELAY_DEF;

	return ret;
}
#else
static int dp83869_of_init(struct phy_device *phydev)
{
	return dp83869_set_strapped_mode(phydev);
}
#endif /* CONFIG_OF_MDIO */

static int dp83869_configure_rgmii(struct phy_device *phydev,
				   struct dp83869_private *dp83869)
{
	int ret = 0, val;

	if (phy_interface_is_rgmii(phydev)) {
		val = phy_read(phydev, MII_DP83869_PHYCTRL);
		if (val < 0)
			return val;

		val &= ~DP83869_PHYCR_FIFO_DEPTH_MASK;
		val |= (dp83869->tx_fifo_depth << DP83869_TX_FIFO_SHIFT);
		val |= (dp83869->rx_fifo_depth << DP83869_RX_FIFO_SHIFT);

		ret = phy_write(phydev, MII_DP83869_PHYCTRL, val);
		if (ret)
			return ret;
	}

	if (dp83869->io_impedance >= 0)
		ret = phy_modify_mmd(phydev, DP83869_DEVADDR,
				     DP83869_IO_MUX_CFG,
				     DP83869_IO_MUX_CFG_IO_IMPEDANCE_CTRL,
				     dp83869->io_impedance &
				     DP83869_IO_MUX_CFG_IO_IMPEDANCE_CTRL);

	return ret;
}

static int dp83869_configure_fiber(struct phy_device *phydev,
				   struct dp83869_private *dp83869)
{
	int bmcr;
	int ret;

	/* Only allow advertising what this PHY supports */
	linkmode_and(phydev->advertising, phydev->advertising,
		     phydev->supported);

	linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported);
	linkmode_set_bit(ADVERTISED_FIBRE, phydev->advertising);

	if (dp83869->mode == DP83869_RGMII_1000_BASE) {
		linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
				 phydev->supported);
	} else {
		linkmode_set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT,
				 phydev->supported);
		linkmode_set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT,
				 phydev->supported);

		/* Auto neg is not supported in 100base FX mode */
		bmcr = phy_read(phydev, MII_BMCR);
		if (bmcr < 0)
			return bmcr;

		phydev->autoneg = AUTONEG_DISABLE;
		linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->supported);
		linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->advertising);

		if (bmcr & BMCR_ANENABLE) {
			ret =  phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0);
			if (ret < 0)
				return ret;
		}
	}

	/* Update advertising from supported */
	linkmode_or(phydev->advertising, phydev->advertising,
		    phydev->supported);

	return 0;
}

static int dp83869_configure_mode(struct phy_device *phydev,
				  struct dp83869_private *dp83869)
{
	int phy_ctrl_val;
	int ret;

	if (dp83869->mode < DP83869_RGMII_COPPER_ETHERNET ||
	    dp83869->mode > DP83869_SGMII_COPPER_ETHERNET)
		return -EINVAL;

	/* Below init sequence for each operational mode is defined in
	 * section 9.4.8 of the datasheet.
	 */
	phy_ctrl_val = dp83869->mode;
	if (phydev->interface == PHY_INTERFACE_MODE_MII) {
		if (dp83869->mode == DP83869_100M_MEDIA_CONVERT ||
		    dp83869->mode == DP83869_RGMII_100_BASE ||
		    dp83869->mode == DP83869_RGMII_COPPER_ETHERNET) {
			phy_ctrl_val |= DP83869_OP_MODE_MII;
		} else {
			phydev_err(phydev, "selected op-mode is not valid with MII mode\n");
			return -EINVAL;
		}
	}

	ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE,
			    phy_ctrl_val);
	if (ret)
		return ret;

	ret = phy_write(phydev, MII_BMCR, MII_DP83869_BMCR_DEFAULT);
	if (ret)
		return ret;

	phy_ctrl_val = (dp83869->rx_fifo_depth << DP83869_RX_FIFO_SHIFT |
			dp83869->tx_fifo_depth << DP83869_TX_FIFO_SHIFT |
			DP83869_PHY_CTRL_DEFAULT);

	switch (dp83869->mode) {
	case DP83869_RGMII_COPPER_ETHERNET:
		ret = phy_write(phydev, MII_DP83869_PHYCTRL,
				phy_ctrl_val);
		if (ret)
			return ret;

		ret = phy_write(phydev, MII_CTRL1000, DP83869_CFG1_DEFAULT);
		if (ret)
			return ret;

		ret = dp83869_configure_rgmii(phydev, dp83869);
		if (ret)
			return ret;
		break;
	case DP83869_RGMII_SGMII_BRIDGE:
		ret = phy_modify_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE,
				     DP83869_SGMII_RGMII_BRIDGE,
				     DP83869_SGMII_RGMII_BRIDGE);
		if (ret)
			return ret;

		ret = phy_write_mmd(phydev, DP83869_DEVADDR,
				    DP83869_FX_CTRL, DP83869_FX_CTRL_DEFAULT);
		if (ret)
			return ret;

		break;
	case DP83869_1000M_MEDIA_CONVERT:
		ret = phy_write(phydev, MII_DP83869_PHYCTRL,
				phy_ctrl_val);
		if (ret)
			return ret;

		ret = phy_write_mmd(phydev, DP83869_DEVADDR,
				    DP83869_FX_CTRL, DP83869_FX_CTRL_DEFAULT);
		if (ret)
			return ret;
		break;
	case DP83869_100M_MEDIA_CONVERT:
		ret = phy_write(phydev, MII_DP83869_PHYCTRL,
				phy_ctrl_val);
		if (ret)
			return ret;
		break;
	case DP83869_SGMII_COPPER_ETHERNET:
		ret = phy_write(phydev, MII_DP83869_PHYCTRL,
				phy_ctrl_val);
		if (ret)
			return ret;

		ret = phy_write(phydev, MII_CTRL1000, DP83869_CFG1_DEFAULT);
		if (ret)
			return ret;

		ret = phy_write_mmd(phydev, DP83869_DEVADDR,
				    DP83869_FX_CTRL, DP83869_FX_CTRL_DEFAULT);
		if (ret)
			return ret;

		break;
	case DP83869_RGMII_1000_BASE:
	case DP83869_RGMII_100_BASE:
		ret = dp83869_configure_fiber(phydev, dp83869);
		break;
	default:
		return -EINVAL;
	}

	return ret;
}

static int dp83869_config_init(struct phy_device *phydev)
{
	struct dp83869_private *dp83869 = phydev->priv;
	int ret, val;

	/* Force speed optimization for the PHY even if it strapped */
	ret = phy_modify(phydev, DP83869_CFG2, DP83869_DOWNSHIFT_EN,
			 DP83869_DOWNSHIFT_EN);
	if (ret)
		return ret;

	ret = dp83869_configure_mode(phydev, dp83869);
	if (ret)
		return ret;

	/* Enable Interrupt output INT_OE in CFG4 register */
	if (phy_interrupt_is_valid(phydev)) {
		val = phy_read(phydev, DP83869_CFG4);
		val |= DP83869_INT_OE;
		phy_write(phydev, DP83869_CFG4, val);
	}

	if (dp83869->port_mirroring != DP83869_PORT_MIRRORING_KEEP)
		dp83869_config_port_mirroring(phydev);

	/* Clock output selection if muxing property is set */
	if (dp83869->clk_output_sel != DP83869_CLK_O_SEL_REF_CLK)
		ret = phy_modify_mmd(phydev,
				     DP83869_DEVADDR, DP83869_IO_MUX_CFG,
				     DP83869_IO_MUX_CFG_CLK_O_SEL_MASK,
				     dp83869->clk_output_sel <<
				     DP83869_IO_MUX_CFG_CLK_O_SEL_SHIFT);

	if (phy_interface_is_rgmii(phydev)) {
		ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIIDCTL,
				    dp83869->rx_int_delay |
			dp83869->tx_int_delay << DP83869_RGMII_CLK_DELAY_SHIFT);
		if (ret)
			return ret;

		val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL);
		val |= (DP83869_RGMII_TX_CLK_DELAY_EN |
			DP83869_RGMII_RX_CLK_DELAY_EN);

		if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
			val &= ~(DP83869_RGMII_TX_CLK_DELAY_EN |
				 DP83869_RGMII_RX_CLK_DELAY_EN);

		if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
			val &= ~DP83869_RGMII_TX_CLK_DELAY_EN;

		if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
			val &= ~DP83869_RGMII_RX_CLK_DELAY_EN;

		ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL,
				    val);
	}

	return ret;
}

static int dp83869_probe(struct phy_device *phydev)
{
	struct dp83869_private *dp83869;
	int ret;

	dp83869 = devm_kzalloc(&phydev->mdio.dev, sizeof(*dp83869),
			       GFP_KERNEL);
	if (!dp83869)
		return -ENOMEM;

	phydev->priv = dp83869;

	ret = dp83869_of_init(phydev);
	if (ret)
		return ret;

	if (dp83869->mode == DP83869_RGMII_100_BASE ||
	    dp83869->mode == DP83869_RGMII_1000_BASE)
		phydev->port = PORT_FIBRE;

	return dp83869_config_init(phydev);
}

static int dp83869_phy_reset(struct phy_device *phydev)
{
	int ret;

	ret = phy_write(phydev, DP83869_CTRL, DP83869_SW_RESET);
	if (ret < 0)
		return ret;

	usleep_range(10, 20);

	/* Global sw reset sets all registers to default.
	 * Need to set the registers in the PHY to the right config.
	 */
	return dp83869_config_init(phydev);
}


#define DP83869_PHY_DRIVER(_id, _name)				\
{								\
	PHY_ID_MATCH_MODEL(_id),				\
	.name		= (_name),				\
	.probe          = dp83869_probe,			\
	.config_init	= dp83869_config_init,			\
	.soft_reset	= dp83869_phy_reset,			\
	.config_intr	= dp83869_config_intr,			\
	.handle_interrupt = dp83869_handle_interrupt,		\
	.read_status	= dp83869_read_status,			\
	.get_tunable	= dp83869_get_tunable,			\
	.set_tunable	= dp83869_set_tunable,			\
	.get_wol	= dp83869_get_wol,			\
	.set_wol	= dp83869_set_wol,			\
	.suspend	= genphy_suspend,			\
	.resume		= genphy_resume,			\
}

static struct phy_driver dp83869_driver[] = {
	DP83869_PHY_DRIVER(DP83869_PHY_ID, "TI DP83869"),
	DP83869_PHY_DRIVER(DP83561_PHY_ID, "TI DP83561-SP"),

};
module_phy_driver(dp83869_driver);

static struct mdio_device_id __maybe_unused dp83869_tbl[] = {
	{ PHY_ID_MATCH_MODEL(DP83869_PHY_ID) },
	{ PHY_ID_MATCH_MODEL(DP83561_PHY_ID) },
	{ }
};
MODULE_DEVICE_TABLE(mdio, dp83869_tbl);

MODULE_DESCRIPTION("Texas Instruments DP83869 PHY driver");
MODULE_AUTHOR("Dan Murphy <dmurphy@ti.com");
MODULE_LICENSE("GPL v2");

// SPDX-License-Identifier: GPL-2.0
/* Driver for the Texas Instruments DP83869 PHY
 * Copyright (C) 2019 Texas Instruments Inc.
 */

#include <linux/ethtool.h>
#include <linux/etherdevice.h>
#include <linux/kernel.h>
#include <linux/mii.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/phy.h>
#include <linux/delay.h>
#include <linux/bitfield.h>

#include <dt-bindings/net/ti-dp83869.h>

#define DP83869_PHY_ID		0x2000a0f1
#define DP83561_PHY_ID		0x2000a1a4
#define DP83869_DEVADDR		0x1f

#define MII_DP83869_PHYCTRL	0x10
#define MII_DP83869_MICR	0x12
#define MII_DP83869_ISR		0x13
#define DP83869_CFG2		0x14
#define DP83869_CTRL		0x1f
#define DP83869_CFG4		0x1e

/* Extended Registers */
#define DP83869_GEN_CFG3        0x0031
#define DP83869_RGMIICTL	0x0032
#define DP83869_STRAP_STS1	0x006e
#define DP83869_RGMIIDCTL	0x0086
#define DP83869_RXFCFG		0x0134
#define DP83869_RXFPMD1		0x0136
#define DP83869_RXFPMD2		0x0137
#define DP83869_RXFPMD3		0x0138
#define DP83869_RXFSOP1		0x0139
#define DP83869_RXFSOP2		0x013A
#define DP83869_RXFSOP3		0x013B
#define DP83869_IO_MUX_CFG	0x0170
#define DP83869_OP_MODE		0x01df
#define DP83869_FX_CTRL		0x0c00

#define DP83869_SW_RESET	BIT(15)
#define DP83869_SW_RESTART	BIT(14)

/* MICR Interrupt bits */
#define MII_DP83869_MICR_AN_ERR_INT_EN		BIT(15)
#define MII_DP83869_MICR_SPEED_CHNG_INT_EN	BIT(14)
#define MII_DP83869_MICR_DUP_MODE_CHNG_INT_EN	BIT(13)
#define MII_DP83869_MICR_PAGE_RXD_INT_EN	BIT(12)
#define MII_DP83869_MICR_AUTONEG_COMP_INT_EN	BIT(11)
#define MII_DP83869_MICR_LINK_STS_CHNG_INT_EN	BIT(10)
#define MII_DP83869_MICR_FALSE_CARRIER_INT_EN	BIT(8)
#define MII_DP83869_MICR_SLEEP_MODE_CHNG_INT_EN	BIT(4)
#define MII_DP83869_MICR_WOL_INT_EN		BIT(3)
#define MII_DP83869_MICR_XGMII_ERR_INT_EN	BIT(2)
#define MII_DP83869_MICR_POL_CHNG_INT_EN	BIT(1)
#define MII_DP83869_MICR_JABBER_INT_EN		BIT(0)

#define MII_DP83869_BMCR_DEFAULT	(BMCR_ANENABLE | \
					 BMCR_FULLDPLX | \
					 BMCR_SPEED1000)

#define MII_DP83869_FIBER_ADVERTISE    (ADVERTISED_FIBRE | \
					ADVERTISED_Pause | \
					ADVERTISED_Asym_Pause)

/* This is the same bit mask as the BMCR so re-use the BMCR default */
#define DP83869_FX_CTRL_DEFAULT	MII_DP83869_BMCR_DEFAULT

/* CFG1 bits */
#define DP83869_CFG1_DEFAULT	(ADVERTISE_1000HALF | \
				 ADVERTISE_1000FULL | \
				 CTL1000_AS_MASTER)

/* RGMIICTL bits */
#define DP83869_RGMII_TX_CLK_DELAY_EN		BIT(1)
#define DP83869_RGMII_RX_CLK_DELAY_EN		BIT(0)

/* RGMIIDCTL */
#define DP83869_RGMII_CLK_DELAY_SHIFT		4
#define DP83869_CLK_DELAY_DEF			7

/* STRAP_STS1 bits */
#define DP83869_STRAP_OP_MODE_MASK		GENMASK(2, 0)
#define DP83869_STRAP_STS1_RESERVED		BIT(11)
#define DP83869_STRAP_MIRROR_ENABLED           BIT(12)

/* PHYCTRL bits */
#define DP83869_RX_FIFO_SHIFT	12
#define DP83869_TX_FIFO_SHIFT	14

/* PHY_CTRL lower bytes 0x48 are declared as reserved */
#define DP83869_PHY_CTRL_DEFAULT	0x48
#define DP83869_PHYCR_FIFO_DEPTH_MASK	GENMASK(15, 12)
#define DP83869_PHYCR_RESERVED_MASK	BIT(11)

/* IO_MUX_CFG bits */
#define DP83869_IO_MUX_CFG_IO_IMPEDANCE_CTRL	0x1f

#define DP83869_IO_MUX_CFG_IO_IMPEDANCE_MAX	0x0
#define DP83869_IO_MUX_CFG_IO_IMPEDANCE_MIN	0x1f
#define DP83869_IO_MUX_CFG_CLK_O_SEL_MASK	(0x1f << 8)
#define DP83869_IO_MUX_CFG_CLK_O_SEL_SHIFT	8

/* CFG3 bits */
#define DP83869_CFG3_PORT_MIRROR_EN              BIT(0)

/* CFG4 bits */
#define DP83869_INT_OE	BIT(7)

/* OP MODE */
#define DP83869_OP_MODE_MII			BIT(5)
#define DP83869_SGMII_RGMII_BRIDGE		BIT(6)

/* RXFCFG bits*/
#define DP83869_WOL_MAGIC_EN		BIT(0)
#define DP83869_WOL_PATTERN_EN		BIT(1)
#define DP83869_WOL_BCAST_EN		BIT(2)
#define DP83869_WOL_UCAST_EN		BIT(4)
#define DP83869_WOL_SEC_EN		BIT(5)
#define DP83869_WOL_ENH_MAC		BIT(7)

/* CFG2 bits */
#define DP83869_DOWNSHIFT_EN		(BIT(8) | BIT(9))
#define DP83869_DOWNSHIFT_ATTEMPT_MASK	(BIT(10) | BIT(11))
#define DP83869_DOWNSHIFT_1_COUNT_VAL	0
#define DP83869_DOWNSHIFT_2_COUNT_VAL	1
#define DP83869_DOWNSHIFT_4_COUNT_VAL	2
#define DP83869_DOWNSHIFT_8_COUNT_VAL	3
#define DP83869_DOWNSHIFT_1_COUNT	1
#define DP83869_DOWNSHIFT_2_COUNT	2
#define DP83869_DOWNSHIFT_4_COUNT	4
#define DP83869_DOWNSHIFT_8_COUNT	8

enum {
	DP83869_PORT_MIRRORING_KEEP,
	DP83869_PORT_MIRRORING_EN,
	DP83869_PORT_MIRRORING_DIS,
};

struct dp83869_private {
	int tx_fifo_depth;
	int rx_fifo_depth;
	s32 rx_int_delay;
	s32 tx_int_delay;
	int io_impedance;
	int port_mirroring;
	bool rxctrl_strap_quirk;
	int clk_output_sel;
	int mode;
};

static int dp83869_read_status(struct phy_device *phydev)
{
	struct dp83869_private *dp83869 = phydev->priv;
	int ret;

	ret = genphy_read_status(phydev);
	if (ret)
		return ret;

	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported)) {
		if (phydev->link) {
			if (dp83869->mode == DP83869_RGMII_100_BASE)
				phydev->speed = SPEED_100;
		} else {
			#if 1
			phydev->speed = SPEED_UNKNOWN;
			phydev->duplex = DUPLEX_UNKNOWN;
			#else //Added for testing
			phydev->speed = SPEED_1000;
			phydev->duplex = DUPLEX_FULL;
			#endif
		}
	}

	return 0;
}

static int dp83869_ack_interrupt(struct phy_device *phydev)
{
	int err = phy_read(phydev, MII_DP83869_ISR);

	if (err < 0)
		return err;

	return 0;
}

static int dp83869_config_intr(struct phy_device *phydev)
{
	int micr_status = 0, err;

	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
		err = dp83869_ack_interrupt(phydev);
		if (err)
			return err;

		micr_status = phy_read(phydev, MII_DP83869_MICR);
		if (micr_status < 0)
			return micr_status;

		micr_status |=
			(MII_DP83869_MICR_AN_ERR_INT_EN |
			MII_DP83869_MICR_SPEED_CHNG_INT_EN |
			MII_DP83869_MICR_AUTONEG_COMP_INT_EN |
			MII_DP83869_MICR_LINK_STS_CHNG_INT_EN |
			MII_DP83869_MICR_DUP_MODE_CHNG_INT_EN |
			MII_DP83869_MICR_SLEEP_MODE_CHNG_INT_EN);

		err = phy_write(phydev, MII_DP83869_MICR, micr_status);
	} else {
		err = phy_write(phydev, MII_DP83869_MICR, micr_status);
		if (err)
			return err;

		err = dp83869_ack_interrupt(phydev);
	}

	return err;
}

static irqreturn_t dp83869_handle_interrupt(struct phy_device *phydev)
{
	int irq_status, irq_enabled;

	irq_status = phy_read(phydev, MII_DP83869_ISR);
	if (irq_status < 0) {
		phy_error(phydev);
		return IRQ_NONE;
	}

	irq_enabled = phy_read(phydev, MII_DP83869_MICR);
	if (irq_enabled < 0) {
		phy_error(phydev);
		return IRQ_NONE;
	}

	if (!(irq_status & irq_enabled))
		return IRQ_NONE;

	phy_trigger_machine(phydev);

	return IRQ_HANDLED;
}

static int dp83869_set_wol(struct phy_device *phydev,
			   struct ethtool_wolinfo *wol)
{
	struct net_device *ndev = phydev->attached_dev;
	int val_rxcfg, val_micr;
	const u8 *mac;
	int ret;

	val_rxcfg = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG);
	if (val_rxcfg < 0)
		return val_rxcfg;

	val_micr = phy_read(phydev, MII_DP83869_MICR);
	if (val_micr < 0)
		return val_micr;

	if (wol->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_UCAST |
			    WAKE_BCAST)) {
		val_rxcfg |= DP83869_WOL_ENH_MAC;
		val_micr |= MII_DP83869_MICR_WOL_INT_EN;

		if (wol->wolopts & WAKE_MAGIC ||
		    wol->wolopts & WAKE_MAGICSECURE) {
			mac = (const u8 *)ndev->dev_addr;

			if (!is_valid_ether_addr(mac))
				return -EINVAL;

			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
					    DP83869_RXFPMD1,
					    mac[1] << 8 | mac[0]);
			if (ret)
				return ret;

			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
					    DP83869_RXFPMD2,
					    mac[3] << 8 | mac[2]);
			if (ret)
				return ret;

			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
					    DP83869_RXFPMD3,
					    mac[5] << 8 | mac[4]);
			if (ret)
				return ret;

			val_rxcfg |= DP83869_WOL_MAGIC_EN;
		} else {
			val_rxcfg &= ~DP83869_WOL_MAGIC_EN;
		}

		if (wol->wolopts & WAKE_MAGICSECURE) {
			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
					    DP83869_RXFSOP1,
					    (wol->sopass[1] << 8) | wol->sopass[0]);
			if (ret)
				return ret;

			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
					    DP83869_RXFSOP2,
					    (wol->sopass[3] << 8) | wol->sopass[2]);
			if (ret)
				return ret;
			ret = phy_write_mmd(phydev, DP83869_DEVADDR,
					    DP83869_RXFSOP3,
					    (wol->sopass[5] << 8) | wol->sopass[4]);
			if (ret)
				return ret;

			val_rxcfg |= DP83869_WOL_SEC_EN;
		} else {
			val_rxcfg &= ~DP83869_WOL_SEC_EN;
		}

		if (wol->wolopts & WAKE_UCAST)
			val_rxcfg |= DP83869_WOL_UCAST_EN;
		else
			val_rxcfg &= ~DP83869_WOL_UCAST_EN;

		if (wol->wolopts & WAKE_BCAST)
			val_rxcfg |= DP83869_WOL_BCAST_EN;
		else
			val_rxcfg &= ~DP83869_WOL_BCAST_EN;
	} else {
		val_rxcfg &= ~DP83869_WOL_ENH_MAC;
		val_micr &= ~MII_DP83869_MICR_WOL_INT_EN;
	}

	ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG, val_rxcfg);
	if (ret)
		return ret;

	return phy_write(phydev, MII_DP83869_MICR, val_micr);
}

static void dp83869_get_wol(struct phy_device *phydev,
			    struct ethtool_wolinfo *wol)
{
	int value, sopass_val;

	wol->supported = (WAKE_UCAST | WAKE_BCAST | WAKE_MAGIC |
			WAKE_MAGICSECURE);
	wol->wolopts = 0;

	value = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG);
	if (value < 0) {
		phydev_err(phydev, "Failed to read RX CFG\n");
		return;
	}

	if (value & DP83869_WOL_UCAST_EN)
		wol->wolopts |= WAKE_UCAST;

	if (value & DP83869_WOL_BCAST_EN)
		wol->wolopts |= WAKE_BCAST;

	if (value & DP83869_WOL_MAGIC_EN)
		wol->wolopts |= WAKE_MAGIC;

	if (value & DP83869_WOL_SEC_EN) {
		sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR,
					  DP83869_RXFSOP1);
		if (sopass_val < 0) {
			phydev_err(phydev, "Failed to read RX SOP 1\n");
			return;
		}

		wol->sopass[0] = (sopass_val & 0xff);
		wol->sopass[1] = (sopass_val >> 8);

		sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR,
					  DP83869_RXFSOP2);
		if (sopass_val < 0) {
			phydev_err(phydev, "Failed to read RX SOP 2\n");
			return;
		}

		wol->sopass[2] = (sopass_val & 0xff);
		wol->sopass[3] = (sopass_val >> 8);

		sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR,
					  DP83869_RXFSOP3);
		if (sopass_val < 0) {
			phydev_err(phydev, "Failed to read RX SOP 3\n");
			return;
		}

		wol->sopass[4] = (sopass_val & 0xff);
		wol->sopass[5] = (sopass_val >> 8);

		wol->wolopts |= WAKE_MAGICSECURE;
	}

	if (!(value & DP83869_WOL_ENH_MAC))
		wol->wolopts = 0;
}

static int dp83869_get_downshift(struct phy_device *phydev, u8 *data)
{
	int val, cnt, enable, count;

	val = phy_read(phydev, DP83869_CFG2);
	if (val < 0)
		return val;

	enable = FIELD_GET(DP83869_DOWNSHIFT_EN, val);
	cnt = FIELD_GET(DP83869_DOWNSHIFT_ATTEMPT_MASK, val);

	switch (cnt) {
	case DP83869_DOWNSHIFT_1_COUNT_VAL:
		count = DP83869_DOWNSHIFT_1_COUNT;
		break;
	case DP83869_DOWNSHIFT_2_COUNT_VAL:
		count = DP83869_DOWNSHIFT_2_COUNT;
		break;
	case DP83869_DOWNSHIFT_4_COUNT_VAL:
		count = DP83869_DOWNSHIFT_4_COUNT;
		break;
	case DP83869_DOWNSHIFT_8_COUNT_VAL:
		count = DP83869_DOWNSHIFT_8_COUNT;
		break;
	default:
		return -EINVAL;
	}

	*data = enable ? count : DOWNSHIFT_DEV_DISABLE;

	return 0;
}

static int dp83869_set_downshift(struct phy_device *phydev, u8 cnt)
{
	int val, count;

	if (cnt > DP83869_DOWNSHIFT_8_COUNT)
		return -EINVAL;

	if (!cnt)
		return phy_clear_bits(phydev, DP83869_CFG2,
				      DP83869_DOWNSHIFT_EN);

	switch (cnt) {
	case DP83869_DOWNSHIFT_1_COUNT:
		count = DP83869_DOWNSHIFT_1_COUNT_VAL;
		break;
	case DP83869_DOWNSHIFT_2_COUNT:
		count = DP83869_DOWNSHIFT_2_COUNT_VAL;
		break;
	case DP83869_DOWNSHIFT_4_COUNT:
		count = DP83869_DOWNSHIFT_4_COUNT_VAL;
		break;
	case DP83869_DOWNSHIFT_8_COUNT:
		count = DP83869_DOWNSHIFT_8_COUNT_VAL;
		break;
	default:
		phydev_err(phydev,
			   "Downshift count must be 1, 2, 4 or 8\n");
		return -EINVAL;
	}

	val = DP83869_DOWNSHIFT_EN;
	val |= FIELD_PREP(DP83869_DOWNSHIFT_ATTEMPT_MASK, count);

	return phy_modify(phydev, DP83869_CFG2,
			  DP83869_DOWNSHIFT_EN | DP83869_DOWNSHIFT_ATTEMPT_MASK,
			  val);
}

static int dp83869_get_tunable(struct phy_device *phydev,
			       struct ethtool_tunable *tuna, void *data)
{
	switch (tuna->id) {
	case ETHTOOL_PHY_DOWNSHIFT:
		return dp83869_get_downshift(phydev, data);
	default:
		return -EOPNOTSUPP;
	}
}

static int dp83869_set_tunable(struct phy_device *phydev,
			       struct ethtool_tunable *tuna, const void *data)
{
	switch (tuna->id) {
	case ETHTOOL_PHY_DOWNSHIFT:
		return dp83869_set_downshift(phydev, *(const u8 *)data);
	default:
		return -EOPNOTSUPP;
	}
}

static int dp83869_config_port_mirroring(struct phy_device *phydev)
{
	struct dp83869_private *dp83869 = phydev->priv;

	if (dp83869->port_mirroring == DP83869_PORT_MIRRORING_EN)
		return phy_set_bits_mmd(phydev, DP83869_DEVADDR,
					DP83869_GEN_CFG3,
					DP83869_CFG3_PORT_MIRROR_EN);
	else
		return phy_clear_bits_mmd(phydev, DP83869_DEVADDR,
					  DP83869_GEN_CFG3,
					  DP83869_CFG3_PORT_MIRROR_EN);
}

static int dp83869_set_strapped_mode(struct phy_device *phydev)
{
	struct dp83869_private *dp83869 = phydev->priv;
	int val;

	val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1);
	if (val < 0)
		return val;

	dp83869->mode = val & DP83869_STRAP_OP_MODE_MASK;

	return 0;
}

#if IS_ENABLED(CONFIG_OF_MDIO)
static const int dp83869_internal_delay[] = {250, 500, 750, 1000, 1250, 1500,
					     1750, 2000, 2250, 2500, 2750, 3000,
					     3250, 3500, 3750, 4000};

static int dp83869_of_init(struct phy_device *phydev)
{
	struct dp83869_private *dp83869 = phydev->priv;
	struct device *dev = &phydev->mdio.dev;
	struct device_node *of_node = dev->of_node;
	int delay_size = ARRAY_SIZE(dp83869_internal_delay);
	int ret;

	if (!of_node)
		return -ENODEV;

	dp83869->io_impedance = -EINVAL;

	/* Optional configuration */
	ret = of_property_read_u32(of_node, "ti,clk-output-sel",
				   &dp83869->clk_output_sel);
	if (ret || dp83869->clk_output_sel > DP83869_CLK_O_SEL_REF_CLK)
		dp83869->clk_output_sel = DP83869_CLK_O_SEL_REF_CLK;

	ret = of_property_read_u32(of_node, "ti,op-mode", &dp83869->mode);
	if (ret == 0) {
		if (dp83869->mode < DP83869_RGMII_COPPER_ETHERNET ||
		    dp83869->mode > DP83869_SGMII_COPPER_ETHERNET)
			return -EINVAL;
	} else {
		ret = dp83869_set_strapped_mode(phydev);
		if (ret)
			return ret;
	}

	if (of_property_read_bool(of_node, "ti,max-output-impedance"))
		dp83869->io_impedance = DP83869_IO_MUX_CFG_IO_IMPEDANCE_MAX;
	else if (of_property_read_bool(of_node, "ti,min-output-impedance"))
		dp83869->io_impedance = DP83869_IO_MUX_CFG_IO_IMPEDANCE_MIN;

	if (of_property_read_bool(of_node, "enet-phy-lane-swap")) {
		dp83869->port_mirroring = DP83869_PORT_MIRRORING_EN;
	} else {
		/* If the lane swap is not in the DT then check the straps */
		ret = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1);
		if (ret < 0)
			return ret;

		if (ret & DP83869_STRAP_MIRROR_ENABLED)
			dp83869->port_mirroring = DP83869_PORT_MIRRORING_EN;
		else
			dp83869->port_mirroring = DP83869_PORT_MIRRORING_DIS;

		ret = 0;
	}

	if (of_property_read_u32(of_node, "rx-fifo-depth",
				 &dp83869->rx_fifo_depth))
		dp83869->rx_fifo_depth = DP83869_PHYCR_FIFO_DEPTH_4_B_NIB;

	if (of_property_read_u32(of_node, "tx-fifo-depth",
				 &dp83869->tx_fifo_depth))
		dp83869->tx_fifo_depth = DP83869_PHYCR_FIFO_DEPTH_4_B_NIB;

	dp83869->rx_int_delay = phy_get_internal_delay(phydev, dev,
						       &dp83869_internal_delay[0],
						       delay_size, true);
	if (dp83869->rx_int_delay < 0)
		dp83869->rx_int_delay = DP83869_CLK_DELAY_DEF;

	dp83869->tx_int_delay = phy_get_internal_delay(phydev, dev,
						       &dp83869_internal_delay[0],
						       delay_size, false);
	if (dp83869->tx_int_delay < 0)
		dp83869->tx_int_delay = DP83869_CLK_DELAY_DEF;

	return ret;
}
#else
static int dp83869_of_init(struct phy_device *phydev)
{
	return dp83869_set_strapped_mode(phydev);
}
#endif /* CONFIG_OF_MDIO */

static int dp83869_configure_rgmii(struct phy_device *phydev,
				   struct dp83869_private *dp83869)
{
	int ret = 0, val;

	if (phy_interface_is_rgmii(phydev)) {
		val = phy_read(phydev, MII_DP83869_PHYCTRL);
		if (val < 0)
			return val;

		val &= ~DP83869_PHYCR_FIFO_DEPTH_MASK;
		val |= (dp83869->tx_fifo_depth << DP83869_TX_FIFO_SHIFT);
		val |= (dp83869->rx_fifo_depth << DP83869_RX_FIFO_SHIFT);

		ret = phy_write(phydev, MII_DP83869_PHYCTRL, val);
		if (ret)
			return ret;
	}

	if (dp83869->io_impedance >= 0)
		ret = phy_modify_mmd(phydev, DP83869_DEVADDR,
				     DP83869_IO_MUX_CFG,
				     DP83869_IO_MUX_CFG_IO_IMPEDANCE_CTRL,
				     dp83869->io_impedance &
				     DP83869_IO_MUX_CFG_IO_IMPEDANCE_CTRL);

	return ret;
}

static int dp83869_configure_fiber(struct phy_device *phydev,
				   struct dp83869_private *dp83869)
{
	int bmcr;
	int ret;

	/* Only allow advertising what this PHY supports */
	linkmode_and(phydev->advertising, phydev->advertising,
		     phydev->supported);

	linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported);
	linkmode_set_bit(ADVERTISED_FIBRE, phydev->advertising);

	if (dp83869->mode == DP83869_RGMII_1000_BASE) {
		linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
				 phydev->supported);
		 #if 0 // Added for testig
		 //phydev->speed = SPEED_1000;
		 #else
		 //phy_write(phydev, MII_BMCR, 0x0140);
		 #endif
	} else {
		linkmode_set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT,
				 phydev->supported);
		linkmode_set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT,
				 phydev->supported);
		#if 0 // Added for testig
		 //phydev->speed = SPEED_100;
		#endif
	}

	/* Auto neg is not supported in 100base FX mode */
	bmcr = phy_read(phydev, MII_BMCR);
	if (bmcr < 0)
		return bmcr;

	#if 1
	phydev->autoneg = AUTONEG_DISABLE;
	#endif
	
	#if 1
	linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->supported);
	linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->advertising);
	#endif

	if (bmcr & BMCR_ANENABLE) {
	
		#if 0
		ret =  phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0);
		if (ret < 0)
			return ret;
		
		#if 1 //Added for test
		bmcr = phy_read(phydev, MII_BMCR);
		printk(KERN_ERR "dp83869: 1.bmcr: %x\n", bmcr);
		#endif

		if(dp83869->mode == DP83869_RGMII_1000_BASE){
		#if 1 //Added for test
			printk(KERN_ERR "dp83869: Setting speed 1000 - 0x%x\n", BMCR_SPEED1000);
			ret =  phy_modify(phydev, MII_BMCR, BMCR_SPEED1000, 1);
		#endif
		}else {
		#if 1 //Added for test
			printk(KERN_ERR "dp83869: Setting speed 100 - 0x%x\n", BMCR_SPEED100);
			ret =  phy_modify(phydev, MII_BMCR, BMCR_SPEED100, 1);
		#endif
		}
		#else /* Added for test */
		ret = phy_write(phydev, MII_BMCR, 0x0140);
		printk(KERN_ERR "dp83869: Writing directly 0x0140\n");
		#endif
		if (ret < 0)
			return ret;	
		
		#if 1 /* Added for test */
		bmcr = phy_read(phydev, MII_BMCR);
		printk(KERN_ERR "dp83869: 2.bmcr: 0x%x\n", bmcr);
		#endif 
	}

	/* Update advertising from supported */
	linkmode_or(phydev->advertising, phydev->advertising,
		    phydev->supported);

	return 0;
}

static int dp83869_configure_mode(struct phy_device *phydev,
				  struct dp83869_private *dp83869)
{
	int phy_ctrl_val;
	int ret;

	if (dp83869->mode < DP83869_RGMII_COPPER_ETHERNET ||
	    dp83869->mode > DP83869_SGMII_COPPER_ETHERNET)
		return -EINVAL;

	/* Below init sequence for each operational mode is defined in
	 * section 9.4.8 of the datasheet.
	 */
	phy_ctrl_val = dp83869->mode;
	if (phydev->interface == PHY_INTERFACE_MODE_MII) {
		if (dp83869->mode == DP83869_100M_MEDIA_CONVERT ||
		    dp83869->mode == DP83869_RGMII_100_BASE ||
#if 0
		    dp83869->mode == DP83869_RGMII_1000_BASE ||
#endif
		    dp83869->mode == DP83869_RGMII_COPPER_ETHERNET) {
			phy_ctrl_val |= DP83869_OP_MODE_MII;
		} else {
			phydev_err(phydev, "selected op-mode is not valid with MII mode\n");
			return -EINVAL;
		}
	}

	ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE,
			    phy_ctrl_val);
	if (ret)
		return ret;

#if 0 // Added condition for testing
	if(dp83869->mode != DP83869_RGMII_1000_BASE) 
	{
#endif
	ret = phy_write(phydev, MII_BMCR, MII_DP83869_BMCR_DEFAULT);
	if (ret)
		return ret;
#if 0 
		}
#endif

	phy_ctrl_val = (dp83869->rx_fifo_depth << DP83869_RX_FIFO_SHIFT |
			dp83869->tx_fifo_depth << DP83869_TX_FIFO_SHIFT |
			DP83869_PHY_CTRL_DEFAULT);

	switch (dp83869->mode) {
	case DP83869_RGMII_COPPER_ETHERNET:
		ret = phy_write(phydev, MII_DP83869_PHYCTRL,
				phy_ctrl_val);
		if (ret)
			return ret;

		ret = phy_write(phydev, MII_CTRL1000, DP83869_CFG1_DEFAULT);
		if (ret)
			return ret;

		ret = dp83869_configure_rgmii(phydev, dp83869);
		if (ret)
			return ret;
		printk(KERN_ERR "dp83869: Copper Ethernet\n");
		break;
	case DP83869_RGMII_SGMII_BRIDGE:
		ret = phy_modify_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE,
				     DP83869_SGMII_RGMII_BRIDGE,
				     DP83869_SGMII_RGMII_BRIDGE);
		if (ret)
			return ret;

		ret = phy_write_mmd(phydev, DP83869_DEVADDR,
				    DP83869_FX_CTRL, DP83869_FX_CTRL_DEFAULT);
		if (ret)
			return ret;

		break;
	case DP83869_1000M_MEDIA_CONVERT:
		ret = phy_write(phydev, MII_DP83869_PHYCTRL,
				phy_ctrl_val);
		if (ret)
			return ret;

		ret = phy_write_mmd(phydev, DP83869_DEVADDR,
				    DP83869_FX_CTRL, DP83869_FX_CTRL_DEFAULT);
		if (ret)
			return ret;
		break;
	case DP83869_100M_MEDIA_CONVERT:
		ret = phy_write(phydev, MII_DP83869_PHYCTRL,
				phy_ctrl_val);
		if (ret)
			return ret;
		break;
	case DP83869_SGMII_COPPER_ETHERNET:
		ret = phy_write(phydev, MII_DP83869_PHYCTRL,
				phy_ctrl_val);
		if (ret)
			return ret;

		ret = phy_write(phydev, MII_CTRL1000, DP83869_CFG1_DEFAULT);
		if (ret)
			return ret;

		ret = phy_write_mmd(phydev, DP83869_DEVADDR,
				    DP83869_FX_CTRL, DP83869_FX_CTRL_DEFAULT);
		if (ret)
			return ret;

		break;
	case DP83869_RGMII_1000_BASE:
	case DP83869_RGMII_100_BASE:
		printk(KERN_ERR "dp83869: Fiber Ethernet\n");
		ret = dp83869_configure_fiber(phydev, dp83869);
		break;
	default:
		return -EINVAL;
	}

	return ret;
}

static int dp83869_config_init(struct phy_device *phydev)
{
	struct dp83869_private *dp83869 = phydev->priv;
	int ret, val;

	/* Force speed optimization for the PHY even if it strapped */
	ret = phy_modify(phydev, DP83869_CFG2, DP83869_DOWNSHIFT_EN,
			 DP83869_DOWNSHIFT_EN);
	if (ret)
	{	
		printk(KERN_ERR "dp83869: DP83869_DOWNSHIFT_EN\n");
		return ret;
		}

	ret = dp83869_configure_mode(phydev, dp83869);
	if (ret)
	{
		printk(KERN_ERR "dp83869: dp83869_configure_mode\n");
		return ret;
		}

	/* Enable Interrupt output INT_OE in CFG4 register */
	if (phy_interrupt_is_valid(phydev)) {
		val = phy_read(phydev, DP83869_CFG4);
		val |= DP83869_INT_OE;
		phy_write(phydev, DP83869_CFG4, val);
	}

	if (dp83869->port_mirroring != DP83869_PORT_MIRRORING_KEEP)
		dp83869_config_port_mirroring(phydev);

	/* Clock output selection if muxing property is set */
	if (dp83869->clk_output_sel != DP83869_CLK_O_SEL_REF_CLK)
		ret = phy_modify_mmd(phydev,
				     DP83869_DEVADDR, DP83869_IO_MUX_CFG,
				     DP83869_IO_MUX_CFG_CLK_O_SEL_MASK,
				     dp83869->clk_output_sel <<
				     DP83869_IO_MUX_CFG_CLK_O_SEL_SHIFT);

	if (phy_interface_is_rgmii(phydev)) {
		ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIIDCTL,
				    dp83869->rx_int_delay |
			dp83869->tx_int_delay << DP83869_RGMII_CLK_DELAY_SHIFT);
		if (ret)
		{
			printk(KERN_ERR "dp83869: phy_interface_is_rgmii\n");
			return ret;
			}

		val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL);
		val |= (DP83869_RGMII_TX_CLK_DELAY_EN |
			DP83869_RGMII_RX_CLK_DELAY_EN);

		if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
			val &= ~(DP83869_RGMII_TX_CLK_DELAY_EN |
				 DP83869_RGMII_RX_CLK_DELAY_EN);

		if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
			val &= ~DP83869_RGMII_TX_CLK_DELAY_EN;

		if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
			val &= ~DP83869_RGMII_RX_CLK_DELAY_EN;

		ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL,
				    val);
	}

	return ret;
}

static int dp83869_probe(struct phy_device *phydev)
{
	struct dp83869_private *dp83869;
	int ret;
	printk(KERN_ERR "dp83869: Probing Started\n");
	dp83869 = devm_kzalloc(&phydev->mdio.dev, sizeof(*dp83869),
			       GFP_KERNEL);
	printk(KERN_ERR "dp83869: Devaddr: %px\n", dp83869);
	
	if (!dp83869)
	{
		printk(KERN_ERR "dp83869: ENOMEM\n");
		return -ENOMEM;
		}

	phydev->priv = dp83869;

	ret = dp83869_of_init(phydev);
	if (ret)
	{
		printk(KERN_ERR "dp83869: Init failed\n");
		return ret;
		}

	if (dp83869->mode == DP83869_RGMII_100_BASE ||
	    dp83869->mode == DP83869_RGMII_1000_BASE)
		phydev->port = PORT_FIBRE;

	return dp83869_config_init(phydev);
}

static int dp83869_phy_reset(struct phy_device *phydev)
{
	int ret;

	ret = phy_write(phydev, DP83869_CTRL, DP83869_SW_RESET);
	if (ret < 0)
		return ret;

	usleep_range(10, 20);
	

	/* Global sw reset sets all registers to default.
	 * Need to set the registers in the PHY to the right config.
	 */
	return dp83869_config_init(phydev);
}


#define DP83869_PHY_DRIVER(_id, _name)				\
{								\
	PHY_ID_MATCH_MODEL(_id),				\
	.name		= (_name),				\
	.probe          = dp83869_probe,			\
	.config_init	= dp83869_config_init,			\
	.soft_reset	= dp83869_phy_reset,			\
	.config_intr	= dp83869_config_intr,			\
	.handle_interrupt = dp83869_handle_interrupt,		\
	.read_status	= dp83869_read_status,			\
	.get_tunable	= dp83869_get_tunable,			\
	.set_tunable	= dp83869_set_tunable,			\
	.get_wol	= dp83869_get_wol,			\
	.set_wol	= dp83869_set_wol,			\
	.suspend	= genphy_suspend,			\
	.resume		= genphy_resume,			\
}

static struct phy_driver dp83869_driver[] = {
	DP83869_PHY_DRIVER(DP83869_PHY_ID, "TI DP83869"),
	DP83869_PHY_DRIVER(DP83561_PHY_ID, "TI DP83561-SP"),

};
module_phy_driver(dp83869_driver);

static struct mdio_device_id __maybe_unused dp83869_tbl[] = {
	{ PHY_ID_MATCH_MODEL(DP83869_PHY_ID) },
	{ PHY_ID_MATCH_MODEL(DP83561_PHY_ID) },
	{ }
};
MODULE_DEVICE_TABLE(mdio, dp83869_tbl);

MODULE_DESCRIPTION("Texas Instruments DP83869 PHY driver");
MODULE_AUTHOR("Dan Murphy <dmurphy@ti.com");
MODULE_LICENSE("GPL v2");

Thank you

Chris

Hi Chris,

Glad to see the manual configuration works to bring up the interface.

Can you please share register dumps in the following two cases to help me isolate the cause:

1) With the original driver, after using the phytool command to bring up the interface

2) With the driver update to configure_fiber, after booting.

Regarding case (2), please also try writing 0x1F = 0x4000 to see if the interface comes up after booting.

Thank you,

Evan

Dear Evan

Evan Mayhew said:

1) With the original driver, after using the phytool command to bring up the interface

Please find the original driver phy register values after boot below

Register 0x00 = 0x1140
Register 0x01 = 0x6149
Register 0x02 = 0x2000
Register 0x03 = 0xa0f3
Register 0x04 = 0x0020
Register 0x05 = 0000
Register 0x06 = 0x0004
Register 0x07 = 0x2001
Register 0x08 = 0000
Register 0x09 = 0x1b00
Register 0x0A = 0x4000
Register 0x0B = 0000
Register 0x0C = 0000
Register 0x0D = 0x401f
Register 0x0E = 0x00d2
Register 0x0F = 0xf000
Register 0x10 = 0x5408
Register 0x11 = 0xac02
Register 0x12 = 0000
Register 0x13 = 0000
Register 0x14 = 0x2bc7
Register 0x15 = 0000
Register 0x16 = 0000
Register 0x17 = 0x0040
Register 0x18 = 0x6150
Register 0x19 = 0x4440
Register 0x1A = 0x0002
Register 0x1B = 0000
Register 0x1C = 0000
Register 0x1D = 0000
Register 0x1E = 0x0012
Register 0x1F = 0000
Register 0x31 = 0x10b0
Register 0x32 = 0x00d2
Register 0x33 = 0000
Register 0x34 = 0000
Register 0x35 = 0000
Register 0x36 = 0000
Register 0x37 = 0000
Register 0x38 = 0000
Register 0x39 = 0000
Register 0x3A = 0000
Register 0x43 = 0x07a0
Register 0x44 = 0000
Register 0x45 = 0000
Register 0x46 = 0000
Register 0x47 = 0000
Register 0x48 = 0000
Register 0x49 = 0000
Register 0x4A = 0000
Register 0x4B = 0000
Register 0x4C = 0000
Register 0x4D = 0000
Register 0x4E = 0000
Register 0x4F = 0x0196
Register 0x50 = 0x0453
Register 0x51 = 0x9ada
Register 0x52 = 0x01f4
Register 0x53 = 0x2055
Register 0x54 = 0000
Register 0x55 = 0000
Register 0x56 = 0000
Register 0x57 = 0000
Register 0x58 = 0000
Register 0x59 = 0000
Register 0x5A = 0000
Register 0x5B = 0000
Register 0x5C = 0000
Register 0x5D = 0000
Register 0x5E = 0000
Register 0x5F = 0000
Register 0x60 = 0x0008
Register 0x61 = 0000
Register 0x62 = 0x0001
Register 0x63 = 0000
Register 0x64 = 0x8000
Register 0x65 = 0x43aa
Register 0x66 = 0x2334
Register 0x67 = 0x03e8
Register 0x68 = 0000
Register 0x69 = 0x0020
Register 0x6A = 0000
Register 0x6B = 0000
Register 0x6C = 0x0289
Register 0x6D = 0x8912
Register 0x6E = 0x02f2
Register 0x1DF = 0x0001
Register 0x1E0 = 0x417a
Register 0x1E1 = 0x0002
Register 0x1E2 = 0x0025
Register 0x1E3 = 0x0018
Register 0x1E4 = 0x88f7
Register 0x1E5 = 0000
Register 0x1E6 = 0x0080
Register 0x1E7 = 0x0012
Register 0x1E8 = 0x0920
Register 0x1E9 = 0x036d
Register 0x1EA = 0000
Register 0x1EB = 0x4830
Register 0x1EC = 0x1ffd
Register 0xC00 = 0x1140
Register 0xC01 = 0x614d
Register 0xC02 = 0x2000
Register 0xC03 = 0xa0f3
Register 0xC04 = 0x0020
Register 0xC05 = 0000
Register 0xC06 = 0x0004
Register 0xC07 = 0x2001
Register 0xC08 = 0000
Register 0xC09 = 0000
Register 0xC0A = 0000
Register 0xC0B = 0000
Register 0xC0C = 0000
Register 0xC0D = 0000
Register 0xC0E = 0000
Register 0xC0F = 0000
Register 0xC10 = 0x3348
Register 0xC11 = 0000
Register 0xC12 = 0x10b4
Register 0xC13 = 0x0400
Register 0xC14 = 0x0100
Register 0xC15 = 0x652a
Register 0xC16 = 0x0029
Register 0xC17 = 0x0002
Register 0xC18 = 0x01ff
Register 0xC19 = 0x0010

Please find the original driver phy register values after boot followed by a phytool command below

Register 0x00 = 0x0140
Register 0x01 = 0x614d
Register 0x02 = 0x2000
Register 0x03 = 0xa0f3
Register 0x04 = 0x0020
Register 0x05 = 0000
Register 0x06 = 0x0004
Register 0x07 = 0x2001
Register 0x08 = 0000
Register 0x09 = 0x1b00
Register 0x0A = 0x4000
Register 0x0B = 0000
Register 0x0C = 0000
Register 0x0D = 0x401f
Register 0x0E = 0000
Register 0x0F = 0xf000
Register 0x10 = 0x5408
Register 0x11 = 0xac02
Register 0x12 = 0000
Register 0x13 = 0000
Register 0x14 = 0x2bc7
Register 0x15 = 0000
Register 0x16 = 0000
Register 0x17 = 0x0040
Register 0x18 = 0x6150
Register 0x19 = 0x4440
Register 0x1A = 0x0002
Register 0x1B = 0000
Register 0x1C = 0000
Register 0x1D = 0000
Register 0x1E = 0x0012
Register 0x1F = 0000
Register 0x31 = 0x10b0
Register 0x32 = 0x00d2
Register 0x33 = 0000
Register 0x34 = 0000
Register 0x35 = 0000
Register 0x36 = 0000
Register 0x37 = 0000
Register 0x38 = 0000
Register 0x39 = 0000
Register 0x3A = 0000
Register 0x43 = 0x07a0
Register 0x44 = 0000
Register 0x45 = 0000
Register 0x46 = 0000
Register 0x47 = 0000
Register 0x48 = 0000
Register 0x49 = 0000
Register 0x4A = 0000
Register 0x4B = 0000
Register 0x4C = 0000
Register 0x4D = 0000
Register 0x4E = 0000
Register 0x4F = 0x0196
Register 0x50 = 0x0453
Register 0x51 = 0x9ada
Register 0x52 = 0x01f4
Register 0x53 = 0x2055
Register 0x54 = 0000
Register 0x55 = 0000
Register 0x56 = 0000
Register 0x57 = 0000
Register 0x58 = 0000
Register 0x59 = 0000
Register 0x5A = 0000
Register 0x5B = 0000
Register 0x5C = 0000
Register 0x5D = 0000
Register 0x5E = 0000
Register 0x5F = 0000
Register 0x60 = 0x0008
Register 0x61 = 0000
Register 0x62 = 0x0001
Register 0x63 = 0000
Register 0x64 = 0x8000
Register 0x65 = 0x43aa
Register 0x66 = 0x2334
Register 0x67 = 0x03e8
Register 0x68 = 0000
Register 0x69 = 0x0020
Register 0x6A = 0000
Register 0x6B = 0000
Register 0x6C = 0x0289
Register 0x6D = 0x8912
Register 0x6E = 0x02f2
Register 0x1DF = 0x0001
Register 0x1E0 = 0x417a
Register 0x1E1 = 0x0002
Register 0x1E2 = 0x0025
Register 0x1E3 = 0x0018
Register 0x1E4 = 0x88f7
Register 0x1E5 = 0000
Register 0x1E6 = 0x0080
Register 0x1E7 = 0x0012
Register 0x1E8 = 0x0920
Register 0x1E9 = 0x036d
Register 0x1EA = 0000
Register 0x1EB = 0x4830
Register 0x1EC = 0x1ffd
Register 0xC00 = 0x0140
Register 0xC01 = 0x614d
Register 0xC02 = 0x2000
Register 0xC03 = 0xa0f3
Register 0xC04 = 0x0020
Register 0xC05 = 0000
Register 0xC06 = 0x0004
Register 0xC07 = 0x2001
Register 0xC08 = 0000
Register 0xC09 = 0000
Register 0xC0A = 0000
Register 0xC0B = 0000
Register 0xC0C = 0000
Register 0xC0D = 0000
Register 0xC0E = 0000
Register 0xC0F = 0000
Register 0xC10 = 0x3348
Register 0xC11 = 0000
Register 0xC12 = 0x10b4
Register 0xC13 = 0x0400
Register 0xC14 = 0x0100
Register 0xC15 = 0x652a
Register 0xC16 = 0x0029
Register 0xC17 = 0x0002
Register 0xC18 = 0x01ff
Register 0xC19 = 0000

Evan Mayhew said:

2) With the driver update to configure_fiber, after booting.

Please find phy register values after boot for the driver update to configure fiber 

Register 0x00 = 0x0140
Register 0x01 = 0x6149
Register 0x02 = 0x2000
Register 0x03 = 0xa0f3
Register 0x04 = 0x0020
Register 0x05 = 0000
Register 0x06 = 0x0004
Register 0x07 = 0x2001
Register 0x08 = 0000
Register 0x09 = 0x1b00
Register 0x0A = 0x4000
Register 0x0B = 0000
Register 0x0C = 0000
Register 0x0D = 0x401f
Register 0x0E = 0x00d2
Register 0x0F = 0xf000
Register 0x10 = 0x5408
Register 0x11 = 0xac02
Register 0x12 = 0000
Register 0x13 = 0000
Register 0x14 = 0x2bc7
Register 0x15 = 0000
Register 0x16 = 0000
Register 0x17 = 0x0040
Register 0x18 = 0x6150
Register 0x19 = 0x4440
Register 0x1A = 0x0002
Register 0x1B = 0000
Register 0x1C = 0000
Register 0x1D = 0000
Register 0x1E = 0x0012
Register 0x1F = 0000
Register 0x31 = 0x10b0
Register 0x32 = 0x00d2
Register 0x33 = 0000
Register 0x34 = 0000
Register 0x35 = 0000
Register 0x36 = 0000
Register 0x37 = 0000
Register 0x38 = 0000
Register 0x39 = 0000
Register 0x3A = 0000
Register 0x43 = 0x07a0
Register 0x44 = 0000
Register 0x45 = 0000
Register 0x46 = 0000
Register 0x47 = 0000
Register 0x48 = 0000
Register 0x49 = 0000
Register 0x4A = 0000
Register 0x4B = 0000
Register 0x4C = 0000
Register 0x4D = 0000
Register 0x4E = 0000
Register 0x4F = 0x0116
Register 0x50 = 0x0453
Register 0x51 = 0x9ada
Register 0x52 = 0x01f4
Register 0x53 = 0x2055
Register 0x54 = 0000
Register 0x55 = 0000
Register 0x56 = 0000
Register 0x57 = 0000
Register 0x58 = 0000
Register 0x59 = 0000
Register 0x5A = 0000
Register 0x5B = 0000
Register 0x5C = 0000
Register 0x5D = 0000
Register 0x5E = 0000
Register 0x5F = 0000
Register 0x60 = 0x0008
Register 0x61 = 0000
Register 0x62 = 0x0001
Register 0x63 = 0000
Register 0x64 = 0x8000
Register 0x65 = 0x43aa
Register 0x66 = 0x2334
Register 0x67 = 0x03e8
Register 0x68 = 0000
Register 0x69 = 0x0020
Register 0x6A = 0000
Register 0x6B = 0000
Register 0x6C = 0x0289
Register 0x6D = 0x8912
Register 0x6E = 0x02f2
Register 0x1DF = 0x0001
Register 0x1E0 = 0x417a
Register 0x1E1 = 0x0002
Register 0x1E2 = 0x0025
Register 0x1E3 = 0x0018
Register 0x1E4 = 0x88f7
Register 0x1E5 = 0000
Register 0x1E6 = 0x0080
Register 0x1E7 = 0x0012
Register 0x1E8 = 0x0920
Register 0x1E9 = 0x036d
Register 0x1EA = 0000
Register 0x1EB = 0x4830
Register 0x1EC = 0x1ffd
Register 0xC00 = 0x0140
Register 0xC01 = 0x614d
Register 0xC02 = 0x2000
Register 0xC03 = 0xa0f3
Register 0xC04 = 0x0020
Register 0xC05 = 0000
Register 0xC06 = 0x0004
Register 0xC07 = 0x2001
Register 0xC08 = 0000
Register 0xC09 = 0000
Register 0xC0A = 0000
Register 0xC0B = 0000
Register 0xC0C = 0000
Register 0xC0D = 0000
Register 0xC0E = 0000
Register 0xC0F = 0000
Register 0xC10 = 0x3348
Register 0xC11 = 0000
Register 0xC12 = 0x10b4
Register 0xC13 = 0x0400
Register 0xC14 = 0x0100
Register 0xC15 = 0x652a
Register 0xC16 = 0x0029
Register 0xC17 = 0x0002
Register 0xC18 = 0x01ff
Register 0xC19 = 0x0010

Evan Mayhew said:

Regarding case (2), please also try writing 0x1F = 0x4000 to see if the interface comes up after booting.

No, it did not help. I tried writing the softreset value in the driver and with phytool command after booting completion. Please find the register values for the  soft reset case in the driver

Register 0x00 = 0x0140
Register 0x01 = 0x6149
Register 0x02 = 0x2000
Register 0x03 = 0xa0f3
Register 0x04 = 0x0020
Register 0x05 = 0000
Register 0x06 = 0x0004
Register 0x07 = 0x2001
Register 0x08 = 0000
Register 0x09 = 0x1b00
Register 0x0A = 0x4000
Register 0x0B = 0000
Register 0x0C = 0000
Register 0x0D = 0x401f
Register 0x0E = 0x00d2
Register 0x0F = 0xf000
Register 0x10 = 0x5408
Register 0x11 = 0xac02
Register 0x12 = 0000
Register 0x13 = 0000
Register 0x14 = 0x2bc7
Register 0x15 = 0000
Register 0x16 = 0000
Register 0x17 = 0x0040
Register 0x18 = 0x6150
Register 0x19 = 0x4440
Register 0x1A = 0x0002
Register 0x1B = 0000
Register 0x1C = 0000
Register 0x1D = 0000
Register 0x1E = 0x0012
Register 0x1F = 0000
Register 0x31 = 0x10b0
Register 0x32 = 0x00d2
Register 0x33 = 0000
Register 0x34 = 0000
Register 0x35 = 0000
Register 0x36 = 0000
Register 0x37 = 0000
Register 0x38 = 0000
Register 0x39 = 0000
Register 0x3A = 0000
Register 0x43 = 0x07a0
Register 0x44 = 0000
Register 0x45 = 0000
Register 0x46 = 0000
Register 0x47 = 0000
Register 0x48 = 0000
Register 0x49 = 0000
Register 0x4A = 0000
Register 0x4B = 0000
Register 0x4C = 0000
Register 0x4D = 0000
Register 0x4E = 0000
Register 0x4F = 0x0176
Register 0x50 = 0x0453
Register 0x51 = 0x9ada
Register 0x52 = 0x01f4
Register 0x53 = 0x2055
Register 0x54 = 0000
Register 0x55 = 0000
Register 0x56 = 0000
Register 0x57 = 0000
Register 0x58 = 0000
Register 0x59 = 0000
Register 0x5A = 0000
Register 0x5B = 0000
Register 0x5C = 0000
Register 0x5D = 0000
Register 0x5E = 0000
Register 0x5F = 0000
Register 0x60 = 0x0008
Register 0x61 = 0000
Register 0x62 = 0x0001
Register 0x63 = 0000
Register 0x64 = 0x8000
Register 0x65 = 0x43aa
Register 0x66 = 0x2334
Register 0x67 = 0x03e8
Register 0x68 = 0000
Register 0x69 = 0x0020
Register 0x6A = 0000
Register 0x6B = 0000
Register 0x6C = 0x0289
Register 0x6D = 0x8912
Register 0x6E = 0x02f2
Register 0x1DF = 0x0001
Register 0x1E0 = 0x417a
Register 0x1E1 = 0x0002
Register 0x1E2 = 0x0025
Register 0x1E3 = 0x0018
Register 0x1E4 = 0x88f7
Register 0x1E5 = 0000
Register 0x1E6 = 0x0080
Register 0x1E7 = 0x0012
Register 0x1E8 = 0x0920
Register 0x1E9 = 0x036d
Register 0x1EA = 0000
Register 0x1EB = 0x4830
Register 0x1EC = 0x1ffd
Register 0xC00 = 0x0140
Register 0xC01 = 0x614d
Register 0xC02 = 0x2000
Register 0xC03 = 0xa0f3
Register 0xC04 = 0x0020
Register 0xC05 = 0000
Register 0xC06 = 0x0004
Register 0xC07 = 0x2001
Register 0xC08 = 0000
Register 0xC09 = 0000
Register 0xC0A = 0000
Register 0xC0B = 0000
Register 0xC0C = 0000
Register 0xC0D = 0000
Register 0xC0E = 0000
Register 0xC0F = 0000
Register 0xC10 = 0x3348
Register 0xC11 = 0000
Register 0xC12 = 0x10b4
Register 0xC13 = 0x0400
Register 0xC14 = 0x0100
Register 0xC15 = 0x652a
Register 0xC16 = 0x0029
Register 0xC17 = 0x0002
Register 0xC18 = 0x01ff
Register 0xC19 = 0x0010

Thank you

Chris

Strange, the fiber register config between the passing manual case and failing case with updated driver are the same...

Is there any difference in the link partner's configuration for both cases? Can you confirm that the same forced speed is used on the link partner in both cases? Also, does re-plugging the SFP module help link in the failing case?

The two cases I am focusing on are:

1) 

Chris said:

Please find the original driver phy register values after boot followed by a phytool command below

2)

Chris said:

Please find phy register values after boot for the driver update to configure fiber 

Thank you,

Evan

Dear Evan,

Evan Mayhew said:

Is there any difference in the link partner's configuration for both cases? Can you confirm that the same forced speed is used on the link partner in both cases? Also, does re-plugging the SFP module help link in the failing case?

I'm using the same test setup and the same DTB file for both scenarios. I believe that the partner device is offering a 1G link. I've attached my test setup for reference. I'm also curious about the difference between these two cases. The only difference is that auto negotiation is disabled after boot in the first case. Could there be a state dependency in this situation?

the diff between original driver and update is also attached

--- dp83869_orig.c	2024-03-23 21:11:36.000000000 +0530
+++ dp83869.c	2024-08-14 20:02:44.206308671 +0530
@@ -655,6 +655,9 @@
 				 phydev->supported);
 		linkmode_set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT,
 				 phydev->supported);
+				 #if 1
+				 }
+				 #endif
 
 		/* Auto neg is not supported in 100base FX mode */
 		bmcr = phy_read(phydev, MII_BMCR);
@@ -670,7 +673,13 @@
 			if (ret < 0)
 				return ret;
 		}
+		#if 0
 	}
+	#endif
+	
+	#if 0 // Applying softreset
+		phy_write(phydev, DP83869_CTRL, 0x4000);
+	#endif
 
 	/* Update advertising from supported */
 	linkmode_or(phydev->advertising, phydev->advertising,

Evan Mayhew said:

Also, does re-plugging the SFP module help link in the failing case?

No. It does not.

I haven't applied any forced speed settings specifically in the driver since it's already configured to 1000 Mbps. Do you see any issues with my test setup or hardware design? Is the issue reproducible in your test setup?

Thank you

Chris

Hi Chris,

It's possible there is a state dependency - the logic for applying 0x1F = 0x4000 and re-plugging the SFP module is to reset the state and attempt link again.

There are two more bits we can try toggling for reset, please write '1' to 0xC00[15] and 0xC00[9] to attempt fiber state machine reset in failing case.

For the MC220L and switch, is it possible to configure the settings for forced 1G and disabled auto-negotiation?

Thank you,

Evan

Dear Evan,

I have tried the following 3 attempts - 3 different post boot attempts. But none them seemed worked in the failing case (driver modified for auto neg disable for 1000). Could you please check there any mistakes in the steps

1.

phytool write eth0/0xf/0x0d 0x1f
phytool write eth0/0xf/0x0e 0xc00
phytool write eth0/0xf/0x0d 0x401f
phytool write eth0/0xf/0x0e 0x8340

2.
phytool write eth0/0xf/0x0d 0x1f
phytool write eth0/0xf/0x0e 0xc00
phytool write eth0/0xf/0x0d 0x401f
phytool write eth0/0xf/0x0e 0x8140

3.

phytool write eth0/0xf/0x0d 0x1f
phytool write eth0/0xf/0x0e 0xc00
phytool write eth0/0xf/0x0d 0x401f
phytool write eth0/0xf/0x0e 0x0340

Evan Mayhew said:

For the MC220L and switch, is it possible to configure the settings for forced 1G and disabled auto-negotiation?

Those are unmanaged switch or convertor. I think it is not possible to change. The specification is shown below

Thank you

Chris

Dear Evan,

What might be wrong with the 'events_power_efficient phy_state_machine' that could lead to SP/PC misalignment? Any ideas on this? I suspect it could be causing some state issues. What are your thoughts?

Thank you

Chris

Hi Chris,

Thanks for sharing the test results, the register write sequences are correct.

I'm not clear on the implementation of this state machine, please share a diagram or further details to help me understand your suspicion.

After comparing the register dumps again, I've noticed that the Fiber link status bit (0xC01[2]) is high in both cases. However, link status in 0x1[2] is only high for the passing case. The bit in 0x1[2] is latch low and needs to be read twice for valid link up.

Chris said:

Please find phy register values after boot for the driver update to configure fiber 

For this case, please read 0x1[2] multiple times to confirm link status.

If there is any logic in the application code referencing 0x1[2] for link status, I recommend adding a duplicate register read of 0x1[2] to ensure it polls the accurate value.

Thank you,

Evan

Daer Evan,

Evan Mayhew said:

I'm not clear on the implementation of this state machine, please share a diagram or further details to help me understand your suspicion.

I'm unsure about this part. I've updated to the latest PSDK release (10.00.07.04), and while I'm no longer seeing the exception, the fiber port is still not up. Additionally, with the new PSDK release, the manual mode isn't working either.

I'm beginning to suspect that there might be a different underlying issue, possibly a hardware problem or a higher level  driver than PHY. Could you check if this is happening on your setup?

I can provide my complete DTS file and the schematic related to the SFP. Can you check if the configuration on the ethernet part is ok or not. 

Also, do we need a specific device tree for the SFP cage? In that case i think we need a hardware change. What would you suggest?"

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
 */

/dts-v1/;

#include <dt-bindings/phy/phy.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/net/ti-dp83869.h>
#include "k3-am642.dtsi"

#include "k3-serdes.h"

/ {
	compatible = "ti,am642-evm", "ti,am642";
	model = "Texas Instruments AM642 EVM";

	chosen {
		stdout-path = &main_uart0;
	};

	aliases {
		serial0 = &mcu_uart0;
		serial1 = &main_uart1;
		serial2 = &main_uart0;
		serial3 = &main_uart3;
		i2c0 = &main_i2c0;
		i2c1 = &main_i2c1;
		mmc0 = &sdhci0;
		mmc1 = &sdhci1;
		ethernet1 = &icssg1_emac0;
		ethernet2 = &icssg1_emac1;
	};

	memory@80000000 {
		bootph-all;
		device_type = "memory";
		/* 2G RAM */
		reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		secure_ddr: optee@9e800000 {
			reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
			alignment = <0x1000>;
			no-map;
		};

		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa0000000 0x00 0x100000>;
			no-map;
		};

		main_r5fss0_core0_memory_region: r5f-memory@a0100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa0100000 0x00 0xf00000>;
			no-map;
		};

		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa1000000 0x00 0x100000>;
			no-map;
		};

		main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa1100000 0x00 0xf00000>;
			no-map;
		};

		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa2000000 0x00 0x100000>;
			no-map;
		};

		main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa2100000 0x00 0xf00000>;
			no-map;
		};

		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa3000000 0x00 0x100000>;
			no-map;
		};

		main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa3100000 0x00 0xf00000>;
			no-map;
		};

		mcu_m4fss_dma_memory_region: m4f-dma-memory@a4000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa4000000 0x00 0x100000>;
			no-map;
		};

		mcu_m4fss_memory_region: m4f-memory@a4100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa4100000 0x00 0xf00000>;
			no-map;
		};

		rtos_ipc_memory_region: ipc-memories@a5000000 {
			reg = <0x00 0xa5000000 0x00 0x00800000>;
			alignment = <0x1000>;
			no-map;
		};
	};

	evm_12v0: regulator-0 {
		/* main DC jack */
		bootph-all;
		compatible = "regulator-fixed";
		regulator-name = "evm_12v0";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		regulator-always-on;
		regulator-boot-on;
	};

	vsys_5v0: regulator-1 {
		/* output of LM5140 */
		compatible = "regulator-fixed";
		regulator-name = "vsys_5v0";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		vin-supply = <&evm_12v0>;
		regulator-always-on;
		regulator-boot-on;
	};

	vsys_3v3: regulator-2 {
		/* output of LM5140 */
		bootph-all;
		compatible = "regulator-fixed";
		regulator-name = "vsys_3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		vin-supply = <&evm_12v0>;
		regulator-always-on;
		regulator-boot-on;
	};

	vddb: regulator-4 {
		compatible = "regulator-fixed";
		regulator-name = "vddb_3v3_display";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		vin-supply = <&vsys_3v3>;
		regulator-always-on;
		regulator-boot-on;
	};

	vtt_supply: regulator-5 {
		bootph-all;
		compatible = "regulator-fixed";
		regulator-name = "vtt";
		pinctrl-names = "default";
		pinctrl-0 = <&ddr_vtt_pins_default>;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&main_gpio0 12 GPIO_ACTIVE_HIGH>;
		vin-supply = <&vsys_3v3>;
		enable-active-high;
		regulator-always-on;
		regulator-boot-on;
	};

	/* temporarily commenting as for io expander test test led */
	/*
	leds {
		compatible = "gpio-leds";

		led-0 {
			label = "am64-evm:red:heartbeat";
			gpios = <&exp1 16 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
			function = LED_FUNCTION_HEARTBEAT;
			default-state = "off";
		};
	};
	*/
	
	/* 
	Adding power failure interrupt node; 
	Make use linux uio 
	https://yurovsky.github.io/2014/10/10/linux-uio-gpio-interrupt.html
	This is optional for interrupt testing; during board bringup gpio input
	read shall be sufficient
	*/	
	power_fail_detect: gpio_pf_intr { /* No register property */
		 compatible = "pf_intr,generic-uio,ui_pdrv";
	};

	transceiver1: can-phy0 {
		compatible = "ti,tcan1042";
		#phy-cells = <0>;
		max-bitrate = <5000000>;
		/* Showing error 'platform 20701000.can: deferred probe pending' so commenting the depended one which is not available */
		/*standby-gpios = <&exp1 8 GPIO_ACTIVE_HIGH>;*/
	};

	icssg1_eth: icssg1-eth {
		compatible = "ti,am642-icssg-prueth";
		pinctrl-names = "default";
		pinctrl-0 = <&icssg1_rgmii1_pins_default>, <&icssg1_rgmii2_pins_default>;
		sram = <&oc_sram>;
		ti,prus = <&pru1_0>, <&rtu1_0>, <&tx_pru1_0>, <&pru1_1>, <&rtu1_1>, <&tx_pru1_1>;
		firmware-name = "ti-pruss/am64x-sr2-pru0-prueth-fw.elf",
				"ti-pruss/am64x-sr2-rtu0-prueth-fw.elf",
				"ti-pruss/am64x-sr2-txpru0-prueth-fw.elf",
				"ti-pruss/am64x-sr2-pru1-prueth-fw.elf",
				"ti-pruss/am64x-sr2-rtu1-prueth-fw.elf",
				"ti-pruss/am64x-sr2-txpru1-prueth-fw.elf";

		ti,pruss-gp-mux-sel = <2>,	/* MII mode */
				      <2>,
				      <2>,
				      <2>,	/* MII mode */
				      <2>,
				      <2>;
		ti,mii-g-rt = <&icssg1_mii_g_rt>;
		ti,mii-rt = <&icssg1_mii_rt>;
		ti,iep = <&icssg1_iep0>,  <&icssg1_iep1>;
		ti,pa-stats = <&icssg1_pa_stats>;
		interrupt-parent = <&icssg1_intc>;
		interrupts = <24 0 2>, <25 1 3>;
		interrupt-names = "tx_ts0", "tx_ts1";
		dmas = <&main_pktdma 0xc200 15>, /* egress slice 0 */
		       <&main_pktdma 0xc201 15>, /* egress slice 0 */
		       <&main_pktdma 0xc202 15>, /* egress slice 0 */
		       <&main_pktdma 0xc203 15>, /* egress slice 0 */
		       <&main_pktdma 0xc204 15>, /* egress slice 1 */
		       <&main_pktdma 0xc205 15>, /* egress slice 1 */
		       <&main_pktdma 0xc206 15>, /* egress slice 1 */
		       <&main_pktdma 0xc207 15>, /* egress slice 1 */
		       <&main_pktdma 0x4200 15>, /* ingress slice 0 */
		       <&main_pktdma 0x4201 15>; /* ingress slice 1 */
		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
			    "rx0", "rx1";

		ethernet-ports {
			#address-cells = <1>;
			#size-cells = <0>;
			icssg1_emac0: port@0 {
				reg = <0>;
				phy-handle = <&icssg1_phy1>;
				phy-mode = "rgmii-id";
				/* Filled in by bootloader */
				local-mac-address = [00 00 00 00 00 00];
			};
			icssg1_emac1: port@1 {
				reg = <1>;
				phy-handle = <&icssg1_phy2>;
				phy-mode = "rgmii-id";				
				/* Filled in by bootloader */
				local-mac-address = [00 00 00 00 00 00];
			};
		};
	};
};

&main_pmx0 {
	main_mmc1_pins_default: main-mmc1-default-pins {
		pinctrl-single,pins = <
			AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */
			AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */
			AM64X_IOPAD(0x0288, PIN_INPUT_PULLUP, 0) /* (K21) MMC1_DAT0 */
			AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0) /* (L21) MMC1_DAT1 */
			AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0) /* (K19) MMC1_DAT2 */
			AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1_DAT3 */
			AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */
			AM64X_IOPAD(0x029c, PIN_INPUT, 0) /* (C20) MMC1_SDWP */
			AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* MMC1_CLKLB */
		>;
	};

	main_uart0_pins_default: main-uart0-default-pins {
		bootph-all;
		pinctrl-single,pins = <
			AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */
			AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */
		>;
	};

	main_spi0_pins_default: main-spi0-default-pins { /* TODO: This has to be removed */
		pinctrl-single,pins = <
			AM64X_IOPAD(0x0210, PIN_INPUT, 0) /* (D13) SPI0_CLK */
			AM64X_IOPAD(0x0208, PIN_OUTPUT, 0) /* (D12) SPI0_CS0 */
			AM64X_IOPAD(0x0214, PIN_OUTPUT, 0) /* (A13) SPI0_D0 */
			AM64X_IOPAD(0x0218, PIN_INPUT, 0) /* (A14) SPI0_D1 */
		>;
	};

	main_i2c0_pins_default: main-i2c0-default-pins {
		bootph-all;
		pinctrl-single,pins = <
			AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */
			AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */
		>;
	};

	main_i2c2_pins_default: main-i2c2-default-pins {
		bootph-all;
		pinctrl-single,pins = <
			AM64X_IOPAD(0x020c, PIN_INPUT_PULLUP, 2) /* (C13) SPI0_CS1.I2C2_SCL */
			AM64X_IOPAD(0x0220, PIN_INPUT_PULLUP, 2) /* (D14) SPI1_CS1.I2C2_SDA */
		>;
	};


	main_usb0_pins_default: main-usb0-default-pins {
		bootph-all;
		pinctrl-single,pins = <
			AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
		>;
	};

	main_mcan0_pins_default: main-mcan0-default-pins {
		pinctrl-single,pins = <
			AM64X_IOPAD(0x0254, PIN_INPUT, 0) /* (B17) MCAN0_RX */
			AM64X_IOPAD(0x0250, PIN_OUTPUT, 0) /* (A17) MCAN0_TX */
		>;
	};

	ddr_vtt_pins_default: ddr-vtt-default-pins {
		bootph-all;
		pinctrl-single,pins = <
			AM64X_IOPAD(0x0030, PIN_OUTPUT_PULLUP, 7) /* (L18) OSPI0_CSN1.GPIO0_12 */
		>;
	};

	icssg1_mdio1_pins_default: icssg1-mdio1-default-pins {
		pinctrl-single,pins = <
			AM64X_IOPAD(0x015c, PIN_OUTPUT, 0) /* (Y6) PRG1_MDIO0_MDC */
			AM64X_IOPAD(0x0158, PIN_INPUT, 0) /* (AA6) PRG1_MDIO0_MDIO */
		>;
	};

	icssg1_rgmii1_pins_default: icssg1-rgmii1-default-pins{
		pinctrl-single,pins = <
			AM64X_IOPAD(0x00b8, PIN_INPUT, 2) /* (Y7) PRG1_PRU0_GPO0.PRG1_RGMII1_RD0 */
			AM64X_IOPAD(0x00bc, PIN_INPUT, 2) /* (U8) PRG1_PRU0_GPO1.PRG1_RGMII1_RD1 */
			AM64X_IOPAD(0x00c0, PIN_INPUT, 2) /* (W8) PRG1_PRU0_GPO2.PRG1_RGMII1_RD2 */
			AM64X_IOPAD(0x00c4, PIN_INPUT, 2) /* (V8) PRG1_PRU0_GPO3.PRG1_RGMII1_RD3 */
			AM64X_IOPAD(0x00d0, PIN_INPUT, 2) /* (AA7) PRG1_PRU0_GPO6.PRG1_RGMII1_RXC */
			AM64X_IOPAD(0x00c8, PIN_INPUT, 2) /* (Y8) PRG1_PRU0_GPO4.PRG1_RGMII1_RX_CTL */
			AM64X_IOPAD(0x00e4, PIN_OUTPUT, 2) /* (AA8) PRG1_PRU0_GPO11.PRG1_RGMII1_TD0 */
			AM64X_IOPAD(0x00e8, PIN_OUTPUT, 2) /* (U9) PRG1_PRU0_GPO12.PRG1_RGMII1_TD1 */
			AM64X_IOPAD(0x00ec, PIN_OUTPUT, 2) /* (W9) PRG1_PRU0_GPO13.PRG1_RGMII1_TD2 */
			AM64X_IOPAD(0x00f0, PIN_OUTPUT, 2) /* (AA9) PRG1_PRU0_GPO14.PRG1_RGMII1_TD3 */
			AM64X_IOPAD(0x00f8, PIN_OUTPUT, 2) /* (V9) PRG1_PRU0_GPO16.PRG1_RGMII1_TXC */
			AM64X_IOPAD(0x00f4, PIN_OUTPUT, 2) /* (Y9) PRG1_PRU0_GPO15.PRG1_RGMII1_TX_CTL */
		>;
	};

	icssg1_iep0_pins_default: icssg1-iep0-default-pins {
		pinctrl-single,pins = <
			AM64X_IOPAD(0x0104, PIN_OUTPUT, 2) /* (W7) PRG1_PRU0_GPO19.PRG1_IEP0_EDC_SYNC_OUT0 */
		>;
	};

	icssg1_rgmii2_pins_default: icssg1-rgmii2-default-pins {
		pinctrl-single,pins = <
			AM64X_IOPAD(0x0108, PIN_INPUT, 2) /* (W11) PRG1_PRU1_GPO0.PRG1_RGMII2_RD0 */
			AM64X_IOPAD(0x010c, PIN_INPUT, 2) /* (V11) PRG1_PRU1_GPO1.PRG1_RGMII2_RD1 */
			AM64X_IOPAD(0x0110, PIN_INPUT, 2) /* (AA12) PRG1_PRU1_GPO2.PRG1_RGMII2_RD2 */
			AM64X_IOPAD(0x0114, PIN_INPUT, 2) /* (Y12) PRG1_PRU1_GPO3.PRG1_RGMII2_RD3 */
			AM64X_IOPAD(0x0120, PIN_INPUT, 2) /* (U11) PRG1_PRU1_GPO6.PRG1_RGMII2_RXC */
			AM64X_IOPAD(0x0118, PIN_INPUT, 2) /* (W12) PRG1_PRU1_GPO4.PRG1_RGMII2_RX_CTL */
			AM64X_IOPAD(0x0134, PIN_OUTPUT, 2) /* (AA10) PRG1_PRU1_GPO11.PRG1_RGMII2_TD0 */
			AM64X_IOPAD(0x0138, PIN_OUTPUT, 2) /* (V10) PRG1_PRU1_GPO12.PRG1_RGMII2_TD1 */
			AM64X_IOPAD(0x013c, PIN_OUTPUT, 2) /* (U10) PRG1_PRU1_GPO13.PRG1_RGMII2_TD2 */
			AM64X_IOPAD(0x0140, PIN_OUTPUT, 2) /* (AA11) PRG1_PRU1_GPO14.PRG1_RGMII2_TD3 */
			AM64X_IOPAD(0x0148, PIN_OUTPUT, 2) /* (Y10) PRG1_PRU1_GPO16.PRG1_RGMII2_TXC */
			AM64X_IOPAD(0x0144, PIN_OUTPUT, 2) /* (Y11) PRG1_PRU1_GPO15.PRG1_RGMII2_TX_CTL */
		>;
	};
	
	gpio0_pins_default: gpio0-default-pins { /* TODO: Need to update Pulls */
		pinctrl-single,pins = <
			AM64X_IOPAD(0x0000, PIN_INPUT, 7) /* (N20) OSPI0_CLK.GPIO0_0 */
			AM64X_IOPAD(0x0004, PIN_INPUT, 7) /* (N21) OSPI0_LBCLKO.GPIO0_1 */
			AM64X_IOPAD(0x0008, PIN_INPUT, 7) /* (N19) OSPI0_DQS.GPIO0_2 */
			AM64X_IOPAD(0x000c, PIN_INPUT, 7) /* (M19) OSPI0_D0.GPIO0_3 */
			AM64X_IOPAD(0x0010, PIN_OUTPUT, 7) /* (M18) OSPI0_D1.GPIO0_4 */
			AM64X_IOPAD(0x0014, PIN_OUTPUT, 7) /* (M20) OSPI0_D2.GPIO0_5 */
			AM64X_IOPAD(0x0018, PIN_OUTPUT, 7) /* (M21) OSPI0_D3.GPIO0_6 */
			AM64X_IOPAD(0x001c, PIN_OUTPUT, 7) /* (P21) OSPI0_D4.GPIO0_7 */
			AM64X_IOPAD(0x0020, PIN_OUTPUT, 7) /* (P20) OSPI0_D5.GPIO0_8 */
			AM64X_IOPAD(0x0024, PIN_OUTPUT, 7) /* (N18) OSPI0_D6.GPIO0_9 */
			AM64X_IOPAD(0x0028, PIN_OUTPUT, 7) /* (M17) OSPI0_D7.GPIO0_10 */
			AM64X_IOPAD(0x002c, PIN_OUTPUT, 7) /* (L19) OSPI0_CSn0.GPIO0_11 */
			AM64X_IOPAD(0x0030, PIN_OUTPUT, 7) /* (L18) OSPI0_CSn1.GPIO0_12 */
			AM64X_IOPAD(0x0034, PIN_OUTPUT, 7) /* (K17) OSPI0_CSn2.GPIO0_13 */
			AM64X_IOPAD(0x0038, PIN_OUTPUT, 7) /* (L17) OSPI0_CSn3.GPIO0_14 */
			AM64X_IOPAD(0x014c, PIN_OUTPUT, 7) /* (AA14) PRG1_PRU1_GPO17.GPIO0_19 */
			AM64X_IOPAD(0x0150, PIN_OUTPUT, 7) /* (Y13) PRG1_PRU1_GPO18.GPIO0_20 */
			AM64X_IOPAD(0x00a4, PIN_OUTPUT, 7) /* (N17) GPMC0_DIR.GPIO0_40 */
			AM64X_IOPAD(0x00ac, PIN_OUTPUT, 7) /* (R20) GPMC0_CSn1.GPIO0_42 */
			AM64X_IOPAD(0x00b0, PIN_INPUT, 7) /* (P19) GPMC0_CSn2.GPIO0_43 */
			AM64X_IOPAD(0x00cc, PIN_OUTPUT, 7) /* (V13) PRG1_PRU0_GPO5.GPIO0_50 */
			AM64X_IOPAD(0x00d8, PIN_OUTPUT, 7) /* (W13) PRG1_PRU0_GPO8.GPIO0_53 */
			AM64X_IOPAD(0x00dc, PIN_OUTPUT, 7) /* (U15) PRG1_PRU0_GPO9.GPIO0_54 */
			AM64X_IOPAD(0x00e0, PIN_OUTPUT, 7) /* (U14) PRG1_PRU0_GPO10.GPIO0_55 */
			AM64X_IOPAD(0x011c, PIN_OUTPUT, 7) /* (AA13) PRG1_PRU1_GPO5.GPIO0_70 */
			AM64X_IOPAD(0x0124, PIN_OUTPUT, 7) /* (V15) PRG1_PRU1_GPO7.GPIO0_72 */
			AM64X_IOPAD(0x0128, PIN_OUTPUT, 7) /* (U12) PRG1_PRU1_GPO8.GPIO0_73 */
			AM64X_IOPAD(0x012c, PIN_OUTPUT, 7) /* (V14) PRG1_PRU1_GPO9.GPIO0_74 */
			AM64X_IOPAD(0x0130, PIN_OUTPUT, 7) /* (W14) PRG1_PRU1_GPO10.GPIO0_75 */
			AM64X_IOPAD(0x0154, PIN_INPUT, 7) /* (V12) PRG1_PRU1_GPO19.GPIO0_84 */
		>;
	};
};

&main_gpio0  {
	bootph-all;
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&gpio0_pins_default>;	
	gpio-line-names = "GPIO0_0_INT_IO_EXP1",	
			  "GPIO0_1_INT_IO_EXP2",	
			  "GPIO0_2_KEY_OPEN",
			  "GPIO0_3_KEY_CLOSE",
			  "GPIO0_4_LCD_RES_PIN1",
			  "GPIO0_5_LCD_RES_PIN2",
			  "GPIO0_6_LCD_RES_PIN3",
			  "GPIO0_7_LCD_RES_PIN4",
			  "GPIO0_8_LCD_RES_PIN5",
			  "GPIO0_9_LCD_RES_PIN6",
			  "GPIO0_10_LCD_RES_PIN7",
			  "GPIO0_11_LCD_RES_PIN8",
			  "GPIO0_12_EN_VTT_TERM",
			  "GPIO0_13_EN_VPP_FUSE_RES",
			  "GPIO0_14_LCD_RES_PIN9",
			  "RES_15", "RES_16", "RES_17",
			  "RES_18",
			  "GPIO0_19_LCD_RES_PIN10",
			  "GPIO0_20_LCD_RES_PIN11",
			  "RES_21", "RES_22", "RES_23",
			  "RES_24", "RES_25", "RES_26",
			  "RES_27", "RES_28", "RES_29",
			  "RES_30", "RES_31", "RES_32",
			  "RES_33", "RES_34", "RES_35",
			  "RES_36",				  
			  "RES_37", /* Modified as per sunil 03/01/2024: conflict with trace pins */
			  "RES_38", "RES_39",
			  "GPIO0_40_LCD_RES_PIN13",
			  "RES_41", /* Modified as per Nikhil 04/01/2024: conflict with trace pins */
			  "GPIO0_42_LCD_RES_PIN15",
			  "GPIO0_43_IRIG_PULSE_IP",
			  "RES_44", "RES_45", "RES_46",
			  "RES_47", "RES_48", "RES_49",
			  "GPIO0_50_LCD_RES_PIN16",
			  "RES_51", "RES_52",
			  "GPIO0_53_LCD_RES_PIN17",
			  "GPIO0_54_LCD_RES_PIN18",
			  "GPIO0_55_LCD_RES_PIN19",
			  "RES_56", "RES_57", "RES_58",
			  "RES_59", "RES_60", "RES_61",
			  "RES_62", "RES_63", "RES_64",
			  "RES_65", "RES_66", "RES_67",
			  "RES_68", "RES_69",
			  "GPIO0_70_LCD_RES_PIN20",
			  "RES_71",
			  "GPIO0_72_RST_IO_EXP1",
			  "GPIO0_73_RST_IO_EXP2",
			  "GPIO0_74_LCD_RES_PIN14", /* Re-assigned as per Nikhil 04/01/2024: conflict with trace pins */
			  "GPIO0_75_LCD_RES_PIN12", /* Re-assigned as per sunil 03/01/2024: conflict with trace pins */
			  "RES_76", "RES_77", "RES_78",
			  "RES_79", "RES_80", "RES_81",
			  "RES_82", "RES_83",
			  "GPIO0_84_PWR_FAIL_IP",
			  "RES_85", "RES_86", "RES_87";
};

&power_fail_detect {
	status = "okay";
	interrupt-parent = <&main_gpio0>;
	interrupts = <84 IRQ_TYPE_EDGE_RISING>;
};

/* Reserved for Remote cores */
&main_gpio1  {
	status = "disabled";
};

&main_uart0 {
	bootph-all;
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart0_pins_default>;
	current-speed = <115200>;
};

/* main_uart1 is reserved for firmware usage */
&main_uart1 {
	status = "reserved";
};

&main_i2c0 {
	bootph-all;
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c0_pins_default>;
	clock-frequency = <400000>;

	tps65219: pmic@30 {
		compatible = "ti,tps65219";
		reg = <0x30>;

		regulators {
			buck1_reg: buck1 {
				regulator-name = "VDD_CORE";
				regulator-min-microvolt = <750000>;
				regulator-max-microvolt = <750000>;
				regulator-boot-on;
				regulator-always-on;
			};

			buck2_reg: buck2 {
				regulator-name = "DVDD3V3";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			buck3_reg: buck3 {
				regulator-name = "VDDS_DDR";
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1200000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo1_reg: ldo1 {
				regulator-name = "VDDSHV_SD_IO_PMIC";
				regulator-min-microvolt = <33000000>;
				regulator-max-microvolt = <33000000>;
			};

			ldo2_reg: ldo2 {
				regulator-name = "VDDAR_CORE";
				regulator-min-microvolt = <850000>;
				regulator-max-microvolt = <850000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo3_reg: ldo3 {
				regulator-name = "VDDA_1V8";
				regulator-min-microvolt = <18000000>;
				regulator-max-microvolt = <18000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo4_reg: ldo4 {
				regulator-name = "VDD_PHY_2V5";
				regulator-min-microvolt = <25000000>;
				regulator-max-microvolt = <25000000>;
				regulator-boot-on;
				regulator-always-on;
			};
		};
	};
	
	cpu_board_id_at24c512c: eeprom@50 {
		compatible = "atmel,24c512";
		reg = <0x50>;
		pagesize = <128>;
		address-width = <16>;
	};
	
	exp1: gpio@22 {
		bootph-all;
		compatible = "ti,tca6424";
		reg = <0x22>;
		gpio-controller;
		#gpio-cells = <2>;
		/* TODO: Map interrupt & Reset lines */
		/* Redefine the names as per Hardware */
		gpio-line-names = "GPIO_eMMC_RSTn", "CAN_MUX_SEL",
				  "GPIO_CPSW1_RST", "GPIO_RGMII1_RST",
				  "GPIO_RGMII2_RST", "GPIO_PCIe_RST_OUT",
				  "MMC1_SD_EN", "FSI_FET_SEL",
				  "MCAN0_STB_3V3", "MCAN1_STB_3V3",
				  "CPSW_FET_SEL", "CPSW_FET2_SEL",
				  "PRG1_RGMII2_FET_SEL", "TEST_GPIO2",
				  "GPIO_OLED_RESETn", "VPP_LDO_EN",
				  "TEST_LED1", "TP92", "TP90", "TP88",
				  "TP87", "TP86", "TP89", "TP91";
	};
	
	tmp_sensor: tmp100@48 {
		compatible = "ti,tmp100";
		reg = <0x48>;
	};
	
	rtc: pcf85363@51 {
		compatible = "nxp,pcf85363";
		reg = <0x51>;
	};
};

&main_i2c2 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c2_pins_default>;
	clock-frequency = <400000>;	
	
	hmi_exp1: gpio@22 {
		compatible = "ti,tca6424";
		reg = <0x22>;
		gpio-controller;
		#gpio-cells = <2>;
		/* TODO: Map interrupt & Reset lines */
		/* Assign the functional name as per Hardware */
		gpio-line-names = "HMI1", "HMI2",
				  "HMI3", "HMI4",
				  "HMI5", "HMI6",
				  "HMI7", "HMI8",
				  "HMI9", "HMI10",
				  "HMI11", "HMI12",
				  "HMI13", "HMI14",
				  "HMI15", "HMI16",
				  "HMI17", "HMI18",
				  "HMI19", "HMI20",
				  "HMI21", "HMI22",
				  "HMI23", "HMI24";
				  
		/* TODO: May be interrupt properties can be removed and 
		handle them from an external gpio driver
		*/		  
		interrupt-parent = <&main_gpio0>;
		interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
		
		/* TODO: It seems like this is not used by the driver;
		may be we need to use this a module and externally
		need to be reseted from the software than driver, 
		an insmode may be again required since the driver
		sets all the registers in the probing function
		*/
		reset-gpios = <&main_gpio0 72 GPIO_ACTIVE_LOW>;
	};
	
	hmi_exp2: gpio@23 {
		compatible = "ti,tca6424";
		reg = <0x23>;
		gpio-controller;
		#gpio-cells = <2>;
		/* TODO: Map interrupt & Reset lines */
		/* Assign the functional name as per Hardware */
		gpio-line-names = "HMI1", "HMI2",
				  "HMI3", "HMI4",
				  "HMI5", "HMI6",
				  "HMI7", "HMI8",
				  "HMI9", "HMI10",
				  "HMI11", "HMI12",
				  "HMI13", "HMI14",
				  "HMI15", "HMI16",
				  "HMI17", "HMI18",
				  "HMI19", "HMI20",
				  "HMI21", "HMI22",
				  "HMI23", "HMI24";
				  
		/* TODO: May be interrupt properties can be removed and 
		handle them from an external gpio driver
		*/		  
		interrupt-parent = <&main_gpio0>;
		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
		
		/* TODO: It seems like this is not used by the driver;
		may be we need to use this a module and externally
		need to be reseted from the software than driver, 
		an insmode may be again required since the driver
		sets all the registers in the probing function
		*/
		reset-gpios = <&main_gpio0 73 GPIO_ACTIVE_LOW>;
	};
};

/* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */
&mcu_gpio0 {
	status = "reserved";
};

&mcu_gpio_intr {
	status = "reserved";
};

&main_spi0 {
	status = "disabled";
	pinctrl-names = "default";
	pinctrl-0 = <&main_spi0_pins_default>;
	ti,pindir-d0-out-d1-in;
	eeprom@0 {
		compatible = "microchip,93lc46b";
		reg = <0>;
		spi-max-frequency = <1000000>;
		spi-cs-high;
		data-size = <16>;
	};
};

/* eMMC */
&sdhci0 {
	status = "okay";
	non-removable;
	ti,driver-strength-ohm = <50>;
	disable-wp;
	bootph-all;
};

/* SD/MMC */
&sdhci1 {
	bootph-all;
	status = "disabled";
};

&usbss0 {
	bootph-all;
	ti,vbus-divider;
	ti,usb2-only;
};

&usb0 {
	bootph-all;
	dr_mode = "peripheral";
	maximum-speed = "high-speed";
	pinctrl-names = "default";
	pinctrl-0 = <&main_usb0_pins_default>;
};

&cpsw3g {
	bootph-all;
	status = "disabled";
};

&cpsw_port1 {
	bootph-all;
	status = "disabled";
};

&cpsw_port2 {
	bootph-all;
	status = "disabled";
};

&cpsw3g_mdio {
	bootph-all;
	status = "disabled";
};

&tscadc0 {
	/* ADC is reserved for R5 usage */
	status = "disabled";
};

&ospi0 {
	status = "disabled";	
};

&mailbox0_cluster2 {
	status = "okay";

	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
		ti,mbox-rx = <0 0 2>;
		ti,mbox-tx = <1 0 2>;
	};

	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
		ti,mbox-rx = <2 0 2>;
		ti,mbox-tx = <3 0 2>;
	};
};

&mailbox0_cluster4 {
	status = "okay";

	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
		ti,mbox-rx = <0 0 2>;
		ti,mbox-tx = <1 0 2>;
	};

	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
		ti,mbox-rx = <2 0 2>;
		ti,mbox-tx = <3 0 2>;
	};
};

&mailbox0_cluster6 {
	status = "okay";

	mbox_m4_0: mbox-m4-0 {
		ti,mbox-rx = <0 0 2>;
		ti,mbox-tx = <1 0 2>;
	};
};

/* Reserving SRAM area for real time cores */
&oc_sram {
	main_r5fss0_core0_sram: r5f-sram@80000 {
		reg = <0x80000 0x40000>;
	};

	main_r5fss0_core1_sram: r5f-sram@c0000 {
		reg = <0xc0000 0x40000>;
	};

	main_r5fss1_core0_sram: r5f-sram@100000 {
		reg = <0x100000 0x40000>;
	};
  
	main_r5fss1_core1_sram: r5f-sram@140000 {
		reg = <0x140000 0x40000>;
	};
	
	main_shared_sram: shared_sram@180000 {
		reg = <0x180000 0x40000>;
	};
};

&main_r5fss0_core0 {
	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
	memory-region = <&main_r5fss0_core0_dma_memory_region>,
			<&main_r5fss0_core0_memory_region>;
	sram = <&main_r5fss0_core0_sram>;
};

&main_r5fss0_core1 {
	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
	memory-region = <&main_r5fss0_core1_dma_memory_region>,
			<&main_r5fss0_core1_memory_region>;
	sram = <&main_r5fss0_core1_sram>;		
};

&main_r5fss1_core0 {
	mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
	memory-region = <&main_r5fss1_core0_dma_memory_region>,
			<&main_r5fss1_core0_memory_region>;
	sram = <&main_r5fss1_core0_sram>;
};

&main_r5fss1_core1 {
	mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
	memory-region = <&main_r5fss1_core1_dma_memory_region>,
			<&main_r5fss1_core1_memory_region>;
	sram = <&main_r5fss1_core1_sram>;			
};

&mcu_m4fss {
	mboxes = <&mailbox0_cluster6 &mbox_m4_0>;
	memory-region = <&mcu_m4fss_dma_memory_region>,
			<&mcu_m4fss_memory_region>;
	status = "okay";
};

&serdes_wiz0 { // Added by chris - a crash seen in the boot log in the custom board
	status = "disabled";
};

&serdes_ln_ctrl {
	status = "disabled";
	idle-states = <AM64_SERDES0_LANE0_PCIE0>;
};

&serdes0 {
	status = "disabled";
};

&pcie0_rc {
	status = "disabled";
};

&ecap0 {
	status = "disabled";
};

&main_mcan0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_mcan0_pins_default>;
	phys = <&transceiver1>;
};

&icssg1_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&icssg1_mdio1_pins_default>;

	icssg1_phy1: ethernet-phy@f {
		reg = <0xf>;
		tx-internal-delay-ps = <250>;
		rx-internal-delay-ps = <2000>;
	};
	
	icssg1_phy2: ethernet-phy@3 { /* This is ICSSG1 RGMII2 - copper */
		reg = <3>;
		tx-internal-delay-ps = <250>;
		rx-internal-delay-ps = <2000>;
	};
};

#define TS_OFFSET(pa, val)     (0x4+(pa)*4) (0x10000 | val)

&timesync_router {
	status = "disabled";
};

&icssg1_iep0 {
	pinctrl-names = "default";
	pinctrl-0 = <&icssg1_iep0_pins_default>;
};

A3_OFC (1).pdf

Thank you

Chris

Hi Chris,

As you have seen cases with the fiber interface coming up after setting the registers manually, I suspect it is an issue with the software state machine for configuring / communicating with the PHY.

I don't expect SFP module to need a DTS, as you have seen the interface come up in past cases.

Please allow me time to review the schematic and confirm possible hardware issues.

In the meantime, could you please check the software for any instance of register 0x1[2] being referenced? For each instance, is it possible to add a duplicate register read to clear the latched link value?

Thank you,

Evan

Dear Evan

Evan Mayhew said:

In the meantime, could you please check the software for any instance of register 0x1[2] being referenced? For each instance, is it possible to add a duplicate register read to clear the latched link value?

I have added duplicate read to MII_BMSR register in the following files. But still no luck

phy_device.c

mii.c

phylink.c

Thank you

Chris

Hi Chris,

Thanks for the quick test on this.

The hardware platform I have for AM64 does not have a fiber port, so it is challenging to replicate this.

I'm checking with the Sitara team if there are any documented issues with fiber for the latest SDK release, and if there are any suggestions for debug.

If there are no hardware differences between the pass/fail cases, the issue seems to be with the MAC-side SW. DP83869 configuration for fiber is correct in both pass/fail cases.

Thank you,

Evan

Dear Evan,

Any suggestion received from Sitara team

Thank you

Chris

Hi Chris,

I have not received any feedback yet. Will share ASAP.

Thank you,

Evan

Hi Chris,

I have suggestions from Sitara team:

1) Please share a register dump for the AM64 from 0x3008_0000 to 0x300C_0000 in ICSSG1 memory map, with this register included:

2) Can you confirm activity on the RGMII clock and data lines? Is it possible to probe these lines and confirm?

Thank you,

Evan

Dear Evan,

Thanks for the message

Evan Mayhew said:

1) Please share a register dump for the AM64 from 0x3008_0000 to 0x300C_0000 in ICSSG1 memory map, with this register included:

I attempted to access /dev/mem using a program, but the values differed from those read using devmem2. To investigate, I logged the values using the devmem2 command in a loop. Please find the attached logs.

• out1.txt: Log taken after booting, with no PHY commands issued from the terminal. The fiber interface is not up.

out1.txt

out2.txt: Log taken after booting and applying the command phytool write eth0/0xf/0 0x0140 (Fiber interface comes up—this is related to our previous attempts).

out2.txt

Evan Mayhew said:

2) Can you confirm activity on the RGMII clock and data lines? Is it possible to probe these lines and confirm?

I discussed this with the hardware team, and unfortunately, probing between the MAC and PHY isn't possible with the current design layout.

Thank you

Chris

Hi Chris,

Thank you for sharing the logs. I am relaying this to Sitara team for further feedback.

Regards,

Evan

Dear Evan,

Any update from MAC team

Thanks

Chris

Hi Chris,

Apologies for the delay. I do not have feedback to yet, will share ASAP.

Thank you,

Evan

Hi Chris,

MPU team has shared feedback:

--

There is a kernel driver crash occurring, but the cause is unclear. It appears kernel driver is not able to configure the link state correctly via MDIO and program the same in FW memory as packets are dropped due to PORT disabled:

/*PRU0 diagnostic error counter which increments when RX frame is dropped due to port is disabled*/
#define NRT_INF_PORT_DISABLED_SLICE0_PASTATID 0x0138
[ 20.453090] Call trace:
[ 20.453095] phy_state_machine+0x1/0x264
[ 20.453106] worker_thread+0x13c/0x434
[ 20.453117] kthread+0x124/0x12c

MDIO is only detecting the PHY at address 3 (0x300B2408) and link at the same address, but there should be another PHY detected here?

--

In the schematic I only see one PHY, strapped to address 0xF. Is there another schematic showing second PHY at address 0x3?

Thank you,

Evan

Dear Evan,

Thanks for the analysis.

Evan Mayhew said:

There is a kernel driver crash occurring, but the cause is unclear. It appears kernel driver is not able to configure the link state correctly via MDIO and program the same in FW memory as packets are dropped due to PORT disabled:

Yes. This crash is not happening when i tried  with the latest PSDK release (10.00.07.04), but the the workaround (disabling the auto neg using command line after the boot) will not be working in that version.

Evan Mayhew said:

MDIO is only detecting the PHY at address 3 (0x300B2408) and link at the same address, but there should be another PHY detected here?

In dmesg i can see 0x03 and 0x0F. And we are able to manipulate using Phytool. There is multiplexer in the MDIO circuit. Could that make some problem. I will share the schematic of that part also.

Evan Mayhew said:

In the schematic I only see one PHY, strapped to address 0xF. Is there another schematic showing second PHY at address 0x3?

Please find the schematic attached.

 EthernetInterfaces.pdf

A3_OFC (2).pdf

Thank you

Chris

Hi Chris,

Chris said:

Yes. This crash is not happening when i tried  with the latest PSDK release (10.00.07.04), but the the workaround (disabling the auto neg using command line after the boot) will not be working in that version.

Is this the case for both existing PSDK PHY driver and latest PHY driver from Git? If so, I will check to see if there are some differences between PSDK versions for how auto-negotiation process is handled.

Can you help me understand the purpose of mux on MDIO circuit? We typically do not see switches on MDIO bus.

Thank you,

Evan