Other Parts Discussed in Thread: UCD9222
Hi,
The page 44 of Hardware Design Guide (Nov 2010) says:
5.2 DSP Power Rails
Your Keystone DSP has at a minimum four separate power supply rails. Each rail has specific requirements regarding current, ripple, and tolerance that must be strictly enforced. The following table defines the common DSP power rails and supply requirements.
But there is not a table there.
Page 47 has:
5.6 Voltage Tolerances, Noise, and Transients
Voltage tolerances specified in the data sheet include all DC tolerances and the transient response (AC) of the power supply. These specify the absolute maximum levels that must be maintained at the pins of the KeyStone DSP under all conditions. Special attention to the power supply solution is needed to achieve this level of performance, especially the 5% tolerance on the core power plane (CVDD).
To maintain the 5% tolerance at the pins, the tolerance must be a combination of the power supply DC output accuracy and the effect of transients. A reasonable goal for the DC power supply output accuracy is 2.5%, leaving 2.5% for the transients. For example, at CVDD of 1.0 V, 5% tolerance is ±50 mV. This allows 25 mV of DC accuracy from the output of the power supply and another 25 mV due to AC transients.
I am assuming then, for each rail the only spec is the tolerance given in the datasheet for each rail, and this must include all ripple and transient responses. But this section does not give any indication what transients to design for. I know the UCD9222 file for the EVM has the transition from 75% of max current to 25% max current (and vice-versa) @ 1A/us in the Time Simulation window. Is that sufficient?
Richard
