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DM6446 interlaced display

LABBE Claire
Prodigy 185 points


Regarding to the VPBE document (SPRUE37C), and regarding to the dvsdk code source with a linux kernel (linux-davinci-2.6.32), I was wondering why for the timing parameter control registers for interlaced are not set by default  as shown in figure 49 of vpbe document which shall befor the vertical timing (Interlaced) with
VINT=18
VSTART=4
VSPLS=6
VSTARTA=5.

All registers value are set to 0 when I amlooking in in the DVSDK source codes (drivers/media/video/davinci/davinci_platform.c.

The reason why I am asking this question is as follows:
I am actually facing with 3 problems with DM6446 davinci processor:
- flickering
- the black lines which can be seen on my OSD (therefore, the displayed text cannot be well reading)
- the shift in lines which displays text in "step form" at the edges of each character

I use the FBDev devices for displaying graphics of texts using the OSD layers of the hardware and V4L2 devices for streaming video usingthe video layers of the hardware

I use the frame buffer to display both OSD and video...
davincifb davincifb: dm_osd0_fb: 720x576x16@0,0 with framebuffer size 2025KB   
davincifb davincifb: dm_vid0_fb: 0x0x16@0,0 with framebuffer size 1224KB       
davincifb davincifb: dm_osd1_fb: 720x576x4@0,0 with framebuffer size 2025KB    
davincifb davincifb: dm_vid1_fb: 0x0x16@0,0 with framebuffer size 1224KB       

For your information, the interested UBoot parameters is as follows:
videostd=pal
bootargs=console=ttyS0,115200n8 root=/dev/mmcblk0p1 rootdelay=4 rw consoleblank=0 mem=108M video=davincifb:osd0=720x576,2025K@0,0:osd1=720x576,2025K davinci_enc_mngr.ch0_mode=pal davinci_enc_mngr.ch0_output=COMPOSITE

I have changed the values quoted below  in davinci_platform.c, without success (of course, I have checked that those values have been really changed).
Interlaced video was well detected, video is well displayed but not my OSD, from which parameters shall I play with ?

I have no idea how to solve my horrible display of OSD (I have an image which can illustrated well my problem of OSD display but cannot attach here.


Thanks in advance for your help,

  • 0
    Intellectual 465 points

    I am facing a strange problem.

    I am using OSDWIN0 in RGB 565 mode as display window.

    I have set the Frame Mode and Interlace is enabled.

    It seems that displayed image has some flicker when used in Interlace mode.

    Due to this image becomes unclear and seems blurred.

    I have tried displaying the image in non-interlace mode, the flicker is not
    seen, image is stable, but it seems that alternate lines are lost.



    Image in Field mode is much clear in both interlace and non-interlaced
    modes. But, it gets elongated.

    Is it possible to have clear image as Field mode in frame mode?

    If so what extra setting needs to be done for using interlace scan in Frame
    mode?

  • 0
    Guru 31670 points

    Claire,

    The timing values for the registers that you've mentioned are not required, as you are enabling composite output with PAL/NTSC timing. This is a standard timing, and the timing will be set automatically by VENC. These registers are only applicable if the timing is non-standard mode.

  • 0 in reply to Renjith Thomas
    Prodigy 185 points

    For your information, the OSD problem has been finally solved by changing the OSD_MODE register to 0x200 in the davinci_platform.c of the Linux kernel (2.6.32).

    Flickering and OSD display have both disappeared .