• State
  • Locked Locked
  • Replies 2 replies
  • Subscribers 99 subscribers
  • Views 254 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

C5505 UART interrupt problem

DSP_KungFu_Master
Intellectual 705 points
Other Parts Discussed in Thread: CODECOMPOSER

Hello,

I've noticed that my UART_Isr interrupt sometimes gets executed, but when I read the Interrupt type from the INTID bits, it returns 0 which according to the documentation is "Reserved". What is creating these kinds of interrupts and how can I prevent this? 10% of the executions of the interrupt are caused because of this unknown cause.

I'm running the UART in FIFO mode with Transmitter holding register empty interrupt enable, and Receiver data available interrupts enabled...

 

Cheers!

  • 0
    Prodigy 200 points

    Hello,

    How are you programming that, because I only get the first transmission interrupt and never more.  In the CodeComposer, the value of the UART register don't change.

    I am using CSL functions.

    Thanks!

  • 0
    Prodigy 100 points

    I recently had a similar problem, and discovered INTID bits will be ZERO if IIR is read
    successively w/o any intervening IRQ.  In my case I had incorrectly coded access to
    the IIR in the UART IRQ handler, namely I first checked the IPEND field of IIR (which
    read IIR once) and if there was an IRQ pending then checked the INTID field of IIR
    (2nd read of IIR) in both cases using CSL macros.  Once I modified my code to read
    IIR to a variable and perform the field tests on the variable the ZERO INTID cases
    vanished.

    -Jim