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J784S4XEVM: Lauterbach/Trace32 setup files

Part Number: J784S4XEVM

Tool/software:

Hello Team,

we would like to use Lauterbach Trace32 for debug and development on A72/R5F cores of the J784S4XEVM. Can you please provide the Lauterbach Trace32 setup files?

Regards,

Prasad.

  • Hello,

    Lauterbach does host demo scripts for J784S4 on their website. These show how to run basic code on each core. They also have extensive HLOS/RTOS/Bootloader scripts. You can find the basic scripts on their website here:

    TI does also have some example scripts which we periodically update in our CDDS portal. Those can be shared if the LB examples are not sufficient for what you are currently looking for.

    Regards,
    Richard W.
  • Hello Richard,

    we have a requirement for our custom board to configure the DDR using cmm scripts from A72/R5 cores.

    can you point me to get the right demo scripts to configure the DDR using R5F core / A72 cores?

    we have generated the DDR files for our custom board. we would like to take use your DDR demo scripts as a reference and add our custom DDR cmm scripts.

    do you have any video reference for the same?

    Regards,

    Prasad.

  • Hello Prasad,

    The scripts I currently have drive the setup from the M4 core.  It is possible to use an R5 or A72 core to do the same with some refactoring, however, its not necessary as the scripts will run on all chip types (GP, HS-FS, HS-SE).  For the script to run on HS versions it is necessary to enter WIR mode (which is setup in the scripts, for HS-SE you must also create a certificate and put it on path).   For the purpose of board ddr unit tests the scripts as bundled work well enough.  You would have to substitute your DDR timings into the CMM file instead of the EVM one but past that not much else is needed (assuming you are using the same input clock frequency of 19.2MHz).

    I've uploaded a 7zip of the files here.  The password is J784S4.  /cfs-file/__key/communityserver-discussions-components-files/791/1588.cmm_2D00_tda4vh_5F00_j784s4.7z

    Regards,
    Richard W.
  • Hello Richard,

    I have generated both J784S4_addr-map-offs-LP4-4266_DDR_config.gel and J784S4_addr-map-offs-LP4-4266_DDR_config.cmm files for my custom board.

    to initialize and run DDR test on custom board, just replacing above two files in the J7AHP_DDR_SI folder is sufficient?

    do you have any Trac32 debugging video for DDR memtest? 

    Regards,

    Prasad.

  • Hello Prasad,

    If the input clock to your board is the same as the EVM, then yes, just follow the readme.txt in the J7AHP_DDR_SI directory to create a J784S4_addr-map-offs-LP4-4266_DDR_config.cmm file.   Now it should be possible to launch the _J784S4_ddr_test.cmm file in the base directory.  That will init the board, the ddr, then launch a memtester.   If your board is of HS type, you will need to ensure your header allows the debugger to overdrive the EMU0 signal to the CPU, or you need to force it with a DIP switch or pull-resistor.  Pay attention to the comment-instructions in _J784S4_baremetal_setup.cmm.

    Regards,
    Richard W.