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DM355 Nand controller



Dear sir, 
Now, I am developing in DM355 evm platform, I am able to boot the linux and have prgorammed the uImage and ramdisk to NAND flash.
But after few days use, while loading the uImage via uboot(i.e,reading from Nand flash), i am getting the  Bad Data CRC error
(Not continously..once in a every 10 times boot) .I am using u-boot1.2.0.
Then I referred to u -boot2009.03 for the same dm355 evm platform from TI site.
I did some modification in u-boot1.2.0 based on u-boot2009.03
The change is...
 
       case NAND_ECC_READSYN:
                /*
                 * Our ECC calculation has already been terminated, so no need
                 * to do anything here.
                 */
                val = (*(dv_reg_p) NAND4BITECC1);
                break;
        case NAND_ECC_WRITESYN:
                    default:
                break;
 
after this change the u-boot is working fine..ie, every time it loads the uImage without Bad Data CRC error. I booted more than 50 times.

I took another board with similar problem, and programmed only the updated uboot, but in that board while loading the uImage i get Bad CRC.
So i want to make sure that whether the above patch is the real soultion to my problem,
if that is the case, with the patched  uboot, reprogramming the uImage in the 2nd board, a must ?
Next, I refer the forum to check whether my changes are valuable or not..from that time I saw some discussion about this same changes..
in the below forum link :
 
 
I remains mystery for me , 
so, Could you please explain me.. that the above mentioned changes are valuable or not???
and explain the technical reason behind it??? because customer asking me to clarify the reason for to made changes.
 
so please do the needful. Hope for your positive reply.

  • Hi,

    Referring to DM366 EMIF reference guide (http://www.ti.com/lit/ug/sprued1b/sprued1b.pdf), section 2.5.6.6.2, the steps to be followed for 4 bit ECC calculation during read are:

    1. Set the 4BITECC_START bit in the NAND Flash control register (NANDFCR ) to 1.

    2. Read 518 bytes of data from the NAND Flash.

    3. Clear the 4BITECC_START bit in NANDFCR by reading any of the NAND Flash 4-bit ECC registers.

    and so on...

    The piece of code you have added takes care of step No.3 mentioned above.

    Regards, Sudhakar