AM3517 usage of USBOTG_SELINPUTCLKFREQ bits

Takasugi Hirokazu

Hello,

The current SDK is setting "6" (reserved) instead of "7" (sys_clk) for USBOTG_SELINPUTCLKFREQ bit in CONTROL_DEVCONF2 register. These bit are set for USB PHY PLL reference clock frequency.
Does this device allow this setting? (The setting "6" is described as "reserved" in the latest TRM (Literature Number: SPRUGR0B)).

Thank you
Regards
Takasugi

over 13 years ago

0 Kevin Selva Prasanna V over 13 years ago

TI__Intellectual 1295 points

Takasugi-san,

Apologies for the delay. We have also confirmed this setting and are working with the developer to understand where this discrepancy occurs, documentation or sw. I hope to have more information soon.

0 Takasugi Hirokazu over 13 years ago in reply to Kevin Selva Prasanna V

TI__Expert 3540 points

Hello Kevin,

Thank you for your reply. The customer want to get this information. Please post information soon, if you got it.

Thank you
Regards
Takasugi

0 Jeff Culverhouse over 13 years ago

TI__Genius 9190 points

Takasugi-San,

A setting of "6" in that field sets the USB PHY clock to 13MHz. In the PSP Linux release sysclk is half of the crystal clock 26MHz so the USB PHY clock needs to be half or 13MHz.

We will work to change the TRM to show both 13MHz for a setting of "6" and 26MHz for a setting of "7".

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AM3517 usage of USBOTG_SELINPUTCLKFREQ bits