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Original question:

AM2432: Extended OTP description (rows and width)

PROCESSOR-SDK-J721S2: hardware layout question about extended OTP row

huijin lian
Prodigy 50 points

Part Number: PROCESSOR-SDK-J721S2

Tool/software:

Hi TI,

I checked the Using Extended OTP chapter in TISCI document and it shows that in J721S2 soc:

Number of bits in Extended OTP area : 1024

Number of bits per OTP row: 25

Number of OTP rows: 42

Number of OTP MMRs: 32

Initial bit offset: 2

my question is:

1. how to understand Number of OTP rows plus Number of bits per OTP row (42*25 = 1050) is bigger than Number of bits in Extended OTP area (1024) ?

2. Number of bits per OTP row in hardware is 25, MMR bit width is 32, how the data is mapping from OTP row to MMR?

3. how to understand Initial bit offset is 2?

  • +1
    TI__Guru 64915 points

    Hi huijin

    huijin lian said:

    1. how to understand Number of OTP rows plus Number of bits per OTP row (42*25 = 1050) is bigger than Number of bits in Extended OTP area (1024) ?

    I assume you have a access to "K3 Security Hardware Architecture" document, if you see the physical row configuration of J721S2 under "8.2.2 Extended OTP Physical Row Configuration" you can see that row 0th  have offset of 2 (only 23 bit in the 0th row) and row 41 have contain only one bit. So the total we have 1024 bits only (42*25-2-24=1024).

    The maximum value which we can have is 1024 bits only in the extended OTP.

    huijin lian said:

    2. Number of bits per OTP row in hardware is 25, MMR bit width is 32, how the data is mapping from OTP row to MMR?

    32 bits of OTP will be mapped to 32 BIT MMR.

    huijin lian said:
    3. how to understand Initial bit offset is 2?

    As i  mentioned above the first 2 bit of ROW 0 are reserved there are only 23 bit in the first row.  A row can have max 25 bits .These detail will get update in the documentation in the upcoming release.

    Regards
    Diwakar