TDA4VM: Enable DSS DPI on MCU3_0

Lates findings:

appDssDefaultInit -> appDssInit -> Dss_init -> Dss_dctrlDrvInit -> Dss_evtMgrFillInfo -> Dss_enableL1Event -> regVal = CSL_REG32_RD(&commRegs->VP_IRQSTATUS_1);

The boot is stack on CSL_REG32_RD

The code of Dss_enableL1Event function from ti-processor-sdk-rtos-j721s2-evm-08_06_00_11/pdk_j721s2_08_06_00_31/packages/ti/drv/dss/soc/V2/dss_soc.c:

int32_t Dss_enableL1Event(Dss_EvtMgrInfo *evtMgrInfo,
                          uint32_t dssCommonRegionId,
                          uint32_t eventGroup,
                          uint32_t event,
                          uint32_t eventCnt)
{
    int32_t retVal = FVID2_SOK;
    uint32_t regVal;
    CSL_dss_commRegs *commRegs;
    const Dss_SocInfo *socInfo;

    GT_assert(DssTrace, (NULL != evtMgrInfo));

    /* Get common register space */
    GT_0trace(DssTrace, GT_ERR, "Before Dss_getSocInfo\r\n");
    socInfo = Dss_getSocInfo();
    GT_0trace(DssTrace, GT_ERR, "After Dss_getSocInfo\r\n");

    commRegs = socInfo->commRegs[dssCommonRegionId];
    GT_assert(DssTrace, (NULL != commRegs));

    if(DSS_EVENT_GROUP_VP1 == eventGroup)
    {
        /* Clear the status of interrupt */
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_RD(&commRegs->VP_IRQSTATUS_0);\r\n");
        regVal = CSL_REG32_RD(&commRegs->VP_IRQSTATUS_0);
        GT_0trace(DssTrace, GT_ERR, "After CSL_REG32_RD(&commRegs->VP_IRQSTATUS_0);\r\n");
        regVal |= eventGroup;
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_WR(&commRegs->VP_IRQSTATUS_0, regVal);\r\n");
        CSL_REG32_WR(&commRegs->VP_IRQSTATUS_0, regVal);
        GT_0trace(DssTrace, GT_ERR, "After CSL_REG32_WR(&commRegs->VP_IRQSTATUS_0, regVal);\r\n");

        /* Enable the interrupts at the VP1 level */
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_RD(&commRegs->VP_IRQENABLE_0);\r\n");
        regVal = CSL_REG32_RD(&commRegs->VP_IRQENABLE_0);
        GT_0trace(DssTrace, GT_ERR, "After CSL_REG32_RD(&commRegs->VP_IRQENABLE_0);\r\n");
        regVal |= event;
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_WR(&commRegs->VP_IRQENABLE_0, regVal);\r\n");
        CSL_REG32_WR(&commRegs->VP_IRQENABLE_0, regVal);
        GT_0trace(DssTrace, GT_ERR, "After CSL_REG32_WR(&commRegs->VP_IRQENABLE_0, regVal);\r\n");

        /* Store the register address in evtMgrInfo instance */
        evtMgrInfo->l1EnableReg[eventCnt] = &commRegs->VP_IRQENABLE_0;
        evtMgrInfo->l1StatusReg[eventCnt] = &commRegs->VP_IRQSTATUS_0;
        evtMgrInfo->l1Mask[eventCnt] = event;
        evtMgrInfo->allEvents[eventCnt] = event;
    }
    else if(DSS_EVENT_GROUP_VP2 == eventGroup)
    {
        /* Clear the status of interrupt */
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_RD(&commRegs->VP_IRQSTATUS_1);\r\n");
        regVal = CSL_REG32_RD(&commRegs->VP_IRQSTATUS_1);
        GT_0trace(DssTrace, GT_ERR, "After CSL_REG32_RD(&commRegs->VP_IRQSTATUS_1);\r\n");
        regVal |= eventGroup;
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_WR(&commRegs->VP_IRQSTATUS_1, regVal);\r\n");
        CSL_REG32_WR(&commRegs->VP_IRQSTATUS_1, regVal);
        GT_0trace(DssTrace, GT_ERR, "After CSL_REG32_WR(&commRegs->VP_IRQSTATUS_1, regVal);\r\n");

        /* Enable the interrupts at the VP2 level */
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_RD(&commRegs->VP_IRQENABLE_1);\r\n");
        regVal = CSL_REG32_RD(&commRegs->VP_IRQENABLE_1);
        GT_0trace(DssTrace, GT_ERR, "After CSL_REG32_RD(&commRegs->VP_IRQENABLE_1);\r\n");
        regVal |= event;
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_WR(&commRegs->VP_IRQENABLE_1, regVal);\r\n");
        CSL_REG32_WR(&commRegs->VP_IRQENABLE_1, regVal);
        GT_0trace(DssTrace, GT_ERR, "After CSL_REG32_WR(&commRegs->VP_IRQENABLE_1, regVal);\r\n");

        /* Store the register address in evtMgrInfo instance */
        evtMgrInfo->l1EnableReg[eventCnt] = &commRegs->VP_IRQENABLE_1;
        evtMgrInfo->l1StatusReg[eventCnt] = &commRegs->VP_IRQSTATUS_1;
        evtMgrInfo->l1Mask[eventCnt] = event;
        evtMgrInfo->allEvents[eventCnt] = event;
    }
    else if(DSS_EVENT_GROUP_VP3 == eventGroup)
    {
        /* Clear the status of interrupt */
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_RD(&commRegs->VP_IRQSTATUS_2);\r\n");
        regVal = CSL_REG32_RD(&commRegs->VP_IRQSTATUS_2);
        GT_0trace(DssTrace, GT_ERR, "After CSL_REG32_RD(&commRegs->VP_IRQSTATUS_2);\r\n");
        regVal |= eventGroup;
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_WR(&commRegs->VP_IRQSTATUS_2, regVal);\r\n");
        CSL_REG32_WR(&commRegs->VP_IRQSTATUS_2, regVal);
        GT_0trace(DssTrace, GT_ERR, "After CSL_REG32_WR(&commRegs->VP_IRQSTATUS_2, regVal);\r\n");

        /* Enable the interrupts at the VP3 level */
        GT_0trace(DssTrace, GT_ERR, "Before regVal = CSL_REG32_RD(&commRegs->VP_IRQENABLE_2);\r\n");
        regVal = CSL_REG32_RD(&commRegs->VP_IRQENABLE_2);
        GT_0trace(DssTrace, GT_ERR, "After regVal = CSL_REG32_RD(&commRegs->VP_IRQENABLE_2);\r\n");
        regVal |= event;
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_WR(&commRegs->VP_IRQENABLE_2, regVal);\r\n");
        CSL_REG32_WR(&commRegs->VP_IRQENABLE_2, regVal);
        GT_0trace(DssTrace, GT_ERR, "After CSL_REG32_WR(&commRegs->VP_IRQENABLE_2, regVal);\r\n");

        /* Store the register address in evtMgrInfo instance */
        evtMgrInfo->l1EnableReg[eventCnt] = &commRegs->VP_IRQENABLE_2;
        evtMgrInfo->l1StatusReg[eventCnt] = &commRegs->VP_IRQSTATUS_2;
        evtMgrInfo->l1Mask[eventCnt] = event;
        evtMgrInfo->allEvents[eventCnt] = event;
    }
    else if(DSS_EVENT_GROUP_VP4 == eventGroup)
    {
        /* Clear the status of interrupt */
        GT_0trace(DssTrace, GT_ERR, "Before regVal = CSL_REG32_RD(&commRegs->VP_IRQSTATUS_3);\r\n");
        regVal = CSL_REG32_RD(&commRegs->VP_IRQSTATUS_3);
        GT_0trace(DssTrace, GT_ERR, "After regVal = CSL_REG32_RD(&commRegs->VP_IRQSTATUS_3);\r\n");
        regVal |= eventGroup;
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_WR(&commRegs->VP_IRQSTATUS_3, regVal);\r\n");
        CSL_REG32_WR(&commRegs->VP_IRQSTATUS_3, regVal);
        GT_0trace(DssTrace, GT_ERR, "After CSL_REG32_WR(&commRegs->VP_IRQSTATUS_3, regVal);\r\n");

        /* Enable the interrupts at the VP4 level */
        GT_0trace(DssTrace, GT_ERR, "Before regVal = CSL_REG32_RD(&commRegs->VP_IRQENABLE_3);\r\n");
        regVal = CSL_REG32_RD(&commRegs->VP_IRQENABLE_3);
        GT_0trace(DssTrace, GT_ERR, "After regVal = CSL_REG32_RD(&commRegs->VP_IRQENABLE_3);\r\n");
        regVal |= event;
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_WR(&commRegs->VP_IRQENABLE_3, regVal);\r\n");
        CSL_REG32_WR(&commRegs->VP_IRQENABLE_3, regVal);
        GT_0trace(DssTrace, GT_ERR, "After CSL_REG32_WR(&commRegs->VP_IRQENABLE_3, regVal);\r\n");

        /* Store the register address in evtMgrInfo instance */
        evtMgrInfo->l1EnableReg[eventCnt] = &commRegs->VP_IRQENABLE_3;
        evtMgrInfo->l1StatusReg[eventCnt] = &commRegs->VP_IRQSTATUS_3;
        evtMgrInfo->l1Mask[eventCnt] = event;
        evtMgrInfo->allEvents[eventCnt] = event;
    }
    else if(DSS_EVENT_GROUP_VID1 == eventGroup)
    {
        /* Clear the status of interrupt */
        GT_0trace(DssTrace, GT_ERR, "Before regVal = CSL_REG32_RD(&commRegs->VID_IRQSTATUS_0);\r\n");
        regVal = CSL_REG32_RD(&commRegs->VID_IRQSTATUS_0);
        GT_0trace(DssTrace, GT_ERR, "After regVal = CSL_REG32_RD(&commRegs->VID_IRQSTATUS_0);\r\n");
        regVal |= eventGroup;
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_WR(&commRegs->VID_IRQSTATUS_0, regVal);\r\n");
        CSL_REG32_WR(&commRegs->VID_IRQSTATUS_0, regVal);
        GT_0trace(DssTrace, GT_ERR, "After CSL_REG32_WR(&commRegs->VID_IRQSTATUS_0, regVal);\r\n");

        /* Enable the interrupts at the VID1 Pipe level */
        GT_0trace(DssTrace, GT_ERR, "Before regVal = CSL_REG32_RD(&commRegs->VID_IRQENABLE_0);\r\n");
        regVal = CSL_REG32_RD(&commRegs->VID_IRQENABLE_0);
        GT_0trace(DssTrace, GT_ERR, "After regVal = CSL_REG32_RD(&commRegs->VID_IRQENABLE_0);\r\n");
        regVal |= event;
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_WR(&commRegs->VID_IRQENABLE_0, regVal);\r\n");
        CSL_REG32_WR(&commRegs->VID_IRQENABLE_0, regVal);
        GT_0trace(DssTrace, GT_ERR, "After CSL_REG32_WR(&commRegs->VID_IRQENABLE_0, regVal);\r\n");

        /* Store the register address in evtMgrInfo instance */
        evtMgrInfo->l1EnableReg[eventCnt] = &commRegs->VID_IRQENABLE_0;
        evtMgrInfo->l1StatusReg[eventCnt] = &commRegs->VID_IRQSTATUS_0;
        evtMgrInfo->l1Mask[eventCnt] = event;
        evtMgrInfo->allEvents[eventCnt] = event;
    }
    else if(DSS_EVENT_GROUP_VIDL1 == eventGroup)
    {
        /* Clear the status of interrupt */
        GT_0trace(DssTrace, GT_ERR, "Before regVal = CSL_REG32_RD(&commRegs->VID_IRQSTATUS_1);\r\n");
        regVal = CSL_REG32_RD(&commRegs->VID_IRQSTATUS_1);
        GT_0trace(DssTrace, GT_ERR, "After regVal = CSL_REG32_RD(&commRegs->VID_IRQSTATUS_1);\r\n");
        regVal |= eventGroup;
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_WR(&commRegs->VID_IRQSTATUS_1, regVal);\r\n");
        CSL_REG32_WR(&commRegs->VID_IRQSTATUS_1, regVal);
        GT_0trace(DssTrace, GT_ERR, "After CSL_REG32_WR(&commRegs->VID_IRQSTATUS_1, regVal);\r\n");

        /* Enable the interrupts at the VIDL1 Pipe level */
        GT_0trace(DssTrace, GT_ERR, "Before regVal = CSL_REG32_RD(&commRegs->VID_IRQENABLE_1);\r\n");
        regVal = CSL_REG32_RD(&commRegs->VID_IRQENABLE_1);
        GT_0trace(DssTrace, GT_ERR, "After regVal = CSL_REG32_RD(&commRegs->VID_IRQENABLE_1);\r\n");
        regVal |= event;
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_WR(&commRegs->VID_IRQENABLE_1, regVal);\r\n");
        CSL_REG32_WR(&commRegs->VID_IRQENABLE_1, regVal);
        GT_0trace(DssTrace, GT_ERR, "After CSL_REG32_WR(&commRegs->VID_IRQENABLE_1, regVal);\r\n");

        /* Store the register address in evtMgrInfo instance */
        evtMgrInfo->l1EnableReg[eventCnt] = &commRegs->VID_IRQENABLE_1;
        evtMgrInfo->l1StatusReg[eventCnt] = &commRegs->VID_IRQSTATUS_1;
        evtMgrInfo->l1Mask[eventCnt] = event;
        evtMgrInfo->allEvents[eventCnt] = event;
    }
    else if(DSS_EVENT_GROUP_VID2 == eventGroup)
    {
        /* Clear the status of interrupt */
        GT_0trace(DssTrace, GT_ERR, "Before regVal = CSL_REG32_RD(&commRegs->VID_IRQSTATUS_2);\r\n");
        regVal = CSL_REG32_RD(&commRegs->VID_IRQSTATUS_2);
        GT_0trace(DssTrace, GT_ERR, "After regVal = CSL_REG32_RD(&commRegs->VID_IRQSTATUS_2);\r\n");
        regVal |= eventGroup;
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_WR(&commRegs->VID_IRQSTATUS_2, regVal);\r\n");
        CSL_REG32_WR(&commRegs->VID_IRQSTATUS_2, regVal);
        GT_0trace(DssTrace, GT_ERR, "After CSL_REG32_WR(&commRegs->VID_IRQSTATUS_2, regVal);\r\n");

        /* Enable the interrupts at the VID2 Pipe level */
        GT_0trace(DssTrace, GT_ERR, "Before regVal = CSL_REG32_RD(&commRegs->VID_IRQENABLE_2);\r\n");
        regVal = CSL_REG32_RD(&commRegs->VID_IRQENABLE_2);
        GT_0trace(DssTrace, GT_ERR, "After regVal = CSL_REG32_RD(&commRegs->VID_IRQENABLE_2);\r\n");
        regVal |= event;
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_WR(&commRegs->VID_IRQENABLE_2, regVal);\r\n");
        CSL_REG32_WR(&commRegs->VID_IRQENABLE_2, regVal);
        GT_0trace(DssTrace, GT_ERR, "After CSL_REG32_WR(&commRegs->VID_IRQENABLE_2, regVal);\r\n");

        /* Store the register address in evtMgrInfo instance */
        evtMgrInfo->l1EnableReg[eventCnt] = &commRegs->VID_IRQENABLE_2;
        evtMgrInfo->l1StatusReg[eventCnt] = &commRegs->VID_IRQSTATUS_2;
        evtMgrInfo->l1Mask[eventCnt] = event;
        evtMgrInfo->allEvents[eventCnt] = event;
    }
    else if(DSS_EVENT_GROUP_VIDL2 == eventGroup)
    {
        /* Clear the status of interrupt */
        GT_0trace(DssTrace, GT_ERR, "Before regVal = CSL_REG32_RD(&commRegs->VID_IRQSTATUS_3);\r\n");
        regVal = CSL_REG32_RD(&commRegs->VID_IRQSTATUS_3);
        GT_0trace(DssTrace, GT_ERR, "After regVal = CSL_REG32_RD(&commRegs->VID_IRQSTATUS_3);\r\n");
        regVal |= eventGroup;
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_WR(&commRegs->VID_IRQSTATUS_3, regVal);\r\n");
        CSL_REG32_WR(&commRegs->VID_IRQSTATUS_3, regVal);
        GT_0trace(DssTrace, GT_ERR, "After CSL_REG32_WR(&commRegs->VID_IRQSTATUS_3, regVal);\r\n");

        /* Enable the interrupts at the VIDL2 Pipe level */
        GT_0trace(DssTrace, GT_ERR, "Before regVal = CSL_REG32_RD(&commRegs->VID_IRQENABLE_3);\r\n");
        regVal = CSL_REG32_RD(&commRegs->VID_IRQENABLE_3);
        GT_0trace(DssTrace, GT_ERR, "After regVal = CSL_REG32_RD(&commRegs->VID_IRQENABLE_3);\r\n");
        regVal |= event;
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_WR(&commRegs->VID_IRQENABLE_3, regVal);\r\n");
        CSL_REG32_WR(&commRegs->VID_IRQENABLE_3, regVal);
        GT_0trace(DssTrace, GT_ERR, "After CSL_REG32_WR(&commRegs->VID_IRQENABLE_3, regVal);\r\n");

        /* Store the register address in evtMgrInfo instance */
        evtMgrInfo->l1EnableReg[eventCnt] = &commRegs->VID_IRQENABLE_3;
        evtMgrInfo->l1StatusReg[eventCnt] = &commRegs->VID_IRQSTATUS_3;
        evtMgrInfo->l1Mask[eventCnt] = event;
        evtMgrInfo->allEvents[eventCnt] = event;
    }
    else if(DSS_EVENT_GROUP_WB == eventGroup)
    {
        /* Clear the status of interrupt */
        GT_0trace(DssTrace, GT_ERR, "Before regVal = CSL_REG32_RD(&commRegs->WB_IRQSTATUS);\r\n");
        regVal = CSL_REG32_RD(&commRegs->WB_IRQSTATUS);
        GT_0trace(DssTrace, GT_ERR, "Before regVal = CSL_REG32_RD(&commRegs->WB_IRQSTATUS);\r\n");
        regVal |= eventGroup;
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_WR(&commRegs->WB_IRQSTATUS, regVal);\r\n");
        CSL_REG32_WR(&commRegs->WB_IRQSTATUS, regVal);
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_WR(&commRegs->WB_IRQSTATUS, regVal);\r\n");

        /* Enable the interrupts at the WB Pipe level */
        GT_0trace(DssTrace, GT_ERR, "Before regVal = CSL_REG32_RD(&commRegs->WB_IRQENABLE);\r\n");
        regVal = CSL_REG32_RD(&commRegs->WB_IRQENABLE);
        GT_0trace(DssTrace, GT_ERR, "Before regVal = CSL_REG32_RD(&commRegs->WB_IRQENABLE);\r\n");
        regVal |= event;
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_WR(&commRegs->WB_IRQENABLE, regVal);\r\n");
        CSL_REG32_WR(&commRegs->WB_IRQENABLE, regVal);
        GT_0trace(DssTrace, GT_ERR, "Before CSL_REG32_WR(&commRegs->WB_IRQENABLE, regVal);\r\n");

        /* Store the register address in evtMgrInfo instance */
        evtMgrInfo->l1EnableReg[eventCnt] = &commRegs->WB_IRQENABLE;
        evtMgrInfo->l1StatusReg[eventCnt] = &commRegs->WB_IRQSTATUS;
        evtMgrInfo->l1Mask[eventCnt] = event;
        evtMgrInfo->allEvents[eventCnt] = event;
    }
    else
    {
        GT_assert(DssTrace, FALSE);
        retVal = FVID2_EBADARGS;
    }

    return retVal;
}

Log output:

root@j721s2-evm:/opt/edgeai-gst-apps# /opt/vision_apps-v3/vx_app_arm_remote_log.out 
[MCU2_0]     23.870007 s: CIO: Init ... Done !!!
[MCU2_0]     23.870057 s: ### CPU Frequency = 1000000000 Hz
[MCU2_0]     23.870089 s: CPU is running FreeRTOS
[MCU2_0]     23.870110 s: APP: Init ... !!!
[MCU2_0]     23.870130 s: SCICLIENT: Init ... !!!
[MCU2_0]     23.870243 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[MCU2_0]     23.870277 s: SCICLIENT: DMSC FW revision 0x9  
[MCU2_0]     23.870303 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_0]     23.870335 s: SCICLIENT: Init ... Done !!!
[MCU2_0]     23.870358 s: UDMA: Init ... !!!
[MCU2_0]     23.871105 s: UDMA: Init ... Done !!!
[MCU2_0]     23.871138 s: UDMA: Init ... !!!
[MCU2_0]     23.871575 s: UDMA: Init for CSITX/CSIRX ... Done !!!
[MCU2_0]     23.871624 s: MEM: Init ... !!!
[MCU2_0]     23.871664 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ d9000000 of size 16777216 bytes !!!
[MCU2_0]     23.871723 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 60000000 of size 524288 bytes !!!
[MCU2_0]     23.871775 s: MEM: Init ... Done !!!
[MCU2_0]     23.871797 s: IPC: Init ... !!!
[MCU2_0]     23.871843 s: IPC: 5 CPUs participating in IPC !!!
[MCU2_0]     23.871878 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_0]     23.871905 s: IPC: HLOS is ready !!!
[MCU2_0]     23.881494 s: IPC: Init ... Done !!!
[MCU2_0]     23.881533 s: APP: Syncing with 5 CPUs ... !!!
[MCU2_0]     24.344734 s: APP: Syncing with 5 CPUs ... Done !!!
[MCU2_0]     24.344771 s: REMOTE_SERVICE: Init ... !!!
[MCU2_0]     24.346253 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_0]     24.346289 s: FVID2: Init ... !!!
[MCU2_0]     24.346346 s: FVID2: Init ... Done !!!
[MCU2_0]     24.346369 s: VHWA: VPAC Init ... !!!
[MCU2_0]     24.346391 s: SCICLIENT: Sciclient_pmSetModuleState module=361 state=2
[MCU2_0]     24.346510 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.346538 s: VHWA: LDC Init ... !!!
[MCU2_0]     24.349269 s: VHWA: LDC Init ... Done !!!
[MCU2_0]     24.349305 s: VHWA: MSC Init ... !!!
[MCU2_0]     24.358885 s: VHWA: MSC Init ... Done !!!
[MCU2_0]     24.358919 s: VHWA: NF Init ... !!!
[MCU2_0]     24.359766 s: VHWA: NF Init ... Done !!!
[MCU2_0]     24.359796 s: VHWA: VISS Init ... !!!
[MCU2_0]     24.366482 s: VHWA: VISS Init ... Done !!!
[MCU2_0]     24.366525 s: VHWA: VPAC Init ... Done !!!
[MCU2_0]     24.366561 s:  VX_ZONE_INIT:Enabled
[MCU2_0]     24.366586 s:  VX_ZONE_ERROR:Enabled
[MCU2_0]     24.366609 s:  VX_ZONE_WARNING:Enabled
[MCU2_0]     24.367603 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-0 
[MCU2_0]     24.367787 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_NF 
[MCU2_0]     24.367961 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_LDC1 
[MCU2_0]     24.368128 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC1 
[MCU2_0]     24.368298 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC2 
[MCU2_0]     24.368512 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_VISS1 
[MCU2_0]     24.368734 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE1 
[MCU2_0]     24.368945 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE2 
[MCU2_0]     24.369140 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY1 
[MCU2_0]     24.369333 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY2 
[MCU2_0]     24.369523 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CSITX 
[MCU2_0]     24.369723 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE3 
[MCU2_0]     24.369924 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE4 
[MCU2_0]     24.370131 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE5 
[MCU2_0]     24.370305 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE6 
[MCU2_0]     24.370509 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE7 
[MCU2_0]     24.370726 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE8 
[MCU2_0]     24.370924 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M1 
[MCU2_0]     24.371110 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M2 
[MCU2_0]     24.371286 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M3 
[MCU2_0]     24.371465 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M4 
[MCU2_0]     24.371667 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CSITX2 
[MCU2_0]     24.371710 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU2_0]     24.371741 s: APP: OpenVX Target kernel init ... !!!
[MCU2_0]     24.402007 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_0]     24.402042 s: VISS REMOTE SERVICE: Init ... !!!
[MCU2_0]     24.402098 s: VISS REMOTE SERVICE: Init ... Done !!!
[MCU2_0]     24.402125 s: UDMA Copy: Init ... !!!
[MCU2_0]     24.402954 s: UDMA Copy: Init ... Done !!!
[MCU2_0]     24.403017 s: APP: Init ... Done !!!
[MCU2_0]     24.403042 s: APP: Run ... !!!
[MCU2_0]     24.403063 s: IPC: Starting echo test ...
[MCU2_0]     24.405464 s: APP: Run ... Done !!!
[MCU2_0]     24.406148 s: IPC: Echo status: mcu2_0[s] mcu2_1[.] mcu3_0[x] C7X_1[P] C7X_2[.] 
[MCU2_0]     24.406226 s: IPC: Echo status: mcu2_0[s] mcu2_1[P] mcu3_0[x] C7X_1[P] C7X_2[.] 
[MCU2_0]     24.406294 s: IPC: Echo status: mcu2_0[s] mcu2_1[P] mcu3_0[x] C7X_1[P] C7X_2[P] 
[MCU2_1]     24.095520 s: CIO: Init ... Done !!!
[MCU2_1]     24.095571 s: ### CPU Frequency = 1000000000 Hz
[MCU2_1]     24.095600 s: CPU is running FreeRTOS
[MCU2_1]     24.095621 s: APP: Init ... !!!
[MCU2_1]     24.095640 s: SCICLIENT: Init ... !!!
[MCU2_1]     24.095754 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[MCU2_1]     24.095786 s: SCICLIENT: DMSC FW revision 0x9  
[MCU2_1]     24.095813 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_1]     24.095843 s: SCICLIENT: Init ... Done !!!
[MCU2_1]     24.095866 s: UDMA: Init ... !!!
[MCU2_1]     24.096676 s: UDMA: Init ... Done !!!
[MCU2_1]     24.096722 s: MEM: Init ... !!!
[MCU2_1]     24.096757 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ da000000 of size 16777216 bytes !!!
[MCU2_1]     24.096815 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 60080000 of size 524288 bytes !!!
[MCU2_1]     24.096865 s: MEM: Init ... Done !!!
[MCU2_1]     24.096886 s: IPC: Init ... !!!
[MCU2_1]     24.096931 s: IPC: 5 CPUs participating in IPC !!!
[MCU2_1]     24.096965 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_1]     24.096991 s: IPC: HLOS is ready !!!
[MCU2_1]     24.106484 s: IPC: Init ... Done !!!
[MCU2_1]     24.106525 s: APP: Syncing with 5 CPUs ... !!!
[MCU2_1]     24.344733 s: APP: Syncing with 5 CPUs ... Done !!!
[MCU2_1]     24.344765 s: REMOTE_SERVICE: Init ... !!!
[MCU2_1]     24.346094 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_1]     24.346132 s: FVID2: Init ... !!!
[MCU2_1]     24.346188 s: FVID2: Init ... Done !!!
[MCU2_1]     24.346211 s: VHWA: DMPAC: Init ... !!!
[MCU2_1]     24.346232 s: SCICLIENT: Sciclient_pmSetModuleState module=58 state=2
[MCU2_1]     24.346400 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]     24.346429 s: SCICLIENT: Sciclient_pmSetModuleState module=62 state=2
[MCU2_1]     24.346535 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]     24.346597 s: VHWA: DOF Init ... !!!
[MCU2_1]     24.350767 s: VHWA: DOF Init ... Done !!!
[MCU2_1]     24.350802 s: VHWA: SDE Init ... !!!
[MCU2_1]     24.352262 s: VHWA: SDE Init ... Done !!!
[MCU2_1]     24.352294 s: VHWA: DMPAC: Init ... Done !!!
[MCU2_1]     24.352327 s:  VX_ZONE_INIT:Enabled
[MCU2_1]     24.352350 s:  VX_ZONE_ERROR:Enabled
[MCU2_1]     24.352372 s:  VX_ZONE_WARNING:Enabled
[MCU2_1]     24.353362 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-1 
[MCU2_1]     24.353541 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_SDE 
[MCU2_1]     24.353710 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_DOF 
[MCU2_1]     24.353752 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU2_1]     24.353780 s: APP: OpenVX Target kernel init ... !!!
[MCU2_1]     24.354013 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_1]     24.354041 s: UDMA Copy: Init ... !!!
[MCU2_1]     24.355309 s: UDMA Copy: Init ... Done !!!
[MCU2_1]     24.355347 s: APP: Init ... Done !!!
[MCU2_1]     24.355370 s: APP: Run ... !!!
[MCU2_1]     24.355389 s: IPC: Starting echo test ...
[MCU2_1]     24.357454 s: APP: Run ... Done !!!
[MCU2_1]     24.357976 s: IPC: Echo status: mcu2_0[x] mcu2_1[s] mcu3_0[x] C7X_1[P] C7X_2[.] 
[MCU2_1]     24.358044 s: IPC: Echo status: mcu2_0[x] mcu2_1[s] mcu3_0[x] C7X_1[P] C7X_2[P] 
[MCU2_1]     24.406030 s: IPC: Echo status: mcu2_0[P] mcu2_1[s] mcu3_0[x] C7X_1[P] C7X_2[P] 
[MCU3_0]     24.334933 s: CIO: Init ... Done !!!
[MCU3_0]     24.334983 s: ### CPU Frequency = 1000000000 Hz
[MCU3_0]     24.335014 s: CPU is running FreeRTOS
[MCU3_0]     24.335034 s: APP: Init ... !!!
[MCU3_0]     24.335053 s: SCICLIENT: Init ... !!!
[MCU3_0]     24.335162 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[MCU3_0]     24.335194 s: SCICLIENT: DMSC FW revision 0x9  
[MCU3_0]     24.335220 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU3_0]     24.335251 s: SCICLIENT: Init ... Done !!!
[MCU3_0]     24.335273 s: MEM: Init ... !!!
[MCU3_0]     24.335303 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ db000000 of size 8388608 bytes !!!
[MCU3_0]     24.335359 s: MEM: Init ... Done !!!
[MCU3_0]     24.335381 s: IPC: Init ... !!!
[MCU3_0]     24.335425 s: IPC: 5 CPUs participating in IPC !!!
[MCU3_0]     24.335464 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU3_0]     24.335491 s: IPC: HLOS is ready !!!
[MCU3_0]     24.344656 s: IPC: Init ... Done !!!
[MCU3_0]     24.344697 s: APP: Syncing with 5 CPUs ... !!!
[MCU3_0]     24.344733 s: APP: Syncing with 5 CPUs ... Done !!!
[MCU3_0]     24.344764 s: REMOTE_SERVICE: Init ... !!!
[MCU3_0]     24.346291 s: REMOTE_SERVICE: Init ... Done !!!
[MCU3_0]     24.346339 s:  VX_ZONE_INIT:Enabled
[MCU3_0]     24.346363 s:  VX_ZONE_ERROR:Enabled
[MCU3_0]     24.346386 s:  VX_ZONE_WARNING:Enabled
[MCU3_0]     24.347344 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU3-0 
[MCU3_0]     24.347391 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU3_0]     24.347421 s: APP: OpenVX Target kernel init ... !!!
[MCU3_0]     24.347447 s: APP: OpenVX Target kernel init ... Done !!!
[MCU3_0]     24.347473 s: APP: Init ... Done !!!
[MCU3_0]     24.347495 s: APP: Run ... !!!
[MCU3_0]     24.347515 s: IPC: Starting echo test ...
[MCU3_0]     24.349706 s: APP: Run ... Done !!!
[MCU3_0]     24.349766 s: CIO: Init ... Done !!!
[MCU3_0]     24.349795 s: Start UDMA init
[MCU3_0]     24.349815 s: UDMA: Init ... !!!
[MCU3_0]     24.351558 s: UDMA: Init ... Done !!!
[MCU3_0]     24.351604 s: End UDMA init
[MCU3_0]     24.351624 s: Start DSS init
[MCU3_0]     24.351653 s: <<<<<<<<<<<<<<<TEST>>>>>>>>>>>>>>> : PRE FVID2 init !!!
[MCU3_0]     24.351682 s: FVID2: Init ... !!!
[MCU3_0]     24.351738 s: FVID2: Init ... Done !!!
[MCU3_0]     24.351761 s: <<<<<<<<<<<<<<<TEST>>>>>>>>>>>>>>> : AFTER FVID2 init !!!
[MCU3_0]     24.351790 s: <<<<<<<<<<<<<<<TEST>>>>>>>>>>>>>>> : PRE I2C init !!!
[MCU3_0]     24.351819 s: SCICLIENT: Sciclient_pmSetModuleState module=219 state=2
[MCU3_0]     24.351905 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU3_0]     24.351945 s: <<<<<<<<<<<<<<<TEST>>>>>>>>>>>>>>> : AFTER I2C init !!!
[MCU3_0]     24.351977 s: DSS: Init ... !!!
[MCU3_0]     24.351999 s: DSS: Display type is HDMI !!!
[MCU3_0]     24.352022 s: DSS: M2M Path is enabled !!!
[MCU3_0]     24.352045 s: DSS: SoC init ... !!!
[MCU3_0]     24.352066 s: SCICLIENT: Sciclient_pmSetModuleState module=158 state=0
[MCU3_0]     24.352193 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU3_0]     24.352222 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=158 clk=5 parent=7
[MCU3_0]     24.352296 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU3_0]     24.352325 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=158 clk=5 freq=148500000
[MCU3_0]     24.353332 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success
[MCU3_0]     24.353361 s: SCICLIENT: Sciclient_pmModuleClkRequest module=158 clk=5 state=2 flag=0
[MCU3_0]     24.353474 s: SCICLIENT: Sciclient_pmModuleClkRequest success
[MCU3_0]     24.353501 s: DSS: SoC init ... Done !!!
[MCU3_0]     24.353523 s: <<<<<<<<<<<<<<<TEST>>>>>>>>>>>>>>> : DSS: PRE conf board !!!
[MCU3_0]     24.353553 s: DSS: Board init ... !!!
[MCU3_0]     24.353576 s: DSS: Board init ... Done !!!
[MCU3_0]     24.353598 s: <<<<<<<<<<<<<<<TEST>>>>>>>>>>>>>>> : DSS: AFTER conf board !!!
[MCU3_0]     24.353630 s: <<<<<<<<<<<<<<<TEST>>>>>>>>>>>>>>> : PRE APP DSS init !!!
[MCU3_0]     24.353663 s: <<<<<<<<<<<<<<<TEST>>>>>>>>>>>>>>> : DSS: PRE Dss_init !!!
[MCU3_0]     24.353704 s: src/drv/common/dss_init.c @ Line 102: 
[MCU3_0]     24.353730 s: Before param check
[MCU3_0]     24.353757 s: src/drv/common/dss_init.c @ Line 109: 
[MCU3_0]     24.353783 s: After param check
[MCU3_0]     24.353813 s: src/drv/common/dss_init.c @ Line 116: 
[MCU3_0]     24.353838 s: Before EM
[MCU3_0]     24.354023 s: src/drv/common/dss_init.c @ Line 123: 
[MCU3_0]     24.354051 s: After EM
[MCU3_0]     24.354083 s: src/drv/common/dss_init.c @ Line 154: 
[MCU3_0]     24.354108 s: Before driver
[MCU3_0]     24.354387 s: src/drv/dctrl/dss_dctrlApi.c @ Line 222: 
[MCU3_0]     24.354415 s: Before Dss_dctrlDrvGraphInit
[MCU3_0]     24.354782 s: src/drv/dctrl/dss_dctrlApi.c @ Line 225: 
[MCU3_0]     24.354813 s: After Dss_dctrlDrvGraphInit
[MCU3_0]     24.354860 s: src/drv/dctrl/dss_dctrlApi.c @ Line 266: 
[MCU3_0]     24.354888 s: Before Register for Video Port events
[MCU3_0]     24.354919 s: src/drv/dctrl/dss_dctrlApi.c @ Line 270: 
[MCU3_0]     24.354946 s: Before Dss_convModuletoEventGroup
[MCU3_0]     24.354978 s: src/drv/dctrl/dss_dctrlApi.c @ Line 276: 
[MCU3_0]     24.355006 s: After Dss_convModuletoEventGroup
[MCU3_0]     24.355036 s: src/drv/dctrl/dss_dctrlApi.c @ Line 279: 
[MCU3_0]     24.355063 s: Before Dss_getEnabledVpFuncEvents
[MCU3_0]     24.355093 s: src/drv/dctrl/dss_dctrlApi.c @ Line 281: 
[MCU3_0]     24.355120 s: After Dss_getEnabledVpFuncEvents
[MCU3_0]     24.355150 s: src/drv/dctrl/dss_dctrlApi.c @ Line 283: 
[MCU3_0]     24.355177 s: Before Dss_getEvtMgrFuncIntrId
[MCU3_0]     24.355207 s: src/drv/dctrl/dss_dctrlApi.c @ Line 285: 
[MCU3_0]     24.355234 s: After Dss_getEvtMgrFuncIntrId
[MCU3_0]     24.355263 s: src/drv/dctrl/dss_dctrlApi.c @ Line 286: 
[MCU3_0]     24.355290 s: Before Dss_evtMgrRegister
[MCU3_0]     24.355321 s: src/drv/common/dss_evtMgr.c @ Line 268: 
[MCU3_0]     24.355348 s: Before Dss_evtMgrGetInstObj
[MCU3_0]     24.355377 s: src/drv/common/dss_evtMgr.c @ Line 270: 
[MCU3_0]     24.355404 s: After Dss_evtMgrGetInstObj
[MCU3_0]     24.355432 s: src/drv/common/dss_evtMgr.c @ Line 280: 
[MCU3_0]     24.355459 s: Before SemaphoreP_pend
[MCU3_0]     24.355487 s: src/drv/common/dss_evtMgr.c @ Line 283: 
[MCU3_0]     24.355513 s: After SemaphoreP_pend
[MCU3_0]     24.355541 s: src/drv/common/dss_evtMgr.c @ Line 286: 
[MCU3_0]     24.355567 s: Before Dss_evtMgrCreateInfo
[MCU3_0]     24.355602 s: src/drv/common/dss_evtMgr.c @ Line 288: 
[MCU3_0]     24.355629 s: After Dss_evtMgrCreateInfo
[MCU3_0]     24.355658 s: src/drv/common/dss_evtMgr.c @ Line 298: 
[MCU3_0]     24.355684 s: Before Dss_evtMgrFillInfo
[MCU3_0]     24.355714 s: src/drv/common/dss_evtMgr.c @ Line 652: 
[MCU3_0]     24.355740 s: Before Dss_getSocInfo
[MCU3_0]     24.355768 s: src/drv/common/dss_evtMgr.c @ Line 654: 
[MCU3_0]     24.355794 s: After Dss_getSocInfo
[MCU3_0]     24.355822 s: src/drv/common/dss_evtMgr.c @ Line 660: 
[MCU3_0]     24.355848 s: Before Dss_enableL1Event
[MCU3_0]     24.355877 s: soc/V2/dss_soc.c @ Line 351: 
[MCU3_0]     24.355901 s: Before Dss_getSocInfo
[MCU3_0]     24.355928 s: soc/V2/dss_soc.c @ Line 353: 
[MCU3_0]     24.355951 s: After Dss_getSocInfo
[MCU3_0]     24.355980 s: soc/V2/dss_soc.c @ Line 387: 
[MCU3_0]     24.356006 s: Before CSL_REG32_RD(&commRegs->VP_IRQSTATUS_1);
[C7x_1 ]     23.438281 s: CIO: Init ... Done !!!
[C7x_1 ]     23.438296 s: ### CPU Frequency = 1000000000 Hz
[C7x_1 ]     23.438308 s: CPU is running FreeRTOS
[C7x_1 ]     23.438317 s: APP: Init ... !!!
[C7x_1 ]     23.438324 s: SCICLIENT: Init ... !!!
[C7x_1 ]     23.438427 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[C7x_1 ]     23.438441 s: SCICLIENT: DMSC FW revision 0x9  
[C7x_1 ]     23.438452 s: SCICLIENT: DMSC FW ABI revision 3.1
[C7x_1 ]     23.438464 s: SCICLIENT: Init ... Done !!!
[C7x_1 ]     23.438473 s: UDMA: Init ... !!!
[C7x_1 ]     23.439230 s: UDMA: Init ... Done !!!
[C7x_1 ]     23.439242 s: MEM: Init ... !!!
[C7x_1 ]     23.439253 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 117000000 of size 268435456 bytes !!!
[C7x_1 ]     23.439275 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 70020000 of size 3964928 bytes !!!
[C7x_1 ]     23.439293 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 64800000 of size 458752 bytes !!!
[C7x_1 ]     23.439311 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 64e00000 of size 16384 bytes !!!
[C7x_1 ]     23.439328 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ 100000000 of size 385875968 bytes !!!
[C7x_1 ]     23.439347 s: MEM: Init ... Done !!!
[C7x_1 ]     23.439355 s: IPC: Init ... !!!
[C7x_1 ]     23.439368 s: IPC: 5 CPUs participating in IPC !!!
[C7x_1 ]     23.439383 s: IPC: Waiting for HLOS to be ready ... !!!
[C7x_1 ]     23.439394 s: IPC: HLOS is ready !!!
[C7x_1 ]     23.440893 s: IPC: Init ... Done !!!
[C7x_1 ]     23.440906 s: APP: Syncing with 5 CPUs ... !!!
[C7x_1 ]     24.344735 s: APP: Syncing with 5 CPUs ... Done !!!
[C7x_1 ]     24.344753 s: REMOTE_SERVICE: Init ... !!!
[C7x_1 ]     24.344899 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_1 ]     24.344922 s:  VX_ZONE_INIT:Enabled
[C7x_1 ]     24.344957 s:  VX_ZONE_ERROR:Enabled
[C7x_1 ]     24.344969 s:  VX_ZONE_WARNING:Enabled
[C7x_1 ]     24.345210 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1 
[C7x_1 ]     24.345274 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_2 
[C7x_1 ]     24.345337 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_3 
[C7x_1 ]     24.345401 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_4 
[C7x_1 ]     24.345466 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_5 
[C7x_1 ]     24.345529 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_6 
[C7x_1 ]     24.345590 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_7 
[C7x_1 ]     24.345653 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_8 
[C7x_1 ]     24.345678 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C7x_1 ]     24.345692 s: APP: OpenVX Target kernel init ... !!!
[C7x_1 ]     24.345823 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_1 ]     24.345836 s: APP: Init ... Done !!!
[C7x_1 ]     24.345846 s: APP: Run ... !!!
[C7x_1 ]     24.345855 s: IPC: Starting echo test ...
[C7x_1 ]     24.345980 s: APP: Run ... Done !!!
[C7x_1 ]     24.346776 s: IPC: Echo status: mcu2_0[x] mcu2_1[x] mcu3_0[x] C7X_1[s] C7X_2[P] 
[C7x_1 ]     24.357867 s: IPC: Echo status: mcu2_0[x] mcu2_1[P] mcu3_0[x] C7X_1[s] C7X_2[P] 
[C7x_1 ]     24.406040 s: IPC: Echo status: mcu2_0[P] mcu2_1[P] mcu3_0[x] C7X_1[s] C7X_2[P] 
[C7x_2 ]     23.606790 s: CIO: Init ... Done !!!
[C7x_2 ]     23.606805 s: ### CPU Frequency = 1000000000 Hz
[C7x_2 ]     23.606817 s: CPU is running FreeRTOS
[C7x_2 ]     23.606826 s: APP: Init ... !!!
[C7x_2 ]     23.606834 s: SCICLIENT: Init ... !!!
[C7x_2 ]     23.606929 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[C7x_2 ]     23.606943 s: SCICLIENT: DMSC FW revision 0x9  
[C7x_2 ]     23.606953 s: SCICLIENT: DMSC FW ABI revision 3.1
[C7x_2 ]     23.606964 s: SCICLIENT: Init ... Done !!!
[C7x_2 ]     23.606974 s: UDMA: Init ... !!!
[C7x_2 ]     23.607694 s: UDMA: Init ... Done !!!
[C7x_2 ]     23.607708 s: MEM: Init ... !!!
[C7x_2 ]     23.607719 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 127000000 of size 16777216 bytes !!!
[C7x_2 ]     23.607742 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 65800000 of size 458752 bytes !!!
[C7x_2 ]     23.607761 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 65e00000 of size 16384 bytes !!!
[C7x_2 ]     23.607780 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ 128000000 of size 67108864 bytes !!!
[C7x_2 ]     23.607799 s: MEM: Init ... Done !!!
[C7x_2 ]     23.607807 s: IPC: Init ... !!!
[C7x_2 ]     23.607822 s: IPC: 5 CPUs participating in IPC !!!
[C7x_2 ]     23.607837 s: IPC: Waiting for HLOS to be ready ... !!!
[C7x_2 ]     23.607848 s: IPC: HLOS is ready !!!
[C7x_2 ]     23.609441 s: IPC: Init ... Done !!!
[C7x_2 ]     23.609456 s: APP: Syncing with 5 CPUs ... !!!
[C7x_2 ]     24.344735 s: APP: Syncing with 5 CPUs ... Done !!!
[C7x_2 ]     24.344753 s: REMOTE_SERVICE: Init ... !!!
[C7x_2 ]     24.344903 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_2 ]     24.344927 s:  VX_ZONE_INIT:Enabled
[C7x_2 ]     24.344938 s:  VX_ZONE_ERROR:Enabled
[C7x_2 ]     24.344976 s:  VX_ZONE_WARNING:Enabled
[C7x_2 ]     24.345465 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP-1 
[C7x_2 ]     24.345489 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C7x_2 ]     24.345502 s: APP: OpenVX Target kernel init ... !!!
[C7x_2 ]     24.345774 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_2 ]     24.345790 s: UDMA Copy: Init ... !!!
[C7x_2 ]     24.346351 s: UDMA Copy: Init ... Done !!!
[C7x_2 ]     24.346368 s: APP: Init ... Done !!!
[C7x_2 ]     24.346378 s: APP: Run ... !!!
[C7x_2 ]     24.346388 s: IPC: Starting echo test ...
[C7x_2 ]     24.346515 s: APP: Run ... Done !!!
[C7x_2 ]     24.346783 s: IPC: Echo status: mcu2_0[x] mcu2_1[x] mcu3_0[x] C7X_1[P] C7X_2[s] 
[C7x_2 ]     24.357891 s: IPC: Echo status: mcu2_0[x] mcu2_1[P] mcu3_0[x] C7X_1[P] C7X_2[s] 
[C7x_2 ]     24.406053 s: IPC: Echo status: mcu2_0[P] mcu2_1[P] mcu3_0[x] C7X_1[P] C7X_2[s] 

Hi,

Do you see a crash in the core or hang when you try to read this register?

Can you connect to CCS and check the status of the core?

may I know the reason for moving DSS from MCU2_0 to MCU3_0?

Regards,

Nikhil

I do not have CCS. If you would give me instructions and prerequisites for the setup I could try to set it up.

The motivation for using MCU_3_0 is to have a stationary and independent core to do the DSS setup.
To not change the default behavior of the main MCU2_0 and not break any dependencies with Linux.
If I start enabling DSS on MCU2_0 via #defines it start initializing a lot of peripheral stuff that could be occupied and handled by Linux. 
As I do not have much expertise with all the dependencies and mechanisms, IMO it is better to set everything on a separate core and only the required elements not to break the MCU2_0 FW and minimize resource conflicts.

Hi,

Please find the steps to install CCS below 

7. CCS Setup for J721S2 — Processor SDK RTOS J721S2 (ti.com)

Yuriy Pasichnyk said:

If I start enabling DSS on MCU2_0 via #defines it start initializing a lot of peripheral stuff that could be occupied and handled by Linux. 

Could you please confirm if you have k3-j721s2-vision-apps.dtbo mentioned under "name_overlays" in uEnv.txt?

Could you please share the uEnv.txt that you are using?

Regards,

Nikhil

uEnv.txt:

root@j721s2-evm:/run/media/mmcblk0p1# cat uEnv.txt 
root_partition=/dev/mmcblk0p2
overlays=k3-j721s2-edgeai-apps.dtbo k3-am68-carrier-rpi-cam.dtbo k3-am68-carrier-fan.dtbo k3-am68-r5f-mcu3_0-mem.dtbo

k3-am68-r5f-mcu3_0-mem.dts

/dts-v1/;
/plugin/;


&vision_apps_main_r5fss1_core0_dma_memory_region {
	status = "okay";
};

Vision apps is not mentioned under uEnv 

Hi,

Sorry, I do not understand your current uEnv.txt.

If you are using DSS on RTOS, you should be using only k3-j721s2-vision-apps.dtbo. Can you use this and check if the hang on MCU3_0 is seen? Please remove all the other overlays

Regards,

Nikhil

New uEnv.txt

root@j721s2-evm:/opt/edgeai-gst-apps# cat /run/media/mmcblk0p1/uEnv.txt 
root_partition=/dev/mmcblk0p2
overlays=k3-j721s2-vision-apps.dtbo

Dmesg:

root@j721s2-evm:/opt/edgeai-gst-apps# dmesg
[    0.000000] Booting Linux on physical CPU 0x0000000000 [0x411fd080]
[    0.000000] Linux version 5.10.168-gd9f2d6234269-dirty (denys@kumquat) (aarch64-none-linux-gnu-gcc (Arm GNU Toolchain 13.2.rel1 (Build arm-13.7)) 13.2.1 20231009, GNU ld (Arm GNU Toolchain 13.2.rel1 (Build arm-13.7)) 2.41.0.20231009) #2 SMP PREEMPT Tue Apr 23 13:47:03 CEST 2024
[    0.000000] Machine model: FOXFOUR CVBS testing board Rev. 1
[    0.000000] earlycon: ns16550a0 at MMIO32 0x0000000040a00000 (options '')
[    0.000000] printk: bootconsole [ns16550a0] enabled
[    0.000000] efi: UEFI not found.
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a0000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a0000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a0100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a0100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a1000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a1000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a1100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a1100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a2000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a2000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a2100000, size 31 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a2100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a4000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a4000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a4100000, size 31 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a4100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a6000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a6000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a6100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a6100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a7000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-dma-memory@a7000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a7100000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-r5f-memory@a7100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000a8000000, size 32 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-rtos-ipc-memory-region@a8000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000aa000000, size 96 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-dma-memory@aa000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000b0000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-c71-dma-memory@b0000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000b0100000, size 95 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-c71_0-memory@b0100000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000b6000000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-c71_1-dma-memory@b6000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000b6100000, size 31 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-c71_1-memory@b6100000, compatible id shared-dma-pool
[    0.000000] OF: reserved mem: initialized node vision_apps_shared-memories, compatible id dma-heap-carveout
[    0.000000] Reserved memory: created DMA memory pool at 0x00000000d8000000, size 64 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-core-heap-memory-lo@d8000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created DMA memory pool at 0x0000000880000000, size 704 MiB
[    0.000000] OF: reserved mem: initialized node vision-apps-core-heap-memory-hi@880000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: bypass linux-cma-buffers@8ac000000 node, using cmdline CMA params instead
[    0.000000] OF: reserved mem: node linux-cma-buffers@8ac000000 compatible matching fail
[    0.000000] Zone ranges:
[    0.000000]   DMA      [mem 0x0000000080000000-0x00000000ffffffff]
[    0.000000]   DMA32    empty
[    0.000000]   Normal   [mem 0x0000000100000000-0x00000009ffffffff]
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000080000000-0x000000009e7fffff]
[    0.000000]   node   0: [mem 0x000000009e800000-0x00000000b7ffffff]
[    0.000000]   node   0: [mem 0x00000000b8000000-0x00000000d7ffffff]
[    0.000000]   node   0: [mem 0x00000000d8000000-0x00000000dbffffff]
[    0.000000]   node   0: [mem 0x00000000dc000000-0x00000000ffffffff]
[    0.000000]   node   0: [mem 0x0000000880000000-0x00000008abffffff]
[    0.000000]   node   0: [mem 0x00000008ac000000-0x00000009ffffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x00000009ffffffff]
[    0.000000] On node 0 totalpages: 2097152
[    0.000000]   DMA zone: 8192 pages used for memmap
[    0.000000]   DMA zone: 0 pages reserved
[    0.000000]   DMA zone: 524288 pages, LIFO batch:63
[    0.000000]   Normal zone: 24576 pages used for memmap
[    0.000000]   Normal zone: 1572864 pages, LIFO batch:63
[    0.000000] cma: Reserved 576 MiB at 0x00000000dc000000
[    0.000000] psci: probing for conduit method from DT.
[    0.000000] psci: PSCIv1.1 detected in firmware.
[    0.000000] psci: Using standard PSCI v0.2 function IDs
[    0.000000] psci: Trusted OS migration not required
[    0.000000] psci: SMC Calling Convention v1.4
[    0.000000] percpu: Embedded 22 pages/cpu s50008 r8192 d31912 u90112
[    0.000000] pcpu-alloc: s50008 r8192 d31912 u90112 alloc=22*4096
[    0.000000] pcpu-alloc: [0] 0 [0] 1 
[    0.000000] Detected PIPT I-cache on CPU0
[    0.000000] CPU features: detected: GIC system register CPU interface
[    0.000000] CPU features: detected: EL2 vector hardening
[    0.000000] CPU features: detected: ARM errata 1165522, 1319367, or 1530923
[    0.000000] CPU features: detected: Spectre-BHB
[    0.000000] CPU features: detected: ARM erratum 1742098
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 2064384
[    0.000000] Kernel command line: console=ttyS0,115200n8 cma=600000000 earlycon=ns16550a,mmio32,0x40a00000 mtdparts=spi-nand0:512k(ospi_nand.tiboot3),2m(ospi_nand.tispl),4m(ospi_nand.u-boot),256k(ospi_nand.env),256k(ospi_nand.env.backup),98048k@32m(ospi_nand.rootfs),256k@130816k(ospi_nand.phypattern) root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait
[    0.000000] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes, linear)
[    0.000000] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
[    0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
[    0.000000] software IO TLB: mapped [mem 0x000000009a800000-0x000000009e800000] (64MB)
[    0.000000] Memory: 5827132K/8388608K available (11264K kernel code, 1166K rwdata, 4280K rodata, 1856K init, 433K bss, 1971652K reserved, 589824K cma-reserved)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[    0.000000] rcu: Preemptible hierarchical RCU implementation.
[    0.000000] rcu: 	RCU event tracing is enabled.
[    0.000000] rcu: 	RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=2.
[    0.000000] 	Trampoline variant of Tasks RCU enabled.
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[    0.000000] GICv3: GIC: Using split EOI/Deactivate mode
[    0.000000] GICv3: 960 SPIs implemented
[    0.000000] GICv3: 0 Extended SPIs implemented
[    0.000000] GICv3: Distributor has no Range Selector support
[    0.000000] GICv3: 16 PPIs implemented
[    0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000000001900000
[    0.000000] ITS [mem 0x01820000-0x0182ffff]
[    0.000000] GIC: enabling workaround for ITS: Socionext Synquacer pre-ITS
[    0.000000] ITS@0x0000000001820000: Devices Table too large, reduce ids 20->19
[    0.000000] ITS@0x0000000001820000: allocated 524288 Devices @8ac800000 (flat, esz 8, psz 64K, shr 0)
[    0.000000] ITS: using cache flushing for cmd queue
[    0.000000] GICv3: using LPI property table @0x00000008ac030000
[    0.000000] GIC: using cache flushing for LPI property table
[    0.000000] GICv3: CPU0: using allocated LPI pending table @0x00000008ac040000
[    0.000000] arch_timer: cp15 timer(s) running at 200.00MHz (phys).
[    0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2e2049d3e8, max_idle_ns: 440795210634 ns
[    0.000002] sched_clock: 56 bits at 200MHz, resolution 5ns, wraps every 4398046511102ns
[    0.008359] Console: colour dummy device 80x25
[    0.012919] Calibrating delay loop (skipped), value calculated using timer frequency.. 400.00 BogoMIPS (lpj=800000)
[    0.023586] pid_max: default: 32768 minimum: 301
[    0.028345] LSM: Security Framework initializing
[    0.033116] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
[    0.040884] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
[    0.049878] rcu: Hierarchical SRCU implementation.
[    0.054938] Platform MSI: msi-controller@1820000 domain created
[    0.061117] PCI/MSI: /bus@100000/interrupt-controller@1800000/msi-controller@1820000 domain created
[    0.070404] EFI services will not be available.
[    0.075142] smp: Bringing up secondary CPUs ...
[    0.080193] Detected PIPT I-cache on CPU1
[    0.080219] GICv3: CPU1: found redistributor 1 region 0:0x0000000001920000
[    0.080231] GICv3: CPU1: using allocated LPI pending table @0x00000008ac050000
[    0.080269] CPU1: Booted secondary processor 0x0000000001 [0x411fd080]
[    0.080322] smp: Brought up 1 node, 2 CPUs
[    0.109659] SMP: Total of 2 processors activated.
[    0.114463] CPU features: detected: 32-bit EL0 Support
[    0.119716] CPU features: detected: CRC32 instructions
[    0.134271] CPU: All CPU(s) started at EL2
[    0.138472] alternatives: patching kernel code
[    0.143512] devtmpfs: initialized
[    0.150652] KASLR disabled due to lack of seed
[    0.155299] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[    0.165258] futex hash table entries: 512 (order: 3, 32768 bytes, linear)
[    0.178273] pinctrl core: initialized pinctrl subsystem
[    0.183935] DMI not present or invalid.
[    0.188161] NET: Registered protocol family 16
[    0.193386] DMA: preallocated 1024 KiB GFP_KERNEL pool for atomic allocations
[    0.200884] DMA: preallocated 1024 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
[    0.209168] DMA: preallocated 1024 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
[    0.217570] thermal_sys: Registered thermal governor 'step_wise'
[    0.217573] thermal_sys: Registered thermal governor 'power_allocator'
[    0.224135] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
[    0.237774] ASID allocator initialised with 65536 entries
[    0.254968] HugeTLB registered 1.00 GiB page size, pre-allocated 0 pages
[    0.261823] HugeTLB registered 32.0 MiB page size, pre-allocated 0 pages
[    0.268669] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
[    0.275516] HugeTLB registered 64.0 KiB page size, pre-allocated 0 pages
[    0.282985] cryptd: max_cpu_qlen set to 1000
[    0.288968] k3-chipinfo 43000014.chipid: Family:J721S2 rev:SR1.0 JTAGID[0x0bb7502f] Detected
[    0.297932] VCC_5V0: supplied by VCC_IN
[    0.302236] iommu: Default domain type: Translated 
[    0.307368] SCSI subsystem initialized
[    0.311401] mc: Linux media interface: v0.10
[    0.315776] videodev: Linux video capture interface: v2.00
[    0.321409] pps_core: LinuxPPS API ver. 1 registered
[    0.326475] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    0.335807] PTP clock support registered
[    0.339820] EDAC MC: Ver: 3.0.0
[    0.343567] FPGA manager framework
[    0.347079] Advanced Linux Sound Architecture Driver Initialized.
[    0.353681] clocksource: Switched to clocksource arch_sys_counter
[    0.360026] VFS: Disk quotas dquot_6.6.0
[    0.364063] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[    0.373612] Carveout Heap: Exported 512 MiB at 0x00000000b8000000
[    0.379895] NET: Registered protocol family 2
[    0.384751] IP idents hash table entries: 131072 (order: 8, 1048576 bytes, linear)
[    0.394233] tcp_listen_portaddr_hash hash table entries: 4096 (order: 4, 65536 bytes, linear)
[    0.403005] TCP established hash table entries: 65536 (order: 7, 524288 bytes, linear)
[    0.411311] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes, linear)
[    0.419323] TCP: Hash tables configured (established 65536 bind 65536)
[    0.426153] UDP hash table entries: 4096 (order: 5, 131072 bytes, linear)
[    0.433176] UDP-Lite hash table entries: 4096 (order: 5, 131072 bytes, linear)
[    0.440720] NET: Registered protocol family 1
[    0.445481] RPC: Registered named UNIX socket transport module.
[    0.451548] RPC: Registered udp transport module.
[    0.456351] RPC: Registered tcp transport module.
[    0.461151] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    0.467734] PCI: CLS 0 bytes, default 64
[    0.472085] hw perfevents: enabled with armv8_cortex_a72 PMU driver, 7 counters available
[    0.482436] Initialise system trusted keyrings
[    0.487071] workingset: timestamp_bits=46 max_order=21 bucket_order=0
[    0.495188] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.501410] NFS: Registering the id_resolver key type
[    0.506593] Key type id_resolver registered
[    0.510863] Key type id_legacy registered
[    0.514982] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
[    0.521831] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
[    0.529464] 9p: Installing v9fs 9p2000 file system support
[    0.554302] xor: measuring software checksum speed
[    0.560440]    8regs           :  7953 MB/sec
[    0.565976]    32regs          :  9060 MB/sec
[    0.571697]    arm64_neon      :  7727 MB/sec
[    0.576142] xor: using function: 32regs (9060 MB/sec)
[    0.581301] async_tx: api initialized (async)
[    0.585750] Key type asymmetric registered
[    0.589931] Asymmetric key parser 'x509' registered
[    0.594932] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
[    0.602493] io scheduler mq-deadline registered
[    0.607120] io scheduler kyber registered
[    0.612329] pinctrl-single 4301c000.pinctrl: 101 pins, size 404
[    0.618540] pinctrl-single 11c000.pinctrl: 72 pins, size 288
[    0.628090] Serial: 8250/16550 driver, 10 ports, IRQ sharing enabled
[    0.640071] brd: module loaded
[    0.646482] loop: module loaded
[    0.650268] megasas: 07.714.04.00-rc1
[    0.655574] tun: Universal TUN/TAP device driver, 1.6
[    0.661020] igbvf: Intel(R) Gigabit Virtual Function Network Driver
[    0.667427] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
[    0.673499] sky2: driver version 1.30
[    0.677706] VFIO - User Level meta-driver version: 0.3
[    0.683452] i2c /dev entries driver
[    0.687577] device-mapper: ioctl: 4.43.0-ioctl (2020-10-01) initialised: dm-devel@redhat.com
[    0.696538] sdhci: Secure Digital Host Controller Interface driver
[    0.702859] sdhci: Copyright(c) Pierre Ossman
[    0.707455] sdhci-pltfm: SDHCI platform and OF driver helper
[    0.713690] ledtrig-cpu: registered to indicate activity on CPUs
[    0.719992] SMCCC: SOC_ID: ARCH_SOC_ID not implemented, skipping ....
[    0.727261] optee: probing for conduit method.
[    0.731824] optee: revision 3.22 (001ace66)
[    0.731951] optee: dynamic shared memory is enabled
[    0.741429] optee: initialized driver
[    0.746282] NET: Registered protocol family 17
[    0.750906] 9pnet: Installing 9P2000 support
[    0.755307] Key type dns_resolver registered
[    0.759762] Loading compiled-in X.509 certificates
[    0.767546] Key type trusted registered
[    0.772034] Key type encrypted registered
[    0.777116] VCC_3V3: supplied by VCC_5V0
[    0.785022] ti-sci 44083000.system-controller: ABI: 3.1 (firmware rev 0x0009 '9.0.6--v09.00.06 (Kool Koala)')
[    0.810773] VCC_1V8: supplied by VCC_3V3
[    0.815819] omap_i2c 42120000.i2c: bus 0 rev0.12 at 400 kHz
[    0.822055] omap_i2c 40b00000.i2c: bus 1 rev0.12 at 100 kHz
[    0.850760] hwmon hwmon0: temp1_input not attached to any thermal zone
[    0.857439] tmp102 2-0048: initialized
[    0.862416] hwmon hwmon1: temp1_input not attached to any thermal zone
[    0.869087] tmp102 2-0049: initialized
[    0.979697] rtc-rv3028 2-0052: registered as rtc0
[    0.984933] rtc-rv3028 2-0052: hctosys: unable to read the hardware clock
[    0.992888] omap_i2c 2000000.i2c: bus 2 rev0.12 at 100 kHz
[    0.999286] ti-sci-intr 42200000.interrupt-controller: Interrupt Router 125 domain created
[    1.007829] ti-sci-intr bus@100000:interrupt-controller@a00000: Interrupt Router 148 domain created
[    1.017155] ti-sci-intr 310e0000.interrupt-controller: Interrupt Router 227 domain created
[    1.025750] ti-sci-inta 33d00000.msi-controller: Interrupt Aggregator domain 265 created
[    1.035809] k3-ringacc 2b800000.ringacc: Ring Accelerator probed rings:286, gp-rings[96,20] sci-dev-id:272
[    1.045696] k3-ringacc 2b800000.ringacc: dma-ring-reset-quirk: disabled
[    1.052453] k3-ringacc 2b800000.ringacc: RA Proxy rev. 66349100, num_proxies:64
[    1.061211] k3-ringacc 3c000000.ringacc: Ring Accelerator probed rings:1024, gp-rings[878,128] sci-dev-id:259
[    1.071357] k3-ringacc 3c000000.ringacc: dma-ring-reset-quirk: disabled
[    1.078112] k3-ringacc 3c000000.ringacc: RA Proxy rev. 66349100, num_proxies:64
[    1.086027] printk: console [ttyS0] disabled
[    1.090425] 40a00000.serial: ttyS0 at MMIO 0x40a00000 (irq = 15, base_baud = 6000000) is a 8250
[    1.099345] printk: console [ttyS0] enabled
[    1.107782] printk: bootconsole [ns16550a0] disabled
[    1.119205] davinci_mdio c200f00.mdio: Configuring MDIO in manual mode
[    1.165684] davinci_mdio c200f00.mdio: davinci mdio revision 9.7, bus freq 1000000
[    1.173239] davinci_mdio c200f00.mdio: no live phy, scanning all
[    1.192029] davinci_mdio c200f00.mdio: phy[0]: device c200f00.mdio:00, driver unknown
[    1.199869] davinci_mdio c200f00.mdio: phy[1]: device c200f00.mdio:01, driver unknown
[    1.207683] davinci_mdio c200f00.mdio: phy[2]: device c200f00.mdio:02, driver unknown
[    1.215495] davinci_mdio c200f00.mdio: phy[3]: device c200f00.mdio:03, driver unknown
[    1.223306] davinci_mdio c200f00.mdio: phy[4]: device c200f00.mdio:04, driver unknown
[    1.231121] davinci_mdio c200f00.mdio: phy[5]: device c200f00.mdio:05, driver unknown
[    1.238933] davinci_mdio c200f00.mdio: phy[6]: device c200f00.mdio:06, driver unknown
[    1.246745] davinci_mdio c200f00.mdio: phy[7]: device c200f00.mdio:07, driver unknown
[    1.254556] davinci_mdio c200f00.mdio: phy[8]: device c200f00.mdio:08, driver unknown
[    1.262367] davinci_mdio c200f00.mdio: phy[9]: device c200f00.mdio:09, driver unknown
[    1.270184] davinci_mdio c200f00.mdio: phy[10]: device c200f00.mdio:0a, driver unknown
[    1.278082] davinci_mdio c200f00.mdio: phy[11]: device c200f00.mdio:0b, driver unknown
[    1.285979] davinci_mdio c200f00.mdio: phy[12]: device c200f00.mdio:0c, driver unknown
[    1.293878] davinci_mdio c200f00.mdio: phy[13]: device c200f00.mdio:0d, driver unknown
[    1.301779] davinci_mdio c200f00.mdio: phy[14]: device c200f00.mdio:0e, driver unknown
[    1.309678] davinci_mdio c200f00.mdio: phy[15]: device c200f00.mdio:0f, driver unknown
[    1.317617] davinci_mdio c200f00.mdio: phy[16]: device c200f00.mdio:10, driver unknown
[    1.325515] davinci_mdio c200f00.mdio: phy[17]: device c200f00.mdio:11, driver unknown
[    1.333413] davinci_mdio c200f00.mdio: phy[18]: device c200f00.mdio:12, driver unknown
[    1.341310] davinci_mdio c200f00.mdio: phy[19]: device c200f00.mdio:13, driver unknown
[    1.349208] davinci_mdio c200f00.mdio: phy[20]: device c200f00.mdio:14, driver unknown
[    1.357107] davinci_mdio c200f00.mdio: phy[21]: device c200f00.mdio:15, driver unknown
[    1.365007] davinci_mdio c200f00.mdio: phy[22]: device c200f00.mdio:16, driver unknown
[    1.372905] davinci_mdio c200f00.mdio: phy[23]: device c200f00.mdio:17, driver unknown
[    1.380802] davinci_mdio c200f00.mdio: phy[24]: device c200f00.mdio:18, driver unknown
[    1.388699] davinci_mdio c200f00.mdio: phy[25]: device c200f00.mdio:19, driver unknown
[    1.396596] davinci_mdio c200f00.mdio: phy[26]: device c200f00.mdio:1a, driver unknown
[    1.404492] davinci_mdio c200f00.mdio: phy[27]: device c200f00.mdio:1b, driver unknown
[    1.412389] davinci_mdio c200f00.mdio: phy[28]: device c200f00.mdio:1c, driver unknown
[    1.420288] davinci_mdio c200f00.mdio: phy[29]: device c200f00.mdio:1d, driver unknown
[    1.428186] davinci_mdio c200f00.mdio: phy[30]: device c200f00.mdio:1e, driver unknown
[    1.436087] davinci_mdio c200f00.mdio: phy[31]: device c200f00.mdio:1f, driver unknown
[    1.444065] am65-cpsw-nuss c200000.ethernet: initializing am65 cpsw nuss version 0x6BA02102, cpsw version 0x6BA82102 Ports: 2 quirks:00000000
[    1.456818] am65-cpsw-nuss c200000.ethernet: /bus@100000/ethernet@c200000/ethernet-ports/port@1 read phy-mode err -22
[    1.468217] am65-cpsw-nuss: probe of c200000.ethernet failed with error -22
[    1.475968] am65-cpts 310d0000.cpts: CPTS ver 0x4e8a010c, freq:250000000, add_val:3 pps:0
[    1.585701] mmc0: CQHCI version 5.10
[    1.589873] mmc1: CQHCI version 5.10
[    1.622610] omap-mailbox 31f80000.mailbox: omap mailbox rev 0x66fca100
[    1.629439] omap-mailbox 31f81000.mailbox: omap mailbox rev 0x66fca100
[    1.630225] mmc0: SDHCI controller on 4f80000.mmc [4f80000.mmc] using ADMA 64-bit
[    1.643464] omap-mailbox 31f82000.mailbox: omap mailbox rev 0x66fca100
[    1.650291] omap-mailbox 31f84000.mailbox: omap mailbox rev 0x66fca100
[    1.657373] ti-udma 285c0000.dma-controller: Channels: 26 (tchan: 13, rchan: 13, gp-rflow: 8)
[    1.667257] ti-udma 31150000.dma-controller: Channels: 60 (tchan: 30, rchan: 30, gp-rflow: 16)
[    1.678804] spi-nor spi0.0: mt35xu512aba (65536 Kbytes)
[    1.684887] debugfs: Directory 'pd:39' with parent 'pm_genpd' already present!
[    1.692201] debugfs: Directory 'pd:38' with parent 'pm_genpd' already present!
[    1.700013] debugfs: Directory 'pd:276' with parent 'pm_genpd' already present!
[    1.707887] debugfs: Directory 'pd:154' with parent 'pm_genpd' already present!
[    1.719239] ALSA device list:
[    1.722204]   No soundcards found.
[    1.770528] mmc0: Command Queue Engine enabled
[    1.774972] mmc0: new HS400 MMC card at address 0001
[    1.780265] mmcblk0: mmc0:0001 00032G 28.8 GiB 
[    1.784909] mmcblk0boot0: mmc0:0001 00032G partition 1 31.5 MiB
[    1.790929] mmcblk0boot1: mmc0:0001 00032G partition 2 31.5 MiB
[    1.796940] mmcblk0rpmb: mmc0:0001 00032G partition 3 4.00 MiB, chardev (237:0)
[    1.804968]  mmcblk0: p1 p2
[    3.108029] sdhci-am654 4fb0000.mmc: Power on failed
[    3.143612] mmc1: SDHCI controller on 4fb0000.mmc [4fb0000.mmc] using ADMA 64-bit
[    3.178835] EXT4-fs (mmcblk0p2): recovery complete
[    3.184276] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null)
[    3.192389] VFS: Mounted root (ext4 filesystem) on device 179:2.
[    3.198758] devtmpfs: mounted
[    3.202417] Freeing unused kernel memory: 1856K
[    3.207058] Run /sbin/init as init process
[    3.211149]   with arguments:
[    3.211151]     /sbin/init
[    3.211153]   with environment:
[    3.211155]     HOME=/
[    3.211157]     TERM=linux
[    3.274691] systemd[1]: System time before build time, advancing clock.
[    3.379068] NET: Registered protocol family 10
[    3.384080] Segment Routing with IPv6
[    3.396622] systemd[1]: systemd 244.5+ running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR -SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT -GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN2 -IDN -PCRE2 default-hierarchy=hybrid)
[    3.418470] systemd[1]: Detected architecture arm64.
[    3.453957] systemd[1]: Set hostname to <j721s2-evm>.
[    3.577382] systemd[1]: /lib/systemd/system/irqbalanced.service:6: Unknown key name 'ConditionCPUs' in section 'Unit', ignoring.
[    3.598880] systemd[1]: /lib/systemd/system/docker.socket:6: ListenStream= references a path below legacy directory /var/run/, updating /var/run/docker.sock \xe2\x86\x92 /run/docker.sock; please update the unit file accordingly.
[    3.654034] random: systemd: uninitialized urandom read (16 bytes read)
[    3.660809] systemd[1]: system-getty.slice: unit configures an IP firewall, but the local system does not support BPF/cgroup firewalling.
[    3.673137] systemd[1]: (This warning is only shown for the first unit using IP firewalling.)
[    3.683239] systemd[1]: Created slice system-getty.slice.
[    3.705773] random: systemd: uninitialized urandom read (16 bytes read)
[    3.713148] systemd[1]: Created slice system-serial\x2dgetty.slice.
[    3.733766] random: systemd: uninitialized urandom read (16 bytes read)
[    3.740991] systemd[1]: Created slice User and Session Slice.
[    3.761902] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
[    3.785828] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
[    3.809815] systemd[1]: Reached target Paths.
[    3.825754] systemd[1]: Reached target Remote File Systems.
[    3.845745] systemd[1]: Reached target Slices.
[    3.861744] systemd[1]: Reached target Swap.
[    3.882205] systemd[1]: Listening on RPCbind Server Activation Socket.
[    3.905787] systemd[1]: Reached target RPC Port Mapper.
[    3.928693] systemd[1]: Listening on Process Core Dump Socket.
[    3.949916] systemd[1]: Listening on initctl Compatibility Named Pipe.
[    3.978940] systemd[1]: Condition check resulted in Journal Audit Socket being skipped.
[    3.987339] systemd[1]: Listening on Journal Socket (/dev/log).
[    4.010032] systemd[1]: Listening on Journal Socket.
[    4.026069] systemd[1]: Listening on Network Service Netlink Socket.
[    4.049969] systemd[1]: Listening on udev Control Socket.
[    4.069889] systemd[1]: Listening on udev Kernel Socket.
[    4.092197] systemd[1]: Mounting Huge Pages File System...
[    4.112103] systemd[1]: Mounting POSIX Message Queue File System...
[    4.136138] systemd[1]: Mounting Kernel Debug File System...
[    4.157250] systemd[1]: Mounting Temporary Directory (/tmp)...
[    4.176262] systemd[1]: Starting Create list of static device nodes for the current kernel...
[    4.207404] systemd[1]: Starting Start psplash boot splash screen...
[    4.232853] systemd[1]: Starting RPC Bind...
[    4.245893] systemd[1]: Condition check resulted in File System Check on Root Device being skipped.
[    4.257904] systemd[1]: Starting Journal Service...
[    4.278763] systemd[1]: Starting Load Kernel Modules...
[    4.296267] systemd[1]: Starting Remount Root and Kernel File Systems...
[    4.311103] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null)
[    4.320327] systemd[1]: Starting udev Coldplug all Devices...
[    4.341100] systemd[1]: Started RPC Bind.
[    4.354274] systemd[1]: Started Journal Service.
[    4.570380] systemd-journald[188]: Received client request to flush runtime journal.
[    4.710480] random: systemd: uninitialized urandom read (16 bytes read)
[    4.733797] random: systemd: uninitialized urandom read (16 bytes read)
[    4.744781] random: systemd-journal: uninitialized urandom read (16 bytes read)
[    5.135271] random: crng init done
[    5.138694] random: 67 urandom warning(s) missed due to ratelimiting
[    5.189366] k3-dsp-rproc 64800000.dsp: assigned reserved memory node vision-apps-c71-dma-memory@b0000000
[    5.236829] k3-dsp-rproc 64800000.dsp: configured DSP for remoteproc mode
[    5.254563] remoteproc remoteproc0: 64800000.dsp is available
[    5.268038] VDD__DDR_1V1: supplied by VCC_3V3
[    5.272708] at24 0-0050: supply vcc not found, using dummy regulator
[    5.303841] k3-dsp-rproc 65800000.dsp: assigned reserved memory node vision-apps-c71_1-dma-memory@b6000000
[    5.321473] at24 0-0050: 4096 byte 24c32 EEPROM, writable, 32 bytes/write
[    5.330676] at24 0-0051: supply vcc not found, using dummy regulator
[    5.347090] at24 0-0051: 4096 byte 24c32 EEPROM, writable, 32 bytes/write
[    5.357157] k3-dsp-rproc 65800000.dsp: configured DSP for remoteproc mode
[    5.366343] platform 41000000.r5f: R5F core may have been powered on by a different host, programmed state (0) != actual state (1)
[    5.370188] remoteproc remoteproc1: 65800000.dsp is available
[    5.429128] VDD_RAM_0V85: supplied by VCC_3V3
[    5.475273] platform 41000000.r5f: configured R5F for IPC-only mode
[    5.488052] VDD_IO_1V8: supplied by VCC_3V3
[    5.497087] remoteproc remoteproc0: powering up 64800000.dsp
[    5.503250] remoteproc remoteproc1: powering up 65800000.dsp
[    5.509036] remoteproc remoteproc1: Booting fw image j721s2-c71_1-fw, size 12153640
[    5.518962] remoteproc remoteproc0: Booting fw image j721s2-c71_0-fw, size 23649208
[    5.531549] remoteproc remoteproc1: unsupported resource 65538
[    5.537538] remoteproc remoteproc0: unsupported resource 65538
[    5.547022] k3-dsp-rproc 65800000.dsp: booting DSP core using boot addr = 0xb6200000
[    5.560333] k3-dsp-rproc 64800000.dsp: booting DSP core using boot addr = 0xb0200000
[    5.569350]  remoteproc1#vdev0buffer: assigned reserved memory node vision-apps-c71_1-dma-memory@b6000000
[    5.579736]  remoteproc0#vdev0buffer: assigned reserved memory node vision-apps-c71-dma-memory@b0000000
[    5.590049] virtio_rpmsg_bus virtio0: rpmsg host is online
[    5.596132] virtio_rpmsg_bus virtio1: rpmsg host is online
[    5.602862]  remoteproc1#vdev0buffer: registered virtio0 (type 7)
[    5.609115]  remoteproc0#vdev0buffer: registered virtio1 (type 7)
[    5.615350] remoteproc remoteproc1: remote processor 65800000.dsp is now up
[    5.615453] platform 41000000.r5f: assigned reserved memory node vision-apps-r5f-dma-memory@a0000000
[    5.622349] remoteproc remoteproc0: remote processor 64800000.dsp is now up
[    5.654519] VDD_MCU_0V85: supplied by VCC_3V3
[    5.669515] remoteproc remoteproc2: 41000000.r5f is available
[    5.677130] remoteproc remoteproc2: attaching to 41000000.r5f
[    5.685898] platform 41000000.r5f: R5F core initialized in IPC-only mode
[    5.696638]  remoteproc2#vdev0buffer: assigned reserved memory node vision-apps-r5f-dma-memory@a0000000
[    5.708693] VDD_MCUIO_1V8: supplied by VCC_3V3
[    5.714716] virtio_rpmsg_bus virtio2: rpmsg host is online
[    5.724460] virtio_rpmsg_bus virtio2: creating channel ti.ipc4.ping-pong addr 0xd
[    5.732073] virtio_rpmsg_bus virtio2: creating channel rpmsg_chrdev addr 0xe
[    5.751857]  remoteproc2#vdev0buffer: registered virtio2 (type 7)
[    5.774545] remoteproc remoteproc2: remote processor 41000000.r5f is now attached
[    5.783388] VDD_MCUIO_3V3: bypassed regulator has no supply!
[    5.831524] VDD_MCUIO_3V3: failed to get the current voltage: -EPROBE_DEFER
[    5.840964] platform 5c00000.r5f: configured R5F for remoteproc mode
[    5.899447] platform 5c00000.r5f: assigned reserved memory node vision-apps-r5f-dma-memory@a2000000
[    5.901119] VDD_MCUIO_3V3: supplied by VCC_3V3
[    5.980253] remoteproc remoteproc3: 5c00000.r5f is available
[    6.009666] tps6594-rtc tps6594-rtc.4.auto: registered as rtc1
[    6.029876] platform 5d00000.r5f: configured R5F for remoteproc mode
[    6.043037] VDDA_DLL_0V8: supplied by VCC_3V3
[    6.049319] platform 5d00000.r5f: assigned reserved memory node vision-apps-r5f-dma-memory@a4000000
[    6.061201] remoteproc remoteproc3: powering up 5c00000.r5f
[    6.066825] remoteproc remoteproc3: Booting fw image j721s2-main-r5f0_0-fw, size 3575192
[    6.072612] remoteproc remoteproc4: 5d00000.r5f is available
[    6.079017]  remoteproc3#vdev0buffer: assigned reserved memory node vision-apps-r5f-dma-memory@a2000000
[    6.091745] virtio_rpmsg_bus virtio3: rpmsg host is online
[    6.097517]  remoteproc3#vdev0buffer: registered virtio3 (type 7)
[    6.104898] remoteproc remoteproc3: remote processor 5c00000.r5f is now up
[    6.113431] VDDA_MCU_1V8: supplied by VCC_3V3
[    6.122610] platform 5e00000.r5f: configured R5F for remoteproc mode
[    6.131597] platform 5e00000.r5f: assigned reserved memory node vision-apps-r5f-dma-memory@a6000000
[    6.141166] remoteproc remoteproc4: powering up 5d00000.r5f
[    6.146890] remoteproc remoteproc4: Booting fw image j721s2-main-r5f0_1-fw, size 2088320
[    6.155944] remoteproc remoteproc5: 5e00000.r5f is available
[    6.164324]  remoteproc4#vdev0buffer: assigned reserved memory node vision-apps-r5f-dma-memory@a4000000
[    6.175325] platform 5f00000.r5f: configured R5F for remoteproc mode
[    6.183743] virtio_rpmsg_bus virtio4: rpmsg host is online
[    6.190003] remoteproc remoteproc5: powering up 5e00000.r5f
[    6.195701]  remoteproc4#vdev0buffer: registered virtio4 (type 7)
[    6.201861] remoteproc remoteproc5: Booting fw image j721s2-main-r5f1_0-fw, size 2503596
[    6.210019] remoteproc remoteproc4: remote processor 5d00000.r5f is now up
[    6.247211]  remoteproc5#vdev0buffer: assigned reserved memory node vision-apps-r5f-dma-memory@a6000000
[    6.257001] virtio_rpmsg_bus virtio5: rpmsg host is online
[    6.262722] platform 5f00000.r5f: assigned reserved memory node vision-apps-r5f-dma-memory@a7000000
[    6.271857]  remoteproc5#vdev0buffer: registered virtio5 (type 7)
[    6.274230] remoteproc remoteproc6: 5f00000.r5f is available
[    6.277966] remoteproc remoteproc5: remote processor 5e00000.r5f is now up
[    6.319726] remoteproc remoteproc6: loading /lib/firmware/j721s2-main-r5f1_1-fw failed with error -22
[    6.332170] remoteproc remoteproc6: Direct firmware load for j721s2-main-r5f1_1-fw failed with error -22
[    6.345437] remoteproc remoteproc6: powering up 5f00000.r5f
[    6.351086] remoteproc remoteproc6: loading /lib/firmware/j721s2-main-r5f1_1-fw failed with error -22
[    6.363674] remoteproc remoteproc6: Direct firmware load for j721s2-main-r5f1_1-fw failed with error -22
[    6.377661] remoteproc remoteproc6: request_firmware failed: -22
[    6.453468] usbcore: registered new interface driver usbfs
[    6.511554] usbcore: registered new interface driver hub
[    6.518584] usbcore: registered new device driver usb
[    6.576252] xhci-hcd xhci-hcd.7.auto: xHCI Host Controller
[    6.581856] xhci-hcd xhci-hcd.7.auto: new USB bus registered, assigned bus number 1
[    6.589660] xhci-hcd xhci-hcd.7.auto: hcc params 0x200073c9 hci version 0x100 quirks 0x0000002000010010
[    6.599124] xhci-hcd xhci-hcd.7.auto: irq 522, io mem 0x06010000
[    6.605344] xhci-hcd xhci-hcd.7.auto: xHCI Host Controller
[    6.610900] xhci-hcd xhci-hcd.7.auto: new USB bus registered, assigned bus number 2
[    6.618616] xhci-hcd xhci-hcd.7.auto: Host supports USB 3.0 SuperSpeed
[    6.625302] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.10
[    6.633585] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[    6.640852] usb usb1: Product: xHCI Host Controller
[    6.645800] usb usb1: Manufacturer: Linux 5.10.168-gd9f2d6234269-dirty xhci-hcd
[    6.653136] usb usb1: SerialNumber: xhci-hcd.7.auto
[    6.658429] hub 1-0:1.0: USB hub found
[    6.662343] hub 1-0:1.0: 1 port detected
[    6.666573] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
[    6.674806] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 5.10
[    6.683093] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[    6.690369] usb usb2: Product: xHCI Host Controller
[    6.695266] usb usb2: Manufacturer: Linux 5.10.168-gd9f2d6234269-dirty xhci-hcd
[    6.702587] usb usb2: SerialNumber: xhci-hcd.7.auto
[    6.707766] hub 2-0:1.0: USB hub found
[    6.711553] hub 2-0:1.0: 1 port detected
[    6.921725] usb 1-1: new high-speed USB device number 2 using xhci-hcd
[    7.084618] usb 1-1: New USB device found, idVendor=2109, idProduct=2817, bcdDevice=90.94
[    7.101806] usb 1-1: New USB device strings: Mfr=1, Product=2, SerialNumber=3
[    7.114392] usb 1-1: Product: USB2.0 Hub             
[    7.125964] usb 1-1: Manufacturer: VIA Labs, Inc.         
[    7.141697] usb 1-1: SerialNumber: 000000000
[    7.157970] hub 1-1:1.0: USB hub found
[    7.173892] hub 1-1:1.0: 5 ports detected
[    7.539431] Bluetooth: Core ver 2.22
[    7.545304] NET: Registered protocol family 31
[    7.549850] Bluetooth: HCI device and connection manager initialized
[    7.560559] Bluetooth: HCI socket layer initialized
[    7.566836] Bluetooth: L2CAP socket layer initialized
[    7.575085] Bluetooth: SCO socket layer initialized
[    7.901730] usb 1-1.4: new high-speed USB device number 3 using xhci-hcd
[    8.058665] usb 1-1.4: New USB device found, idVendor=0bda, idProduct=8153, bcdDevice=30.00
[    8.068323] usb 1-1.4: New USB device strings: Mfr=1, Product=2, SerialNumber=6
[    8.079418] usb 1-1.4: Product: USB 10/100/1000 LAN
[    8.087078] usb 1-1.4: Manufacturer: Realtek
[    8.092210] usb 1-1.4: SerialNumber: 000001
[    8.177726] usb 1-1.5: new high-speed USB device number 4 using xhci-hcd
[    8.336810] usb 1-1.5: New USB device found, idVendor=2109, idProduct=8817, bcdDevice= 0.01
[    8.346829] usb 1-1.5: New USB device strings: Mfr=1, Product=2, SerialNumber=3
[    8.356653] usb 1-1.5: Product: PD3.0 USB-C Device     
[    8.364367] usb 1-1.5: Manufacturer: VIA Labs, Inc.         
[    8.372862] usb 1-1.5: SerialNumber: 0000000000000001
[    8.414116] usb 1-1.4: reset high-speed USB device number 3 using xhci-hcd
[    8.574355] r8152 1-1.4:1.0: Direct firmware load for rtl_nic/rtl8153a-4.fw failed with error -2
[    8.585616] r8152 1-1.4:1.0: unable to load firmware patch rtl_nic/rtl8153a-4.fw (-2)
[    8.645829] r8152 1-1.4:1.0 eth0: v1.11.11
[    8.650133] usbcore: registered new interface driver r8152
[    8.671319] usbcore: registered new interface driver cdc_ether
[   10.286886] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this.
[   10.319205] Bridge firewalling registered
[   10.566846] Initializing XFRM netlink socket
[   11.258937] process 'docker/tmp/qemu-check242418259/check' started with executable stack
[   11.498598] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
[   11.505015] r8152 1-1.4:1.0 eth0: carrier on
[   12.376441] cfg80211: Loading compiled-in X.509 certificates for regulatory database
[   12.418095] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
root@j721s2-evm:/opt/edgeai-gst-apps# 

Remote proc loggs:

root@j721s2-evm:/opt/edgeai-gst-apps# /opt/vision_apps-v3/vx_app_arm_remote_log.out 
[MCU2_0]     23.892202 s: CIO: Init ... Done !!!
[MCU2_0]     23.892252 s: ### CPU Frequency = 1000000000 Hz
[MCU2_0]     23.892283 s: CPU is running FreeRTOS
[MCU2_0]     23.892303 s: APP: Init ... !!!
[MCU2_0]     23.892323 s: SCICLIENT: Init ... !!!
[MCU2_0]     23.892439 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[MCU2_0]     23.892471 s: SCICLIENT: DMSC FW revision 0x9  
[MCU2_0]     23.892499 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_0]     23.892529 s: SCICLIENT: Init ... Done !!!
[MCU2_0]     23.892552 s: UDMA: Init ... !!!
[MCU2_0]     23.893344 s: UDMA: Init ... Done !!!
[MCU2_0]     23.893380 s: UDMA: Init ... !!!
[MCU2_0]     23.893813 s: UDMA: Init for CSITX/CSIRX ... Done !!!
[MCU2_0]     23.893868 s: MEM: Init ... !!!
[MCU2_0]     23.893905 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ d9000000 of size 16777216 bytes !!!
[MCU2_0]     23.893966 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 60000000 of size 524288 bytes !!!
[MCU2_0]     23.894021 s: MEM: Init ... Done !!!
[MCU2_0]     23.894043 s: IPC: Init ... !!!
[MCU2_0]     23.894091 s: IPC: 5 CPUs participating in IPC !!!
[MCU2_0]     23.894125 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_0]     23.894151 s: IPC: HLOS is ready !!!
[MCU2_0]     23.903706 s: IPC: Init ... Done !!!
[MCU2_0]     23.903745 s: APP: Syncing with 5 CPUs ... !!!
[MCU2_0]     24.040560 s: APP: Syncing with 5 CPUs ... Done !!!
[MCU2_0]     24.040597 s: REMOTE_SERVICE: Init ... !!!
[MCU2_0]     24.042061 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_0]     24.042097 s: FVID2: Init ... !!!
[MCU2_0]     24.042152 s: FVID2: Init ... Done !!!
[MCU2_0]     24.042177 s: VHWA: VPAC Init ... !!!
[MCU2_0]     24.042199 s: SCICLIENT: Sciclient_pmSetModuleState module=361 state=2
[MCU2_0]     24.042315 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.042385 s: VHWA: LDC Init ... !!!
[MCU2_0]     24.045064 s: VHWA: LDC Init ... Done !!!
[MCU2_0]     24.045100 s: VHWA: MSC Init ... !!!
[MCU2_0]     24.054734 s: VHWA: MSC Init ... Done !!!
[MCU2_0]     24.054766 s: VHWA: NF Init ... !!!
[MCU2_0]     24.055626 s: VHWA: NF Init ... Done !!!
[MCU2_0]     24.055657 s: VHWA: VISS Init ... !!!
[MCU2_0]     24.062351 s: VHWA: VISS Init ... Done !!!
[MCU2_0]     24.062392 s: VHWA: VPAC Init ... Done !!!
[MCU2_0]     24.062427 s:  VX_ZONE_INIT:Enabled
[MCU2_0]     24.062452 s:  VX_ZONE_ERROR:Enabled
[MCU2_0]     24.062475 s:  VX_ZONE_WARNING:Enabled
[MCU2_0]     24.063471 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-0 
[MCU2_0]     24.063669 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_NF 
[MCU2_0]     24.063865 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_LDC1 
[MCU2_0]     24.064055 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC1 
[MCU2_0]     24.064235 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC2 
[MCU2_0]     24.064462 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_VISS1 
[MCU2_0]     24.064663 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE1 
[MCU2_0]     24.064860 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE2 
[MCU2_0]     24.065048 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY1 
[MCU2_0]     24.065234 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY2 
[MCU2_0]     24.065428 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CSITX 
[MCU2_0]     24.065623 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE3 
[MCU2_0]     24.065800 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE4 
[MCU2_0]     24.065984 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE5 
[MCU2_0]     24.066163 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE6 
[MCU2_0]     24.066361 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE7 
[MCU2_0]     24.066550 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE8 
[MCU2_0]     24.066730 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M1 
[MCU2_0]     24.066925 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M2 
[MCU2_0]     24.067129 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M3 
[MCU2_0]     24.067319 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M4 
[MCU2_0]     24.067506 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CSITX2 
[MCU2_0]     24.067548 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU2_0]     24.067577 s: APP: OpenVX Target kernel init ... !!!
[MCU2_0]     24.097847 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_0]     24.097881 s: VISS REMOTE SERVICE: Init ... !!!
[MCU2_0]     24.097937 s: VISS REMOTE SERVICE: Init ... Done !!!
[MCU2_0]     24.097964 s: UDMA Copy: Init ... !!!
[MCU2_0]     24.098798 s: UDMA Copy: Init ... Done !!!
[MCU2_0]     24.098872 s: APP: Init ... Done !!!
[MCU2_0]     24.098901 s: APP: Run ... !!!
[MCU2_0]     24.098922 s: IPC: Starting echo test ...
[MCU2_0]     24.101318 s: APP: Run ... Done !!!
[MCU2_0]     24.101995 s: IPC: Echo status: mcu2_0[s] mcu2_1[.] mcu3_0[x] C7X_1[P] C7X_2[.] 
[MCU2_0]     24.102071 s: IPC: Echo status: mcu2_0[s] mcu2_1[P] mcu3_0[x] C7X_1[P] C7X_2[.] 
[MCU2_0]     24.102136 s: IPC: Echo status: mcu2_0[s] mcu2_1[P] mcu3_0[x] C7X_1[P] C7X_2[P] 
[MCU2_1]     23.945127 s: CIO: Init ... Done !!!
[MCU2_1]     23.945177 s: ### CPU Frequency = 1000000000 Hz
[MCU2_1]     23.945208 s: CPU is running FreeRTOS
[MCU2_1]     23.945228 s: APP: Init ... !!!
[MCU2_1]     23.945247 s: SCICLIENT: Init ... !!!
[MCU2_1]     23.945364 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[MCU2_1]     23.945395 s: SCICLIENT: DMSC FW revision 0x9  
[MCU2_1]     23.945422 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_1]     23.945453 s: SCICLIENT: Init ... Done !!!
[MCU2_1]     23.945475 s: UDMA: Init ... !!!
[MCU2_1]     23.946281 s: UDMA: Init ... Done !!!
[MCU2_1]     23.946328 s: MEM: Init ... !!!
[MCU2_1]     23.946363 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ da000000 of size 16777216 bytes !!!
[MCU2_1]     23.946419 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 60080000 of size 524288 bytes !!!
[MCU2_1]     23.946469 s: MEM: Init ... Done !!!
[MCU2_1]     23.946489 s: IPC: Init ... !!!
[MCU2_1]     23.946534 s: IPC: 5 CPUs participating in IPC !!!
[MCU2_1]     23.946566 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_1]     23.946592 s: IPC: HLOS is ready !!!
[MCU2_1]     23.956162 s: IPC: Init ... Done !!!
[MCU2_1]     23.956202 s: APP: Syncing with 5 CPUs ... !!!
[MCU2_1]     24.040559 s: APP: Syncing with 5 CPUs ... Done !!!
[MCU2_1]     24.040590 s: REMOTE_SERVICE: Init ... !!!
[MCU2_1]     24.041914 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_1]     24.041952 s: FVID2: Init ... !!!
[MCU2_1]     24.042005 s: FVID2: Init ... Done !!!
[MCU2_1]     24.042027 s: VHWA: DMPAC: Init ... !!!
[MCU2_1]     24.042048 s: SCICLIENT: Sciclient_pmSetModuleState module=58 state=2
[MCU2_1]     24.042193 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]     24.042220 s: SCICLIENT: Sciclient_pmSetModuleState module=62 state=2
[MCU2_1]     24.042369 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]     24.042398 s: VHWA: DOF Init ... !!!
[MCU2_1]     24.046591 s: VHWA: DOF Init ... Done !!!
[MCU2_1]     24.046625 s: VHWA: SDE Init ... !!!
[MCU2_1]     24.048110 s: VHWA: SDE Init ... Done !!!
[MCU2_1]     24.048140 s: VHWA: DMPAC: Init ... Done !!!
[MCU2_1]     24.048173 s:  VX_ZONE_INIT:Enabled
[MCU2_1]     24.048195 s:  VX_ZONE_ERROR:Enabled
[MCU2_1]     24.048216 s:  VX_ZONE_WARNING:Enabled
[MCU2_1]     24.049220 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-1 
[MCU2_1]     24.049394 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_SDE 
[MCU2_1]     24.049566 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_DOF 
[MCU2_1]     24.049608 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU2_1]     24.049637 s: APP: OpenVX Target kernel init ... !!!
[MCU2_1]     24.049868 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_1]     24.049897 s: UDMA Copy: Init ... !!!
[MCU2_1]     24.051175 s: UDMA Copy: Init ... Done !!!
[MCU2_1]     24.051212 s: APP: Init ... Done !!!
[MCU2_1]     24.051235 s: APP: Run ... !!!
[MCU2_1]     24.051255 s: IPC: Starting echo test ...
[MCU2_1]     24.053317 s: APP: Run ... Done !!!
[MCU2_1]     24.053839 s: IPC: Echo status: mcu2_0[x] mcu2_1[s] mcu3_0[x] C7X_1[P] C7X_2[.] 
[MCU2_1]     24.053907 s: IPC: Echo status: mcu2_0[x] mcu2_1[s] mcu3_0[x] C7X_1[P] C7X_2[P] 
[MCU2_1]     24.101874 s: IPC: Echo status: mcu2_0[P] mcu2_1[s] mcu3_0[x] C7X_1[P] C7X_2[P] 
[MCU3_0]     24.030814 s: CIO: Init ... Done !!!
[MCU3_0]     24.030867 s: ### CPU Frequency = 1000000000 Hz
[MCU3_0]     24.030898 s: CPU is running FreeRTOS
[MCU3_0]     24.030919 s: APP: Init ... !!!
[MCU3_0]     24.030939 s: SCICLIENT: Init ... !!!
[MCU3_0]     24.031052 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[MCU3_0]     24.031084 s: SCICLIENT: DMSC FW revision 0x9  
[MCU3_0]     24.031111 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU3_0]     24.031142 s: SCICLIENT: Init ... Done !!!
[MCU3_0]     24.031165 s: MEM: Init ... !!!
[MCU3_0]     24.031195 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ db000000 of size 8388608 bytes !!!
[MCU3_0]     24.031251 s: MEM: Init ... Done !!!
[MCU3_0]     24.031273 s: IPC: Init ... !!!
[MCU3_0]     24.031317 s: IPC: 5 CPUs participating in IPC !!!
[MCU3_0]     24.031353 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU3_0]     24.031380 s: IPC: HLOS is ready !!!
[MCU3_0]     24.040486 s: IPC: Init ... Done !!!
[MCU3_0]     24.040525 s: APP: Syncing with 5 CPUs ... !!!
[MCU3_0]     24.040559 s: APP: Syncing with 5 CPUs ... Done !!!
[MCU3_0]     24.040587 s: REMOTE_SERVICE: Init ... !!!
[MCU3_0]     24.041937 s: REMOTE_SERVICE: Init ... Done !!!
[MCU3_0]     24.041984 s:  VX_ZONE_INIT:Enabled
[MCU3_0]     24.042008 s:  VX_ZONE_ERROR:Enabled
[MCU3_0]     24.042029 s:  VX_ZONE_WARNING:Enabled
[MCU3_0]     24.042982 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU3-0 
[MCU3_0]     24.043026 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU3_0]     24.043055 s: APP: OpenVX Target kernel init ... !!!
[MCU3_0]     24.043079 s: APP: OpenVX Target kernel init ... Done !!!
[MCU3_0]     24.043104 s: APP: Init ... Done !!!
[MCU3_0]     24.043126 s: APP: Run ... !!!
[MCU3_0]     24.043145 s: IPC: Starting echo test ...
[MCU3_0]     24.045195 s: APP: Run ... Done !!!
[MCU3_0]     24.045255 s: CIO: Init ... Done !!!
[MCU3_0]     24.045281 s: Start UDMA init
[MCU3_0]     24.045300 s: UDMA: Init ... !!!
[MCU3_0]     24.047267 s: UDMA: Init ... Done !!!
[MCU3_0]     24.047304 s: End UDMA init
[MCU3_0]     24.047322 s: <<<<<<<<<<<<<<<TEST>>>>>>>>>>>>>>> : PRE ENABLE SCICLIENT init !!!
[MCU3_0]     24.047353 s: SCICLIENT: Init ... !!!
[MCU3_0]     24.047571 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[MCU3_0]     24.047602 s: SCICLIENT: DMSC FW revision 0x9  
[MCU3_0]     24.047629 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU3_0]     24.047659 s: SCICLIENT: Init ... Done !!!
[MCU3_0]     24.047681 s: <<<<<<<<<<<<<<<TEST>>>>>>>>>>>>>>> : AFTER ENABLE SCICLIENT init !!!
[MCU3_0]     24.047711 s: Start DSS init
[MCU3_0]     24.047737 s: <<<<<<<<<<<<<<<TEST>>>>>>>>>>>>>>> : PRE FVID2 init !!!
[MCU3_0]     24.047765 s: FVID2: Init ... !!!
[MCU3_0]     24.047816 s: FVID2: Init ... Done !!!
[MCU3_0]     24.047838 s: <<<<<<<<<<<<<<<TEST>>>>>>>>>>>>>>> : AFTER FVID2 init !!!
[MCU3_0]     24.047866 s: <<<<<<<<<<<<<<<TEST>>>>>>>>>>>>>>> : PRE I2C init !!!
[MCU3_0]     24.047893 s: SCICLIENT: Sciclient_pmSetModuleState module=219 state=2
[MCU3_0]     24.048039 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU3_0]     24.048077 s: <<<<<<<<<<<<<<<TEST>>>>>>>>>>>>>>> : AFTER I2C init !!!
[MCU3_0]     24.048106 s: DSS: Init ... !!!
[MCU3_0]     24.048126 s: DSS: Display type is HDMI !!!
[MCU3_0]     24.048149 s: DSS: M2M Path is enabled !!!
[MCU3_0]     24.048171 s: DSS: SoC init ... !!!
[MCU3_0]     24.048191 s: SCICLIENT: Sciclient_pmSetModuleState module=158 state=0
[MCU3_0]     24.048293 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU3_0]     24.048321 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=158 clk=5 parent=7
[MCU3_0]     24.048406 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU3_0]     24.048434 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=158 clk=5 freq=148500000
[MCU3_0]     24.049440 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success
[MCU3_0]     24.049468 s: SCICLIENT: Sciclient_pmModuleClkRequest module=158 clk=5 state=2 flag=0
[MCU3_0]     24.049552 s: SCICLIENT: Sciclient_pmModuleClkRequest success
[MCU3_0]     24.049578 s: DSS: SoC init ... Done !!!
[MCU3_0]     24.049599 s: <<<<<<<<<<<<<<<TEST>>>>>>>>>>>>>>> : DSS: PRE conf board !!!
[MCU3_0]     24.049628 s: DSS: Board init ... !!!
[MCU3_0]     24.049649 s: DSS: Board init ... Done !!!
[MCU3_0]     24.049669 s: <<<<<<<<<<<<<<<TEST>>>>>>>>>>>>>>> : DSS: AFTER conf board !!!
[MCU3_0]     24.049701 s: <<<<<<<<<<<<<<<TEST>>>>>>>>>>>>>>> : PRE APP DSS init !!!
[MCU3_0]     24.049734 s: <<<<<<<<<<<<<<<TEST>>>>>>>>>>>>>>> : DSS: PRE Dss_init !!!
[MCU3_0]     24.049772 s: src/drv/common/dss_init.c @ Line 102: 
[MCU3_0]     24.049797 s: Before param check
[MCU3_0]     24.049822 s: src/drv/common/dss_init.c @ Line 109: 
[MCU3_0]     24.049847 s: After param check
[MCU3_0]     24.049876 s: src/drv/common/dss_init.c @ Line 116: 
[MCU3_0]     24.049901 s: Before EM
[MCU3_0]     24.050065 s: src/drv/common/dss_init.c @ Line 123: 
[MCU3_0]     24.050091 s: After EM
[MCU3_0]     24.050116 s: src/drv/common/dss_init.c @ Line 154: 
[MCU3_0]     24.050140 s: Before driver
[MCU3_0]     24.050382 s: src/drv/dctrl/dss_dctrlApi.c @ Line 222: 
[MCU3_0]     24.050408 s: Before Dss_dctrlDrvGraphInit
[MCU3_0]     24.050757 s: src/drv/dctrl/dss_dctrlApi.c @ Line 225: 
[MCU3_0]     24.050786 s: After Dss_dctrlDrvGraphInit
[MCU3_0]     24.050833 s: src/drv/dctrl/dss_dctrlApi.c @ Line 266: 
[MCU3_0]     24.050860 s: Before Register for Video Port events
[MCU3_0]     24.050891 s: src/drv/dctrl/dss_dctrlApi.c @ Line 270: 
[MCU3_0]     24.050917 s: Before Dss_convModuletoEventGroup
[MCU3_0]     24.050947 s: src/drv/dctrl/dss_dctrlApi.c @ Line 276: 
[MCU3_0]     24.050973 s: After Dss_convModuletoEventGroup
[MCU3_0]     24.051002 s: src/drv/dctrl/dss_dctrlApi.c @ Line 279: 
[MCU3_0]     24.051028 s: Before Dss_getEnabledVpFuncEvents
[MCU3_0]     24.051058 s: src/drv/dctrl/dss_dctrlApi.c @ Line 281: 
[MCU3_0]     24.051084 s: After Dss_getEnabledVpFuncEvents
[MCU3_0]     24.051112 s: src/drv/dctrl/dss_dctrlApi.c @ Line 283: 
[MCU3_0]     24.051138 s: Before Dss_getEvtMgrFuncIntrId
[MCU3_0]     24.051166 s: src/drv/dctrl/dss_dctrlApi.c @ Line 285: 
[MCU3_0]     24.051192 s: After Dss_getEvtMgrFuncIntrId
[MCU3_0]     24.051219 s: src/drv/dctrl/dss_dctrlApi.c @ Line 286: 
[MCU3_0]     24.051245 s: Before Dss_evtMgrRegister
[MCU3_0]     24.051275 s: src/drv/common/dss_evtMgr.c @ Line 268: 
[MCU3_0]     24.051300 s: Before Dss_evtMgrGetInstObj
[MCU3_0]     24.051328 s: src/drv/common/dss_evtMgr.c @ Line 270: 
[MCU3_0]     24.051354 s: After Dss_evtMgrGetInstObj
[MCU3_0]     24.051381 s: src/drv/common/dss_evtMgr.c @ Line 280: 
[MCU3_0]     24.051406 s: Before SemaphoreP_pend
[MCU3_0]     24.051433 s: src/drv/common/dss_evtMgr.c @ Line 283: 
[MCU3_0]     24.051463 s: After SemaphoreP_pend
[MCU3_0]     24.051489 s: src/drv/common/dss_evtMgr.c @ Line 286: 
[MCU3_0]     24.051515 s: Before Dss_evtMgrCreateInfo
[MCU3_0]     24.051543 s: src/drv/common/dss_evtMgr.c @ Line 288: 
[MCU3_0]     24.051568 s: After Dss_evtMgrCreateInfo
[MCU3_0]     24.051596 s: src/drv/common/dss_evtMgr.c @ Line 298: 
[MCU3_0]     24.051621 s: Before Dss_evtMgrFillInfo
[MCU3_0]     24.051649 s: src/drv/common/dss_evtMgr.c @ Line 652: 
[MCU3_0]     24.051674 s: Before Dss_getSocInfo
[MCU3_0]     24.051701 s: src/drv/common/dss_evtMgr.c @ Line 654: 
[MCU3_0]     24.051726 s: After Dss_getSocInfo
[MCU3_0]     24.051752 s: src/drv/common/dss_evtMgr.c @ Line 660: 
[MCU3_0]     24.051778 s: Before Dss_enableL1Event
[MCU3_0]     24.051806 s: soc/V2/dss_soc.c @ Line 351: 
[MCU3_0]     24.051828 s: Before Dss_getSocInfo
[MCU3_0]     24.051854 s: soc/V2/dss_soc.c @ Line 353: 
[MCU3_0]     24.051877 s: After Dss_getSocInfo
[MCU3_0]     24.051905 s: soc/V2/dss_soc.c @ Line 387: 
[MCU3_0]     24.051929 s: Before CSL_REG32_RD(&commRegs->VP_IRQSTATUS_1);
[C7x_1 ]     23.324121 s: CIO: Init ... Done !!!
[C7x_1 ]     23.324136 s: ### CPU Frequency = 1000000000 Hz
[C7x_1 ]     23.324148 s: CPU is running FreeRTOS
[C7x_1 ]     23.324157 s: APP: Init ... !!!
[C7x_1 ]     23.324164 s: SCICLIENT: Init ... !!!
[C7x_1 ]     23.324274 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[C7x_1 ]     23.324288 s: SCICLIENT: DMSC FW revision 0x9  
[C7x_1 ]     23.324300 s: SCICLIENT: DMSC FW ABI revision 3.1
[C7x_1 ]     23.324312 s: SCICLIENT: Init ... Done !!!
[C7x_1 ]     23.324321 s: UDMA: Init ... !!!
[C7x_1 ]     23.325102 s: UDMA: Init ... Done !!!
[C7x_1 ]     23.325114 s: MEM: Init ... !!!
[C7x_1 ]     23.325126 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 117000000 of size 268435456 bytes !!!
[C7x_1 ]     23.325147 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 70020000 of size 3964928 bytes !!!
[C7x_1 ]     23.325166 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 64800000 of size 458752 bytes !!!
[C7x_1 ]     23.325183 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 64e00000 of size 16384 bytes !!!
[C7x_1 ]     23.325201 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ 100000000 of size 385875968 bytes !!!
[C7x_1 ]     23.325219 s: MEM: Init ... Done !!!
[C7x_1 ]     23.325227 s: IPC: Init ... !!!
[C7x_1 ]     23.325243 s: IPC: 5 CPUs participating in IPC !!!
[C7x_1 ]     23.325258 s: IPC: Waiting for HLOS to be ready ... !!!
[C7x_1 ]     23.325268 s: IPC: HLOS is ready !!!
[C7x_1 ]     23.326906 s: IPC: Init ... Done !!!
[C7x_1 ]     23.326921 s: APP: Syncing with 5 CPUs ... !!!
[C7x_1 ]     24.040560 s: APP: Syncing with 5 CPUs ... Done !!!
[C7x_1 ]     24.040580 s: REMOTE_SERVICE: Init ... !!!
[C7x_1 ]     24.040719 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_1 ]     24.040742 s:  VX_ZONE_INIT:Enabled
[C7x_1 ]     24.040779 s:  VX_ZONE_ERROR:Enabled
[C7x_1 ]     24.040792 s:  VX_ZONE_WARNING:Enabled
[C7x_1 ]     24.041021 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1 
[C7x_1 ]     24.041091 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_2 
[C7x_1 ]     24.041152 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_3 
[C7x_1 ]     24.041213 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_4 
[C7x_1 ]     24.041275 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_5 
[C7x_1 ]     24.041337 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_6 
[C7x_1 ]     24.041398 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_7 
[C7x_1 ]     24.041460 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_8 
[C7x_1 ]     24.041484 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C7x_1 ]     24.041497 s: APP: OpenVX Target kernel init ... !!!
[C7x_1 ]     24.041624 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_1 ]     24.041637 s: APP: Init ... Done !!!
[C7x_1 ]     24.041647 s: APP: Run ... !!!
[C7x_1 ]     24.041655 s: IPC: Starting echo test ...
[C7x_1 ]     24.041769 s: APP: Run ... Done !!!
[C7x_1 ]     24.042544 s: IPC: Echo status: mcu2_0[x] mcu2_1[x] mcu3_0[x] C7X_1[s] C7X_2[P] 
[C7x_1 ]     24.053743 s: IPC: Echo status: mcu2_0[x] mcu2_1[P] mcu3_0[x] C7X_1[s] C7X_2[P] 
[C7x_1 ]     24.101886 s: IPC: Echo status: mcu2_0[P] mcu2_1[P] mcu3_0[x] C7X_1[s] C7X_2[P] 
[C7x_2 ]     23.322678 s: CIO: Init ... Done !!!
[C7x_2 ]     23.322693 s: ### CPU Frequency = 1000000000 Hz
[C7x_2 ]     23.322705 s: CPU is running FreeRTOS
[C7x_2 ]     23.322714 s: APP: Init ... !!!
[C7x_2 ]     23.322722 s: SCICLIENT: Init ... !!!
[C7x_2 ]     23.322821 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[C7x_2 ]     23.322836 s: SCICLIENT: DMSC FW revision 0x9  
[C7x_2 ]     23.322847 s: SCICLIENT: DMSC FW ABI revision 3.1
[C7x_2 ]     23.322858 s: SCICLIENT: Init ... Done !!!
[C7x_2 ]     23.322868 s: UDMA: Init ... !!!
[C7x_2 ]     23.323587 s: UDMA: Init ... Done !!!
[C7x_2 ]     23.323601 s: MEM: Init ... !!!
[C7x_2 ]     23.323612 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 127000000 of size 16777216 bytes !!!
[C7x_2 ]     23.323634 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 65800000 of size 458752 bytes !!!
[C7x_2 ]     23.323652 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 65e00000 of size 16384 bytes !!!
[C7x_2 ]     23.323670 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ 128000000 of size 67108864 bytes !!!
[C7x_2 ]     23.323689 s: MEM: Init ... Done !!!
[C7x_2 ]     23.323698 s: IPC: Init ... !!!
[C7x_2 ]     23.323713 s: IPC: 5 CPUs participating in IPC !!!
[C7x_2 ]     23.323727 s: IPC: Waiting for HLOS to be ready ... !!!
[C7x_2 ]     23.323738 s: IPC: HLOS is ready !!!
[C7x_2 ]     23.325422 s: IPC: Init ... Done !!!
[C7x_2 ]     23.325437 s: APP: Syncing with 5 CPUs ... !!!
[C7x_2 ]     24.040561 s: APP: Syncing with 5 CPUs ... Done !!!
[C7x_2 ]     24.040583 s: REMOTE_SERVICE: Init ... !!!
[C7x_2 ]     24.040727 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_2 ]     24.040751 s:  VX_ZONE_INIT:Enabled
[C7x_2 ]     24.040789 s:  VX_ZONE_ERROR:Enabled
[C7x_2 ]     24.040801 s:  VX_ZONE_WARNING:Enabled
[C7x_2 ]     24.041282 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP-1 
[C7x_2 ]     24.041304 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C7x_2 ]     24.041318 s: APP: OpenVX Target kernel init ... !!!
[C7x_2 ]     24.041575 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_2 ]     24.041591 s: UDMA Copy: Init ... !!!
[C7x_2 ]     24.042141 s: UDMA Copy: Init ... Done !!!
[C7x_2 ]     24.042155 s: APP: Init ... Done !!!
[C7x_2 ]     24.042166 s: APP: Run ... !!!
[C7x_2 ]     24.042176 s: IPC: Starting echo test ...
[C7x_2 ]     24.042288 s: APP: Run ... Done !!!
[C7x_2 ]     24.042552 s: IPC: Echo status: mcu2_0[x] mcu2_1[x] mcu3_0[x] C7X_1[P] C7X_2[s] 
[C7x_2 ]     24.053829 s: IPC: Echo status: mcu2_0[x] mcu2_1[P] mcu3_0[x] C7X_1[P] C7X_2[s] 
[C7x_2 ]     24.101900 s: IPC: Echo status: mcu2_0[P] mcu2_1[P] mcu3_0[x] C7X_1[P] C7X_2[s] 

Working only on k3-j721s2-vision-apps.dtbo did not help.

The MCU3-0 is stack on the same register read.

Hi,

May I know if you were able to install CCS and connect to this core and check the status of this core?

Regards,

Nikhil

At the moment, I do not have a JTAG or a JTAG port on my motherboard for the SOM with the cip

My latest findings:

I switched to MCU2_0 to init DSS

what I did I enabled BOARD_DEPENDENCIES in ti-processor-sdk-rtos-j721s2-evm-08_06_00_11/vision_apps/vision_apps_build_flags.mak:

BUILD_MCU_BOARD_DEPENDENCIES?=yes

ifeq ($(BUILD_EDGEAI), yes)
BUILD_MCU_BOARD_DEPENDENCIES=yes
FIRMWARE_SUBFOLDER=vision_apps_eaik
UENV_NAME=uEnv_$(SOC)_edgeai_apps.txt
endif

And disbaled the CSI TX/RX and enabled DPI in ti-processor-sdk-rtos-j721s2-evm-08_06_00_11/vision_apps/platform/j721s2/rtos/common/app_cfg_mcu2_0.h

/* There are several external board interfaces to the SoC that can either be controlled by the MCU RTOS core
 * or the MPU HLOS core.  The top level build option BUILD_MCU_BOARD_DEPENDENCIES can be used to optionally enable
 * these interfaces (user can override specific flags in this file), or disable them.
 */
#ifdef BUILD_MCU_BOARD_DEPENDENCIES
    #define ENABLE_PRINTF_REDIRECT

    #undef ENABLE_CSI2RX
    #undef ENABLE_CSI2TX

    /* IMPORANT NOTE:
     * - Only one of ENABLE_DSS_SINGLE or ENABLE_DSS_DUAL should be defined
     * - When ENABLE_DSS_SINGLE is defined, only one of ENABLE_DSS_HDMI or ENABLE_DSS_EDP should be defined
     * - When ENABLE_DSS_DUAL is defined, ENABLE_DSS_HDMI and ENABLE_DSS_EDP are not used, both EDP and HDMI are enabled unconditionally
     */
    #define ENABLE_DSS_SINGLE
    #undef  ENABLE_DSS_DUAL

    /* define below to enable eDP display,
       make sure to undef ENABLE_DSS_HDMI & ENABLE_DSS_DSI as well */
    #undef ENABLE_DSS_EDP
    /* define below to enable HDMI display,
       make sure to undef ENABLE_DSS_EDP & ENABLE_DSS_DSI as well */
    #define ENABLE_DSS_HDMI
    /* define below to enable DSI display, make sure to undef ENABLE_DSS_HDMI
       & ENABLE_DSS_EDP as well */
    #undef ENABLE_DSS_DSI

    #define ENABLE_I2C
    #define ENABLE_BOARD

#else

MCU3_0 is disabled

And what I get in R5 logs:

root@j721s2-evm:/opt/edgeai-gst-apps# /opt/vision_apps-v4/vx_app_arm_remote_log.out 
[MCU2_0]     23.851715 s: CIO: Init ... Done !!!
[MCU2_0]     23.851763 s: ### CPU Frequency = 1000000000 Hz
[MCU2_0]     23.851796 s: CPU is running FreeRTOS
[MCU2_0]     23.851819 s: APP: Init ... !!!
[MCU2_0]     23.851838 s: SCICLIENT: Init ... !!!
[MCU2_0]     23.851955 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[MCU2_0]     23.851988 s: SCICLIENT: DMSC FW revision 0x9  
[MCU2_0]     23.852016 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_0]     23.852047 s: SCICLIENT: Init ... Done !!!
[MCU2_0]     23.852069 s: UDMA: Init ... !!!
[MCU2_0]     23.852830 s: UDMA: Init ... Done !!!
[MCU2_0]     23.852866 s: UDMA: Init ... !!!
[MCU2_0]     23.853303 s: UDMA: Init for CSITX/CSIRX ... Done !!!
[MCU2_0]     23.853362 s: MEM: Init ... !!!
[MCU2_0]     23.853400 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ d9000000 of size 16777216 bytes !!!
[MCU2_0]     23.853457 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 60000000 of size 524288 bytes !!!
[MCU2_0]     23.853509 s: MEM: Init ... Done !!!
[MCU2_0]     23.853531 s: IPC: Init ... !!!
[MCU2_0]     23.853575 s: IPC: 5 CPUs participating in IPC !!!
[MCU2_0]     23.853610 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_0]     23.853638 s: IPC: HLOS is ready !!!
[MCU2_0]     23.862858 s: IPC: Init ... Done !!!
[MCU2_0]     23.862902 s: APP: Syncing with 4 CPUs ... !!!
[MCU2_0]     23.985900 s: APP: Syncing with 4 CPUs ... Done !!!
[MCU2_0]     23.985935 s: REMOTE_SERVICE: Init ... !!!
[MCU2_0]     23.987222 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_0]     23.987261 s: FVID2: Init ... !!!
[MCU2_0]     23.987316 s: FVID2: Init ... Done !!!
[MCU2_0]     23.987339 s: SCICLIENT: Sciclient_pmSetModuleState module=219 state=2
[MCU2_0]     23.987440 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     23.987485 s: DSS: Init ... !!!
[MCU2_0]     23.987506 s: DSS: Display type is HDMI !!!
[MCU2_0]     23.987529 s: DSS: M2M Path is enabled !!!
[MCU2_0]     23.987553 s: DSS: SoC init ... !!!
[MCU2_0]     23.987573 s: SCICLIENT: Sciclient_pmSetModuleState module=158 state=0
[MCU2_0]     23.987639 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     23.987670 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=158 clk=5 parent=7
[MCU2_0]     23.987785 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU2_0]     23.987818 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=158 clk=5 freq=148500000
[MCU2_0]     23.988828 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success
[MCU2_0]     23.988857 s: SCICLIENT: Sciclient_pmModuleClkRequest module=158 clk=5 state=2 flag=0
[MCU2_0]     23.988969 s: SCICLIENT: Sciclient_pmModuleClkRequest success
[MCU2_0]     23.988997 s: DSS: SoC init ... Done !!!
[MCU2_0]     23.989019 s: DSS: Board init ... !!!
[MCU2_0]     23.989039 s: DSS: Board init ... Done !!!
[MCU2_1]     23.975193 s: CIO: Init ... Done !!!
[MCU2_1]     23.975242 s: ### CPU Frequency = 1000000000 Hz
[MCU2_1]     23.975273 s: CPU is running FreeRTOS
[MCU2_1]     23.975294 s: APP: Init ... !!!
[MCU2_1]     23.975314 s: SCICLIENT: Init ... !!!
[MCU2_1]     23.975428 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[MCU2_1]     23.975460 s: SCICLIENT: DMSC FW revision 0x9  
[MCU2_1]     23.975486 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_1]     23.975517 s: SCICLIENT: Init ... Done !!!
[MCU2_1]     23.975539 s: UDMA: Init ... !!!
[MCU2_1]     23.976347 s: UDMA: Init ... Done !!!
[MCU2_1]     23.976395 s: MEM: Init ... !!!
[MCU2_1]     23.976429 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ da000000 of size 16777216 bytes !!!
[MCU2_1]     23.976486 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 60080000 of size 524288 bytes !!!
[MCU2_1]     23.976537 s: MEM: Init ... Done !!!
[MCU2_1]     23.976557 s: IPC: Init ... !!!
[MCU2_1]     23.976604 s: IPC: 5 CPUs participating in IPC !!!
[MCU2_1]     23.976639 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_1]     23.976666 s: IPC: HLOS is ready !!!
[MCU2_1]     23.985824 s: IPC: Init ... Done !!!
[MCU2_1]     23.985864 s: APP: Syncing with 4 CPUs ... !!!
[MCU2_1]     23.985899 s: APP: Syncing with 4 CPUs ... Done !!!
[MCU2_1]     23.985927 s: REMOTE_SERVICE: Init ... !!!
[MCU2_1]     23.987225 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_1]     23.987262 s: FVID2: Init ... !!!
[MCU2_1]     23.987314 s: FVID2: Init ... Done !!!
[MCU2_1]     23.987337 s: VHWA: DMPAC: Init ... !!!
[MCU2_1]     23.987358 s: SCICLIENT: Sciclient_pmSetModuleState module=58 state=2
[MCU2_1]     23.987553 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]     23.987581 s: SCICLIENT: Sciclient_pmSetModuleState module=62 state=2
[MCU2_1]     23.987662 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]     23.987688 s: VHWA: DOF Init ... !!!
[MCU2_1]     23.991780 s: VHWA: DOF Init ... Done !!!
[MCU2_1]     23.991821 s: VHWA: SDE Init ... !!!
[MCU2_1]     23.993086 s: VHWA: SDE Init ... Done !!!
[MCU2_1]     23.993121 s: VHWA: DMPAC: Init ... Done !!!
[MCU2_1]     23.993155 s:  VX_ZONE_INIT:Enabled
[MCU2_1]     23.993177 s:  VX_ZONE_ERROR:Enabled
[MCU2_1]     23.993199 s:  VX_ZONE_WARNING:Enabled
[MCU2_1]     23.994217 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-1 
[MCU2_1]     23.994396 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_SDE 
[MCU2_1]     23.994569 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_DOF 
[MCU2_1]     23.994611 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU2_1]     23.994640 s: APP: OpenVX Target kernel init ... !!!
[MCU2_1]     23.994888 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_1]     23.994919 s: UDMA Copy: Init ... !!!
[MCU2_1]     23.995769 s: UDMA Copy: Init ... Done !!!
[MCU2_1]     23.995806 s: APP: Init ... Done !!!
[MCU2_1]     23.995836 s: APP: Run ... !!!
[MCU2_1]     23.995856 s: IPC: Starting echo test ...
[MCU2_1]     23.997915 s: APP: Run ... Done !!!
[MCU2_1]     23.998445 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C7X_1[P] C7X_2[.] 
[MCU2_1]     23.998513 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C7X_1[P] C7X_2[P] 
[C7x_1 ]     23.670174 s: CIO: Init ... Done !!!
[C7x_1 ]     23.670190 s: ### CPU Frequency = 1000000000 Hz
[C7x_1 ]     23.670201 s: CPU is running FreeRTOS
[C7x_1 ]     23.670211 s: APP: Init ... !!!
[C7x_1 ]     23.670219 s: SCICLIENT: Init ... !!!
[C7x_1 ]     23.670318 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[C7x_1 ]     23.670334 s: SCICLIENT: DMSC FW revision 0x9  
[C7x_1 ]     23.670344 s: SCICLIENT: DMSC FW ABI revision 3.1
[C7x_1 ]     23.670356 s: SCICLIENT: Init ... Done !!!
[C7x_1 ]     23.670365 s: UDMA: Init ... !!!
[C7x_1 ]     23.671140 s: UDMA: Init ... Done !!!
[C7x_1 ]     23.671155 s: MEM: Init ... !!!
[C7x_1 ]     23.671167 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 117000000 of size 268435456 bytes !!!
[C7x_1 ]     23.671190 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 70020000 of size 3964928 bytes !!!
[C7x_1 ]     23.671208 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 64800000 of size 458752 bytes !!!
[C7x_1 ]     23.671226 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 64e00000 of size 16384 bytes !!!
[C7x_1 ]     23.671243 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ 100000000 of size 385875968 bytes !!!
[C7x_1 ]     23.671263 s: MEM: Init ... Done !!!
[C7x_1 ]     23.671272 s: IPC: Init ... !!!
[C7x_1 ]     23.671288 s: IPC: 5 CPUs participating in IPC !!!
[C7x_1 ]     23.671303 s: IPC: Waiting for HLOS to be ready ... !!!
[C7x_1 ]     23.671316 s: IPC: HLOS is ready !!!
[C7x_1 ]     23.672853 s: IPC: Init ... Done !!!
[C7x_1 ]     23.672867 s: APP: Syncing with 4 CPUs ... !!!
[C7x_1 ]     23.985901 s: APP: Syncing with 4 CPUs ... Done !!!
[C7x_1 ]     23.985919 s: REMOTE_SERVICE: Init ... !!!
[C7x_1 ]     23.986069 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_1 ]     23.986116 s:  VX_ZONE_INIT:Enabled
[C7x_1 ]     23.986130 s:  VX_ZONE_ERROR:Enabled
[C7x_1 ]     23.986162 s:  VX_ZONE_WARNING:Enabled
[C7x_1 ]     23.986355 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1 
[C7x_1 ]     23.986418 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_2 
[C7x_1 ]     23.986479 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_3 
[C7x_1 ]     23.986541 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_4 
[C7x_1 ]     23.986604 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_5 
[C7x_1 ]     23.986664 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_6 
[C7x_1 ]     23.986726 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_7 
[C7x_1 ]     23.986787 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_8 
[C7x_1 ]     23.986812 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C7x_1 ]     23.986826 s: APP: OpenVX Target kernel init ... !!!
[C7x_1 ]     23.986955 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_1 ]     23.986969 s: APP: Init ... Done !!!
[C7x_1 ]     23.986978 s: APP: Run ... !!!
[C7x_1 ]     23.986987 s: IPC: Starting echo test ...
[C7x_1 ]     23.987115 s: APP: Run ... Done !!!
[C7x_1 ]     23.987909 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C7X_1[s] C7X_2[P] 
[C7x_1 ]     23.998334 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C7X_1[s] C7X_2[P] 
[C7x_2 ]     23.847448 s: CIO: Init ... Done !!!
[C7x_2 ]     23.847465 s: ### CPU Frequency = 1000000000 Hz
[C7x_2 ]     23.847478 s: CPU is running FreeRTOS
[C7x_2 ]     23.847487 s: APP: Init ... !!!
[C7x_2 ]     23.847496 s: SCICLIENT: Init ... !!!
[C7x_2 ]     23.847593 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[C7x_2 ]     23.847608 s: SCICLIENT: DMSC FW revision 0x9  
[C7x_2 ]     23.847620 s: SCICLIENT: DMSC FW ABI revision 3.1
[C7x_2 ]     23.847631 s: SCICLIENT: Init ... Done !!!
[C7x_2 ]     23.847640 s: UDMA: Init ... !!!
[C7x_2 ]     23.848353 s: UDMA: Init ... Done !!!
[C7x_2 ]     23.848367 s: MEM: Init ... !!!
[C7x_2 ]     23.848378 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 127000000 of size 16777216 bytes !!!
[C7x_2 ]     23.848401 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 65800000 of size 458752 bytes !!!
[C7x_2 ]     23.848420 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 65e00000 of size 16384 bytes !!!
[C7x_2 ]     23.848438 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ 128000000 of size 67108864 bytes !!!
[C7x_2 ]     23.848457 s: MEM: Init ... Done !!!
[C7x_2 ]     23.848466 s: IPC: Init ... !!!
[C7x_2 ]     23.848480 s: IPC: 5 CPUs participating in IPC !!!
[C7x_2 ]     23.848496 s: IPC: Waiting for HLOS to be ready ... !!!
[C7x_2 ]     23.848509 s: IPC: HLOS is ready !!!
[C7x_2 ]     23.850075 s: IPC: Init ... Done !!!
[C7x_2 ]     23.850089 s: APP: Syncing with 4 CPUs ... !!!
[C7x_2 ]     23.985901 s: APP: Syncing with 4 CPUs ... Done !!!
[C7x_2 ]     23.985920 s: REMOTE_SERVICE: Init ... !!!
[C7x_2 ]     23.986067 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_2 ]     23.986090 s:  VX_ZONE_INIT:Enabled
[C7x_2 ]     23.986125 s:  VX_ZONE_ERROR:Enabled
[C7x_2 ]     23.986139 s:  VX_ZONE_WARNING:Enabled
[C7x_2 ]     23.986608 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP-1 
[C7x_2 ]     23.986630 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C7x_2 ]     23.986644 s: APP: OpenVX Target kernel init ... !!!
[C7x_2 ]     23.986896 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_2 ]     23.986912 s: UDMA Copy: Init ... !!!
[C7x_2 ]     23.987509 s: UDMA Copy: Init ... Done !!!
[C7x_2 ]     23.987524 s: APP: Init ... Done !!!
[C7x_2 ]     23.987535 s: APP: Run ... !!!
[C7x_2 ]     23.987543 s: IPC: Starting echo test ...
[C7x_2 ]     23.987660 s: APP: Run ... Done !!!
[C7x_2 ]     23.987917 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C7X_1[P] C7X_2[s] 
[C7x_2 ]     23.998405 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C7X_1[P] C7X_2[s]

It is stack on the same read of IRQ status register.

What I see is configured in the view of k3conf from DSS perspective:

root@j721s2-evm:/opt/edgeai-gst-apps# k3conf dump devices | grep DSS
|   154     | J721S2_DEV_DSS_DSI0                                 | DEVICE_STATE_ON  |
|   155     | J721S2_DEV_DSS_DSI1                                 | DEVICE_STATE_OFF |
|   156     | J721S2_DEV_DSS_EDP0                                 | DEVICE_STATE_OFF |
|   158     | J721S2_DEV_DSS0                                     | DEVICE_STATE_OFF |
|   253     | J721S2_DEV_NAVSS0_MODSS                             | DEVICE_STATE_ON  |
|   254     | J721S2_DEV_NAVSS0_MODSS_INTA_0                      | DEVICE_STATE_ON  |
|   255     | J721S2_DEV_NAVSS0_MODSS_INTA_1                      | DEVICE_STATE_ON  |
|   270     | J721S2_DEV_MCU_NAVSS0_MODSS                         | DEVICE_STATE_ON  |

In the device tree we have only vision-apps overlay

Hi,

HDMI is not supported in J721s2. Could you try enabling eDP instead and check if you are seeing the same?

Regards,

Nikhil

Enabled only eDP

root@j721s2-evm:/opt/edgeai-gst-apps# k3conf dump devices | grep DSS
|   154     | J721S2_DEV_DSS_DSI0                                 | DEVICE_STATE_ON  |
|   155     | J721S2_DEV_DSS_DSI1                                 | DEVICE_STATE_OFF |
|   156     | J721S2_DEV_DSS_EDP0                                 | DEVICE_STATE_ON  |
|   158     | J721S2_DEV_DSS0                                     | DEVICE_STATE_ON  |
|   253     | J721S2_DEV_NAVSS0_MODSS                             | DEVICE_STATE_ON  |
|   254     | J721S2_DEV_NAVSS0_MODSS_INTA_0                      | DEVICE_STATE_ON  |
|   255     | J721S2_DEV_NAVSS0_MODSS_INTA_1                      | DEVICE_STATE_ON  |
|   270     | J721S2_DEV_MCU_NAVSS0_MODSS                         | DEVICE_STATE_ON  |
root@j721s2-evm:/opt/edgeai-gst-apps# /opt/vision_apps-v4/vx_app_arm_remote_log.out 
[MCU2_0]     24.052636 s: CIO: Init ... Done !!!
[MCU2_0]     24.052688 s: Before  ENABLE_BOARD
[MCU2_0]     24.052709 s: Start  ENABLE_BOARD
[MCU2_0]     24.052729 s: IN  ENABLE_DSS_SINGLE
[MCU2_0]     24.052756 s: End  ENABLE_BOARD
[MCU2_0]     24.052775 s: After  ENABLE_BOARD
[MCU2_0]     24.052795 s: ### CPU Frequency = 1000000000 Hz
[MCU2_0]     24.052823 s: CPU is running FreeRTOS
[MCU2_0]     24.052843 s: APP: Init ... !!!
[MCU2_0]     24.052862 s: SCICLIENT: Init ... !!!
[MCU2_0]     24.052977 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[MCU2_0]     24.053010 s: SCICLIENT: DMSC FW revision 0x9  
[MCU2_0]     24.053036 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_0]     24.053067 s: SCICLIENT: Init ... Done !!!
[MCU2_0]     24.053089 s: UDMA: Init ... !!!
[MCU2_0]     24.053857 s: UDMA: Init ... Done !!!
[MCU2_0]     24.053892 s: UDMA: Init ... !!!
[MCU2_0]     24.054320 s: UDMA: Init for CSITX/CSIRX ... Done !!!
[MCU2_0]     24.054371 s: MEM: Init ... !!!
[MCU2_0]     24.054408 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ d9000000 of size 16777216 bytes !!!
[MCU2_0]     24.054469 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 60000000 of size 524288 bytes !!!
[MCU2_0]     24.054522 s: MEM: Init ... Done !!!
[MCU2_0]     24.054545 s: IPC: Init ... !!!
[MCU2_0]     24.054591 s: IPC: 5 CPUs participating in IPC !!!
[MCU2_0]     24.054627 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_0]     24.054657 s: IPC: HLOS is ready !!!
[MCU2_0]     24.063779 s: IPC: Init ... Done !!!
[MCU2_0]     24.063819 s: APP: Syncing with 4 CPUs ... !!!
[MCU2_0]     24.111851 s: APP: Syncing with 4 CPUs ... Done !!!
[MCU2_0]     24.111885 s: REMOTE_SERVICE: Init ... !!!
[MCU2_0]     24.113129 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_0]     24.113204 s: FVID2: Init ... !!!
[MCU2_0]     24.113255 s: FVID2: Init ... Done !!!
[MCU2_0]     24.113281 s: SCICLIENT: Sciclient_pmSetModuleState module=219 state=2
[MCU2_0]     24.113393 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.113433 s: Before  ENABLE_DSS_SINGLE
[MCU2_0]     24.113456 s: Start  ENABLE_DSS_SINGLE
[MCU2_0]     24.113478 s: Before  APP_DSS_DEFAULT_DISPLAY_TYPE_EDP
[MCU2_0]     24.113504 s: DSS: Init ... !!!
[MCU2_0]     24.113524 s: DSS: Display type is eDP !!!
[MCU2_0]     24.113547 s: DSS: M2M Path is enabled !!!
[MCU2_0]     24.113569 s: DSS: SoC init ... !!!
[MCU2_0]     24.113590 s: SCICLIENT: Sciclient_pmSetModuleState module=158 state=0
[MCU2_0]     24.113649 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.113676 s: SCICLIENT: Sciclient_pmSetModuleState module=365 state=2
[MCU2_0]     24.113770 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.113798 s: SCICLIENT: Sciclient_pmSetModuleState module=156 state=2
[MCU2_0]     24.113906 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.113933 s: SCICLIENT: Sciclient_pmSetModuleState module=365 state=2
[MCU2_0]     24.114016 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.114041 s: SCICLIENT: Sciclient_pmSetModuleState module=156 state=2
[MCU2_0]     24.114116 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.114141 s: SCICLIENT: Sciclient_pmSetModuleState module=158 state=0
[MCU2_0]     24.114216 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.114242 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=158 clk=3 freq=148500000
[MCU2_0]     24.114355 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success
[MCU2_0]     24.114383 s: SCICLIENT: Sciclient_pmModuleClkRequest module=158 clk=3 state=2 flag=2
[MCU2_0]     24.114473 s: SCICLIENT: Sciclient_pmModuleClkRequest success
[MCU2_0]     24.114500 s: SCICLIENT: Sciclient_pmSetModuleState module=158 state=2
[MCU2_0]     24.114610 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.114635 s: DSS: SoC init ... Done !!!
[MCU2_0]     24.114657 s: DSS: Board init ... !!!
[MCU2_0]     24.114678 s: DSS: Turning on DP_PWR pin for eDP adapters ... !!!
[MCU2_0]     24.619275 s: DSS: ERROR: Turning on DP_PWR pin for eDP adapters failed !!!
[MCU2_0]     24.619313 s: DSS: Board init ... Done !!!
[MCU2_1]     24.101241 s: CIO: Init ... Done !!!
[MCU2_1]     24.101292 s: ### CPU Frequency = 1000000000 Hz
[MCU2_1]     24.101322 s: CPU is running FreeRTOS
[MCU2_1]     24.101343 s: APP: Init ... !!!
[MCU2_1]     24.101362 s: SCICLIENT: Init ... !!!
[MCU2_1]     24.101477 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[MCU2_1]     24.101509 s: SCICLIENT: DMSC FW revision 0x9  
[MCU2_1]     24.101535 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_1]     24.101566 s: SCICLIENT: Init ... Done !!!
[MCU2_1]     24.101588 s: UDMA: Init ... !!!
[MCU2_1]     24.102393 s: UDMA: Init ... Done !!!
[MCU2_1]     24.102438 s: MEM: Init ... !!!
[MCU2_1]     24.102475 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ da000000 of size 16777216 bytes !!!
[MCU2_1]     24.102532 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 60080000 of size 524288 bytes !!!
[MCU2_1]     24.102583 s: MEM: Init ... Done !!!
[MCU2_1]     24.102603 s: IPC: Init ... !!!
[MCU2_1]     24.102649 s: IPC: 5 CPUs participating in IPC !!!
[MCU2_1]     24.102682 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_1]     24.102709 s: IPC: HLOS is ready !!!
[MCU2_1]     24.111777 s: IPC: Init ... Done !!!
[MCU2_1]     24.111815 s: APP: Syncing with 4 CPUs ... !!!
[MCU2_1]     24.111850 s: APP: Syncing with 4 CPUs ... Done !!!
[MCU2_1]     24.111885 s: REMOTE_SERVICE: Init ... !!!
[MCU2_1]     24.113135 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_1]     24.113206 s: FVID2: Init ... !!!
[MCU2_1]     24.113256 s: FVID2: Init ... Done !!!
[MCU2_1]     24.113278 s: VHWA: DMPAC: Init ... !!!
[MCU2_1]     24.113299 s: SCICLIENT: Sciclient_pmSetModuleState module=58 state=2
[MCU2_1]     24.113442 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]     24.113471 s: SCICLIENT: Sciclient_pmSetModuleState module=62 state=2
[MCU2_1]     24.113543 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]     24.113569 s: VHWA: DOF Init ... !!!
[MCU2_1]     24.116903 s: VHWA: DOF Init ... Done !!!
[MCU2_1]     24.116936 s: VHWA: SDE Init ... !!!
[MCU2_1]     24.118187 s: VHWA: SDE Init ... Done !!!
[MCU2_1]     24.118216 s: VHWA: DMPAC: Init ... Done !!!
[MCU2_1]     24.118250 s:  VX_ZONE_INIT:Enabled
[MCU2_1]     24.118272 s:  VX_ZONE_ERROR:Enabled
[MCU2_1]     24.118293 s:  VX_ZONE_WARNING:Enabled
[MCU2_1]     24.119296 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-1 
[MCU2_1]     24.119475 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_SDE 
[MCU2_1]     24.119650 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_DOF 
[MCU2_1]     24.119692 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU2_1]     24.119720 s: APP: OpenVX Target kernel init ... !!!
[MCU2_1]     24.119965 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_1]     24.119995 s: UDMA Copy: Init ... !!!
[MCU2_1]     24.120838 s: UDMA Copy: Init ... Done !!!
[MCU2_1]     24.120883 s: APP: Init ... Done !!!
[MCU2_1]     24.120907 s: APP: Run ... !!!
[MCU2_1]     24.120928 s: IPC: Starting echo test ...
[MCU2_1]     24.123005 s: APP: Run ... Done !!!
[MCU2_1]     24.123526 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C7X_1[.] C7X_2[P] 
[MCU2_1]     24.123594 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C7X_1[P] C7X_2[P] 
[C7x_1 ]     23.486591 s: CIO: Init ... Done !!!
[C7x_1 ]     23.486607 s: ### CPU Frequency = 1000000000 Hz
[C7x_1 ]     23.486619 s: CPU is running FreeRTOS
[C7x_1 ]     23.486627 s: APP: Init ... !!!
[C7x_1 ]     23.486635 s: SCICLIENT: Init ... !!!
[C7x_1 ]     23.486730 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[C7x_1 ]     23.486744 s: SCICLIENT: DMSC FW revision 0x9  
[C7x_1 ]     23.486755 s: SCICLIENT: DMSC FW ABI revision 3.1
[C7x_1 ]     23.486766 s: SCICLIENT: Init ... Done !!!
[C7x_1 ]     23.486775 s: UDMA: Init ... !!!
[C7x_1 ]     23.487633 s: UDMA: Init ... Done !!!
[C7x_1 ]     23.487645 s: MEM: Init ... !!!
[C7x_1 ]     23.487657 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 117000000 of size 268435456 bytes !!!
[C7x_1 ]     23.487679 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 70020000 of size 3964928 bytes !!!
[C7x_1 ]     23.487697 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 64800000 of size 458752 bytes !!!
[C7x_1 ]     23.487715 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 64e00000 of size 16384 bytes !!!
[C7x_1 ]     23.487732 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ 100000000 of size 385875968 bytes !!!
[C7x_1 ]     23.487751 s: MEM: Init ... Done !!!
[C7x_1 ]     23.487760 s: IPC: Init ... !!!
[C7x_1 ]     23.487772 s: IPC: 5 CPUs participating in IPC !!!
[C7x_1 ]     23.487786 s: IPC: Waiting for HLOS to be ready ... !!!
[C7x_1 ]     23.496056 s: IPC: HLOS is ready !!!
[C7x_1 ]     23.497675 s: IPC: Init ... Done !!!
[C7x_1 ]     23.497688 s: APP: Syncing with 4 CPUs ... !!!
[C7x_1 ]     24.111852 s: APP: Syncing with 4 CPUs ... Done !!!
[C7x_1 ]     24.111870 s: REMOTE_SERVICE: Init ... !!!
[C7x_1 ]     24.112020 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_1 ]     24.112065 s:  VX_ZONE_INIT:Enabled
[C7x_1 ]     24.112078 s:  VX_ZONE_ERROR:Enabled
[C7x_1 ]     24.112108 s:  VX_ZONE_WARNING:Enabled
[C7x_1 ]     24.112308 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1 
[C7x_1 ]     24.112374 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_2 
[C7x_1 ]     24.112435 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_3 
[C7x_1 ]     24.112507 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_4 
[C7x_1 ]     24.112574 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_5 
[C7x_1 ]     24.112635 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_6 
[C7x_1 ]     24.112694 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_7 
[C7x_1 ]     24.112753 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_8 
[C7x_1 ]     24.112778 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C7x_1 ]     24.112792 s: APP: OpenVX Target kernel init ... !!!
[C7x_1 ]     24.112921 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_1 ]     24.112934 s: APP: Init ... Done !!!
[C7x_1 ]     24.112944 s: APP: Run ... !!!
[C7x_1 ]     24.112953 s: IPC: Starting echo test ...
[C7x_1 ]     24.113070 s: APP: Run ... Done !!!
[C7x_1 ]     24.113910 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C7X_1[s] C7X_2[P] 
[C7x_1 ]     24.123430 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C7X_1[s] C7X_2[P] 
[C7x_2 ]     23.485304 s: CIO: Init ... Done !!!
[C7x_2 ]     23.485320 s: ### CPU Frequency = 1000000000 Hz
[C7x_2 ]     23.485331 s: CPU is running FreeRTOS
[C7x_2 ]     23.485340 s: APP: Init ... !!!
[C7x_2 ]     23.485349 s: SCICLIENT: Init ... !!!
[C7x_2 ]     23.485452 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[C7x_2 ]     23.485468 s: SCICLIENT: DMSC FW revision 0x9  
[C7x_2 ]     23.485479 s: SCICLIENT: DMSC FW ABI revision 3.1
[C7x_2 ]     23.485490 s: SCICLIENT: Init ... Done !!!
[C7x_2 ]     23.485499 s: UDMA: Init ... !!!
[C7x_2 ]     23.486252 s: UDMA: Init ... Done !!!
[C7x_2 ]     23.486265 s: MEM: Init ... !!!
[C7x_2 ]     23.486276 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 127000000 of size 16777216 bytes !!!
[C7x_2 ]     23.486297 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 65800000 of size 458752 bytes !!!
[C7x_2 ]     23.486316 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 65e00000 of size 16384 bytes !!!
[C7x_2 ]     23.486334 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ 128000000 of size 67108864 bytes !!!
[C7x_2 ]     23.486353 s: MEM: Init ... Done !!!
[C7x_2 ]     23.486361 s: IPC: Init ... !!!
[C7x_2 ]     23.486375 s: IPC: 5 CPUs participating in IPC !!!
[C7x_2 ]     23.486388 s: IPC: Waiting for HLOS to be ready ... !!!
[C7x_2 ]     23.486401 s: IPC: HLOS is ready !!!
[C7x_2 ]     23.488188 s: IPC: Init ... Done !!!
[C7x_2 ]     23.488201 s: APP: Syncing with 4 CPUs ... !!!
[C7x_2 ]     24.111853 s: APP: Syncing with 4 CPUs ... Done !!!
[C7x_2 ]     24.111871 s: REMOTE_SERVICE: Init ... !!!
[C7x_2 ]     24.112016 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_2 ]     24.112040 s:  VX_ZONE_INIT:Enabled
[C7x_2 ]     24.112077 s:  VX_ZONE_ERROR:Enabled
[C7x_2 ]     24.112090 s:  VX_ZONE_WARNING:Enabled
[C7x_2 ]     24.112562 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP-1 
[C7x_2 ]     24.112585 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C7x_2 ]     24.112599 s: APP: OpenVX Target kernel init ... !!!
[C7x_2 ]     24.112852 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_2 ]     24.112868 s: UDMA Copy: Init ... !!!
[C7x_2 ]     24.113512 s: UDMA Copy: Init ... Done !!!
[C7x_2 ]     24.113528 s: APP: Init ... Done !!!
[C7x_2 ]     24.113539 s: APP: Run ... !!!
[C7x_2 ]     24.113547 s: IPC: Starting echo test ...
[C7x_2 ]     24.113662 s: APP: Run ... Done !!!
[C7x_2 ]     24.113918 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C7X_1[P] C7X_2[s] 
[C7x_2 ]     24.123507 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C7X_1[P] C7X_2[s] 

#ifdef BUILD_MCU_BOARD_DEPENDENCIES
    #define ENABLE_PRINTF_REDIRECT

    #define ENABLE_CSI2RX
    #define ENABLE_CSI2TX

    /* IMPORANT NOTE:
     * - Only one of ENABLE_DSS_SINGLE or ENABLE_DSS_DUAL should be defined
     * - When ENABLE_DSS_SINGLE is defined, only one of ENABLE_DSS_HDMI or ENABLE_DSS_EDP should be defined
     * - When ENABLE_DSS_DUAL is defined, ENABLE_DSS_HDMI and ENABLE_DSS_EDP are not used, both EDP and HDMI are enabled unconditionally
     */
    #define ENABLE_DSS_SINGLE
    #undef  ENABLE_DSS_DUAL

    /* define below to enable eDP display,
       make sure to undef ENABLE_DSS_HDMI & ENABLE_DSS_DSI as well */
    #define ENABLE_DSS_EDP
    /* define below to enable HDMI display,
       make sure to undef ENABLE_DSS_EDP & ENABLE_DSS_DSI as well */
    #undef ENABLE_DSS_HDMI
    /* define below to enable DSI display, make sure to undef ENABLE_DSS_HDMI
       & ENABLE_DSS_EDP as well */
    #undef ENABLE_DSS_DSI

    #define ENABLE_I2C
    #define ENABLE_BOARD

#else

It gets stack in the same place

Now it is runnning good:

root@j721s2-evm:/opt/edgeai-gst-apps# /opt/vision_apps-v4/vx_app_arm_remote_log.out 
[MCU2_0]     24.169395 s: CIO: Init ... Done !!!
[MCU2_0]     24.169447 s: Before  ENABLE_BOARD
[MCU2_0]     24.169468 s: Start  ENABLE_BOARD
[MCU2_0]     24.169488 s: IN  ENABLE_DSS_SINGLE
[MCU2_0]     24.169516 s: End  ENABLE_BOARD
[MCU2_0]     24.169535 s: After  ENABLE_BOARD
[MCU2_0]     24.169554 s: ### CPU Frequency = 1000000000 Hz
[MCU2_0]     24.169583 s: CPU is running FreeRTOS
[MCU2_0]     24.169603 s: APP: Init ... !!!
[MCU2_0]     24.169622 s: SCICLIENT: Init ... !!!
[MCU2_0]     24.169737 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[MCU2_0]     24.169770 s: SCICLIENT: DMSC FW revision 0x9  
[MCU2_0]     24.169796 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_0]     24.169826 s: SCICLIENT: Init ... Done !!!
[MCU2_0]     24.169849 s: UDMA: Init ... !!!
[MCU2_0]     24.170612 s: UDMA: Init ... Done !!!
[MCU2_0]     24.170648 s: UDMA: Init ... !!!
[MCU2_0]     24.171093 s: UDMA: Init for CSITX/CSIRX ... Done !!!
[MCU2_0]     24.171144 s: MEM: Init ... !!!
[MCU2_0]     24.171182 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ d9000000 of size 16777216 bytes !!!
[MCU2_0]     24.171243 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 60000000 of size 524288 bytes !!!
[MCU2_0]     24.171297 s: MEM: Init ... Done !!!
[MCU2_0]     24.171320 s: IPC: Init ... !!!
[MCU2_0]     24.171365 s: IPC: 5 CPUs participating in IPC !!!
[MCU2_0]     24.171402 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_0]     24.171432 s: IPC: HLOS is ready !!!
[MCU2_0]     24.180662 s: IPC: Init ... Done !!!
[MCU2_0]     24.180702 s: APP: Syncing with 4 CPUs ... !!!
[MCU2_0]     24.205440 s: APP: Syncing with 4 CPUs ... Done !!!
[MCU2_0]     24.205474 s: REMOTE_SERVICE: Init ... !!!
[MCU2_0]     24.206910 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_0]     24.206946 s: FVID2: Init ... !!!
[MCU2_0]     24.207000 s: FVID2: Init ... Done !!!
[MCU2_0]     24.207031 s: SCICLIENT: Sciclient_pmSetModuleState module=219 state=2
[MCU2_0]     24.207121 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.207163 s: Before  ENABLE_DSS_SINGLE
[MCU2_0]     24.207187 s: Start  ENABLE_DSS_SINGLE
[MCU2_0]     24.207250 s: Before  APP_DSS_DEFAULT_DISPLAY_TYPE_EDP
[MCU2_0]     24.207279 s: DSS: Init ... !!!
[MCU2_0]     24.207302 s: DSS: Display type is eDP !!!
[MCU2_0]     24.207326 s: DSS: M2M Path is enabled !!!
[MCU2_0]     24.207350 s: DSS: SoC init ... !!!
[MCU2_0]     24.207371 s: SCICLIENT: Sciclient_pmSetModuleState module=158 state=0
[MCU2_0]     24.207432 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.207460 s: SCICLIENT: Sciclient_pmSetModuleState module=365 state=2
[MCU2_0]     24.207656 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.207684 s: SCICLIENT: Sciclient_pmSetModuleState module=156 state=2
[MCU2_0]     24.207809 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.207836 s: SCICLIENT: Sciclient_pmSetModuleState module=365 state=2
[MCU2_0]     24.207913 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.207939 s: SCICLIENT: Sciclient_pmSetModuleState module=156 state=2
[MCU2_0]     24.208024 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.208050 s: SCICLIENT: Sciclient_pmSetModuleState module=158 state=0
[MCU2_0]     24.208123 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.208150 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=158 clk=3 freq=148500000
[MCU2_0]     24.208256 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success
[MCU2_0]     24.208284 s: SCICLIENT: Sciclient_pmModuleClkRequest module=158 clk=3 state=2 flag=2
[MCU2_0]     24.208370 s: SCICLIENT: Sciclient_pmModuleClkRequest success
[MCU2_0]     24.208398 s: SCICLIENT: Sciclient_pmSetModuleState module=158 state=2
[MCU2_0]     24.208508 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.208534 s: DSS: SoC init ... Done !!!
[MCU2_0]     24.208557 s: DSS: Board init ... !!!
[MCU2_0]     24.208579 s: DSS: Turning on DP_PWR pin for eDP adapters ... !!!
[MCU2_0]     24.713023 s: DSS: ERROR: Turning on DP_PWR pin for eDP adapters failed !!!
[MCU2_0]     24.713060 s: DSS: Board init ... Done !!!
[MCU2_0]     24.736018 s: DSS: Display is not connected
[MCU2_0]     24.736064 s: DSS: Init ... Done !!!
[MCU2_0]     24.736087 s: End  ENABLE_DSS_SINGLE
[MCU2_0]     24.736109 s: After  ENABLE_DSS_SINGLE
[MCU2_0]     24.736132 s: VHWA: VPAC Init ... !!!
[MCU2_0]     24.736154 s: SCICLIENT: Sciclient_pmSetModuleState module=361 state=2
[MCU2_0]     24.736276 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.736305 s: VHWA: LDC Init ... !!!
[MCU2_0]     24.738009 s: VHWA: LDC Init ... Done !!!
[MCU2_0]     24.738051 s: VHWA: MSC Init ... !!!
[MCU2_0]     24.746054 s: VHWA: MSC Init ... Done !!!
[MCU2_0]     24.746091 s: VHWA: NF Init ... !!!
[MCU2_0]     24.746957 s: VHWA: NF Init ... Done !!!
[MCU2_0]     24.746987 s: VHWA: VISS Init ... !!!
[MCU2_0]     24.753713 s: VHWA: VISS Init ... Done !!!
[MCU2_0]     24.753754 s: VHWA: VPAC Init ... Done !!!
[MCU2_0]     24.753789 s:  VX_ZONE_INIT:Enabled
[MCU2_0]     24.753812 s:  VX_ZONE_ERROR:Enabled
[MCU2_0]     24.753835 s:  VX_ZONE_WARNING:Enabled
[MCU2_0]     24.754846 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-0 
[MCU2_0]     24.755046 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_NF 
[MCU2_0]     24.755231 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_LDC1 
[MCU2_0]     24.755421 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC1 
[MCU2_0]     24.755606 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC2 
[MCU2_0]     24.755838 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_VISS1 
[MCU2_0]     24.756049 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE1 
[MCU2_0]     24.756249 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE2 
[MCU2_0]     24.756440 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY1 
[MCU2_0]     24.756627 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY2 
[MCU2_0]     24.756818 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CSITX 
[MCU2_0]     24.757037 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE3 
[MCU2_0]     24.757237 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE4 
[MCU2_0]     24.757431 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE5 
[MCU2_0]     24.757633 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE6 
[MCU2_0]     24.757832 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE7 
[MCU2_0]     24.758038 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE8 
[MCU2_0]     24.758237 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M1 
[MCU2_0]     24.758432 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M2 
[MCU2_0]     24.758617 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M3 
[MCU2_0]     24.758796 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M4 
[MCU2_0]     24.758983 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CSITX2 
[MCU2_0]     24.759032 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU2_0]     24.759063 s: APP: OpenVX Target kernel init ... !!!
[MCU2_0]     24.789910 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_0]     24.789944 s: CSI2RX: Init ... !!!
[MCU2_0]     24.789967 s: SCICLIENT: Sciclient_pmSetModuleState module=136 state=2
[MCU2_0]     24.790044 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.790073 s: SCICLIENT: Sciclient_pmSetModuleState module=38 state=2
[MCU2_0]     24.790152 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.790178 s: SCICLIENT: Sciclient_pmSetModuleState module=39 state=2
[MCU2_0]     24.790249 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.790275 s: SCICLIENT: Sciclient_pmSetModuleState module=152 state=2
[MCU2_0]     24.790336 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.790363 s: SCICLIENT: Sciclient_pmSetModuleState module=153 state=2
[MCU2_0]     24.790421 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.790568 s: CSI2RX: Init ... Done !!!
[MCU2_0]     24.790593 s: CSI2TX: Init ... !!!
[MCU2_0]     24.790614 s: SCICLIENT: Sciclient_pmSetModuleState module=136 state=2
[MCU2_0]     24.790674 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.790701 s: SCICLIENT: Sciclient_pmSetModuleState module=40 state=2
[MCU2_0]     24.790770 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.790796 s: SCICLIENT: Sciclient_pmSetModuleState module=41 state=2
[MCU2_0]     24.790869 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.790896 s: SCICLIENT: Sciclient_pmSetModuleState module=363 state=2
[MCU2_0]     24.790954 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     24.791016 s: CSI2TX: Init ... Done !!!
[MCU2_0]     24.791048 s: ISS: Init ... !!!
[MCU2_0]     24.791078 s: IssSensor_Init ... Done !!!
[MCU2_0]     24.791136 s: IttRemoteServer_Init ... Done !!!
[MCU2_0]     24.791163 s: VISS REMOTE SERVICE: Init ... !!!
[MCU2_0]     24.791216 s: VISS REMOTE SERVICE: Init ... Done !!!
[MCU2_0]     24.791243 s: UDMA Copy: Init ... !!!
[MCU2_0]     24.792086 s: UDMA Copy: Init ... Done !!!
[MCU2_0]     24.792151 s: APP: Init ... Done !!!
[MCU2_0]     24.792177 s: APP: Run ... !!!
[MCU2_0]     24.792198 s: IPC: Starting echo test ...
[MCU2_0]     24.794601 s: APP: Run ... Done !!!
[MCU2_0]     24.794630 s: I am alive from MCU2_0 v1 
[MCU2_0]     24.795307 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C7X_1[P] C7X_2[.] 
[MCU2_0]     24.795378 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C7X_1[P] C7X_2[P] 
[MCU2_0]     24.795440 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C7X_1[P] C7X_2[P] 
[MCU2_0]     34.794023 s: I am alive from MCU2_0 v1 
[MCU2_1]     24.194842 s: CIO: Init ... Done !!!
[MCU2_1]     24.194890 s: ### CPU Frequency = 1000000000 Hz
[MCU2_1]     24.194922 s: CPU is running FreeRTOS
[MCU2_1]     24.194942 s: APP: Init ... !!!
[MCU2_1]     24.194961 s: SCICLIENT: Init ... !!!
[MCU2_1]     24.195075 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[MCU2_1]     24.195108 s: SCICLIENT: DMSC FW revision 0x9  
[MCU2_1]     24.195134 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_1]     24.195164 s: SCICLIENT: Init ... Done !!!
[MCU2_1]     24.195187 s: UDMA: Init ... !!!
[MCU2_1]     24.195993 s: UDMA: Init ... Done !!!
[MCU2_1]     24.196039 s: MEM: Init ... !!!
[MCU2_1]     24.196072 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ da000000 of size 16777216 bytes !!!
[MCU2_1]     24.196130 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 60080000 of size 524288 bytes !!!
[MCU2_1]     24.196180 s: MEM: Init ... Done !!!
[MCU2_1]     24.196201 s: IPC: Init ... !!!
[MCU2_1]     24.196246 s: IPC: 5 CPUs participating in IPC !!!
[MCU2_1]     24.196282 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_1]     24.196309 s: IPC: HLOS is ready !!!
[MCU2_1]     24.205367 s: IPC: Init ... Done !!!
[MCU2_1]     24.205406 s: APP: Syncing with 4 CPUs ... !!!
[MCU2_1]     24.205439 s: APP: Syncing with 4 CPUs ... Done !!!
[MCU2_1]     24.205469 s: REMOTE_SERVICE: Init ... !!!
[MCU2_1]     24.206758 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_1]     24.206796 s: FVID2: Init ... !!!
[MCU2_1]     24.206847 s: FVID2: Init ... Done !!!
[MCU2_1]     24.206869 s: VHWA: DMPAC: Init ... !!!
[MCU2_1]     24.206891 s: SCICLIENT: Sciclient_pmSetModuleState module=58 state=2
[MCU2_1]     24.207063 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]     24.207093 s: SCICLIENT: Sciclient_pmSetModuleState module=62 state=2
[MCU2_1]     24.207158 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]     24.207183 s: VHWA: DOF Init ... !!!
[MCU2_1]     24.210632 s: VHWA: DOF Init ... Done !!!
[MCU2_1]     24.210667 s: VHWA: SDE Init ... !!!
[MCU2_1]     24.211981 s: VHWA: SDE Init ... Done !!!
[MCU2_1]     24.212012 s: VHWA: DMPAC: Init ... Done !!!
[MCU2_1]     24.212046 s:  VX_ZONE_INIT:Enabled
[MCU2_1]     24.212069 s:  VX_ZONE_ERROR:Enabled
[MCU2_1]     24.212091 s:  VX_ZONE_WARNING:Enabled
[MCU2_1]     24.213083 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-1 
[MCU2_1]     24.213258 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_SDE 
[MCU2_1]     24.213417 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_DOF 
[MCU2_1]     24.213458 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU2_1]     24.213493 s: APP: OpenVX Target kernel init ... !!!
[MCU2_1]     24.213708 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_1]     24.213737 s: UDMA Copy: Init ... !!!
[MCU2_1]     24.214589 s: UDMA Copy: Init ... Done !!!
[MCU2_1]     24.214626 s: APP: Init ... Done !!!
[MCU2_1]     24.214649 s: APP: Run ... !!!
[MCU2_1]     24.214669 s: IPC: Starting echo test ...
[MCU2_1]     24.216734 s: APP: Run ... Done !!!
[MCU2_1]     24.217231 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C7X_1[.] C7X_2[P] 
[MCU2_1]     24.217297 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C7X_1[P] C7X_2[P] 
[MCU2_1]     24.795232 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[s] C7X_1[P] C7X_2[P] 
[C7x_1 ]     23.325057 s: CIO: Init ... Done !!!
[C7x_1 ]     23.325072 s: ### CPU Frequency = 1000000000 Hz
[C7x_1 ]     23.325084 s: CPU is running FreeRTOS
[C7x_1 ]     23.325093 s: APP: Init ... !!!
[C7x_1 ]     23.325100 s: SCICLIENT: Init ... !!!
[C7x_1 ]     23.325198 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[C7x_1 ]     23.325213 s: SCICLIENT: DMSC FW revision 0x9  
[C7x_1 ]     23.325224 s: SCICLIENT: DMSC FW ABI revision 3.1
[C7x_1 ]     23.325235 s: SCICLIENT: Init ... Done !!!
[C7x_1 ]     23.325246 s: UDMA: Init ... !!!
[C7x_1 ]     23.326130 s: UDMA: Init ... Done !!!
[C7x_1 ]     23.326142 s: MEM: Init ... !!!
[C7x_1 ]     23.326153 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 117000000 of size 268435456 bytes !!!
[C7x_1 ]     23.326174 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 70020000 of size 3964928 bytes !!!
[C7x_1 ]     23.326193 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 64800000 of size 458752 bytes !!!
[C7x_1 ]     23.326210 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 64e00000 of size 16384 bytes !!!
[C7x_1 ]     23.326227 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ 100000000 of size 385875968 bytes !!!
[C7x_1 ]     23.326246 s: MEM: Init ... Done !!!
[C7x_1 ]     23.326254 s: IPC: Init ... !!!
[C7x_1 ]     23.326268 s: IPC: 5 CPUs participating in IPC !!!
[C7x_1 ]     23.326283 s: IPC: Waiting for HLOS to be ready ... !!!
[C7x_1 ]     23.326295 s: IPC: HLOS is ready !!!
[C7x_1 ]     23.327939 s: IPC: Init ... Done !!!
[C7x_1 ]     23.327959 s: APP: Syncing with 4 CPUs ... !!!
[C7x_1 ]     24.205440 s: APP: Syncing with 4 CPUs ... Done !!!
[C7x_1 ]     24.205457 s: REMOTE_SERVICE: Init ... !!!
[C7x_1 ]     24.205601 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_1 ]     24.205624 s:  VX_ZONE_INIT:Enabled
[C7x_1 ]     24.205660 s:  VX_ZONE_ERROR:Enabled
[C7x_1 ]     24.205672 s:  VX_ZONE_WARNING:Enabled
[C7x_1 ]     24.205883 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1 
[C7x_1 ]     24.205954 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_2 
[C7x_1 ]     24.206023 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_3 
[C7x_1 ]     24.206085 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_4 
[C7x_1 ]     24.206146 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_5 
[C7x_1 ]     24.206208 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_6 
[C7x_1 ]     24.206273 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_7 
[C7x_1 ]     24.206335 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_8 
[C7x_1 ]     24.206358 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C7x_1 ]     24.206372 s: APP: OpenVX Target kernel init ... !!!
[C7x_1 ]     24.206503 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_1 ]     24.206516 s: APP: Init ... Done !!!
[C7x_1 ]     24.206525 s: APP: Run ... !!!
[C7x_1 ]     24.206533 s: IPC: Starting echo test ...
[C7x_1 ]     24.206651 s: APP: Run ... Done !!!
[C7x_1 ]     24.207414 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C7X_1[s] C7X_2[P] 
[C7x_1 ]     24.217142 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C7X_1[s] C7X_2[P] 
[C7x_1 ]     24.795179 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C7X_1[s] C7X_2[P] 
[C7x_2 ]     23.323727 s: CIO: Init ... Done !!!
[C7x_2 ]     23.323745 s: ### CPU Frequency = 1000000000 Hz
[C7x_2 ]     23.323759 s: CPU is running FreeRTOS
[C7x_2 ]     23.323768 s: APP: Init ... !!!
[C7x_2 ]     23.323776 s: SCICLIENT: Init ... !!!
[C7x_2 ]     23.323889 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[C7x_2 ]     23.323904 s: SCICLIENT: DMSC FW revision 0x9  
[C7x_2 ]     23.323915 s: SCICLIENT: DMSC FW ABI revision 3.1
[C7x_2 ]     23.323927 s: SCICLIENT: Init ... Done !!!
[C7x_2 ]     23.323937 s: UDMA: Init ... !!!
[C7x_2 ]     23.324701 s: UDMA: Init ... Done !!!
[C7x_2 ]     23.324715 s: MEM: Init ... !!!
[C7x_2 ]     23.324726 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 127000000 of size 16777216 bytes !!!
[C7x_2 ]     23.324748 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 65800000 of size 458752 bytes !!!
[C7x_2 ]     23.324767 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 65e00000 of size 16384 bytes !!!
[C7x_2 ]     23.324786 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ 128000000 of size 67108864 bytes !!!
[C7x_2 ]     23.324805 s: MEM: Init ... Done !!!
[C7x_2 ]     23.324815 s: IPC: Init ... !!!
[C7x_2 ]     23.324830 s: IPC: 5 CPUs participating in IPC !!!
[C7x_2 ]     23.324847 s: IPC: Waiting for HLOS to be ready ... !!!
[C7x_2 ]     23.324860 s: IPC: HLOS is ready !!!
[C7x_2 ]     23.326676 s: IPC: Init ... Done !!!
[C7x_2 ]     23.326690 s: APP: Syncing with 4 CPUs ... !!!
[C7x_2 ]     24.205441 s: APP: Syncing with 4 CPUs ... Done !!!
[C7x_2 ]     24.205458 s: REMOTE_SERVICE: Init ... !!!
[C7x_2 ]     24.205604 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_2 ]     24.205627 s:  VX_ZONE_INIT:Enabled
[C7x_2 ]     24.205663 s:  VX_ZONE_ERROR:Enabled
[C7x_2 ]     24.205676 s:  VX_ZONE_WARNING:Enabled
[C7x_2 ]     24.206143 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP-1 
[C7x_2 ]     24.206167 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C7x_2 ]     24.206180 s: APP: OpenVX Target kernel init ... !!!
[C7x_2 ]     24.206437 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_2 ]     24.206453 s: UDMA Copy: Init ... !!!
[C7x_2 ]     24.207009 s: UDMA Copy: Init ... Done !!!
[C7x_2 ]     24.207025 s: APP: Init ... Done !!!
[C7x_2 ]     24.207035 s: APP: Run ... !!!
[C7x_2 ]     24.207044 s: IPC: Starting echo test ...
[C7x_2 ]     24.207159 s: APP: Run ... Done !!!
[C7x_2 ]     24.207421 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C7X_1[P] C7X_2[s] 
[C7x_2 ]     24.217209 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C7X_1[P] C7X_2[s] 
[C7x_2 ]     24.795201 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C7X_1[P] C7X_2[s] 
[MCU2_0]     44.794021 s: I am alive from MCU2_0 v1 
[MCU2_0]     54.794022 s: I am alive from MCU2_0 v1 
[MCU2_0]     64.794021 s: I am alive from MCU2_0 v1 
^C
root@j721s2-evm:/opt/edgeai-gst-apps# ^C
root@j721s2-evm:/opt/edgeai-gst-apps# k3conf dump devices | grep DSS
|   154     | J721S2_DEV_DSS_DSI0                                 | DEVICE_STATE_ON  |
|   155     | J721S2_DEV_DSS_DSI1                                 | DEVICE_STATE_ON  |
|   156     | J721S2_DEV_DSS_EDP0                                 | DEVICE_STATE_ON  |
|   158     | J721S2_DEV_DSS0                                     | DEVICE_STATE_ON  |
|   253     | J721S2_DEV_NAVSS0_MODSS                             | DEVICE_STATE_ON  |
|   254     | J721S2_DEV_NAVSS0_MODSS_INTA_0                      | DEVICE_STATE_ON  |
|   255     | J721S2_DEV_NAVSS0_MODSS_INTA_1                      | DEVICE_STATE_ON  |
|   270     | J721S2_DEV_MCU_NAVSS0_MODSS                         | DEVICE_STATE_ON  |

root@j721s2-evm:/opt/edgeai-gst-apps# cat /run/media/mmcblk0p1/uEnv.txt 
root_partition=/dev/mmcblk0p2
overlays=k3-j721s2-vision-apps.dtbo

did not load the right FW for eDP in previous message

Lets stick to MCU2_0

Ok. thank you.

Do you have any updates on the DPI on MCU2_0?

Hi,

DPI (HDMI) cannot be tested on the EVM.

Regards,

Nikhil

And what regarding j721s2?

I have a J721s2 SOC and custom board with DPI lines connected to analog converter.
I managed to make the DSS initialize on SK-TDA4VM. The problem was the the BUILD_EDGAI flag was "no" and should be "yes".

But this still did not help with the j721s2 board that I have (I tested both GP and HS-FS devices).

The DSS init still gets stuck on CSL_REG32_RD(&commRegs->VP_IRQSTATUS_1);.

What do I need to initialize so that the R5 MCU2_0 core would be able to read the VP_IRQSTATUS_1 register?

What else do you need to know to answer this question? 

Hi,

Yuriy Pasichnyk said:

I managed to make the DSS initialize on SK-TDA4VM.

On the SK board, we have the HDMI (DPI) output enabled in hardware, Hence you are able to HDMI there. 

Whereas, this is not the case with EVM.

Can you connect the debugger to check the status of the core? If it hanged or a crash?

Since you are trying to access a register here, it should be powered on correctly. Have you ensured that the IP is on?

Regards,

Nikhil

At the moment, I do not have a debugger so I can not check. But with prints, I see that it hangs on the first DSS IRQ STATUS register to read.

I have an update.
As I told you earlier the example did work on the SK-TDAV4.
And now we get to the problem with j721s2.
With j721s2 hangs on the first DSS IRQ STATUS. My assumption was that the DSS clock was not initialized.
I was right if you look at the K3 conf read below:

root@tda4vm-sk:/opt/edgeai-gst-apps# k3conf dump devices | grep DSS
|   150     | J721E_DEV_DSS_DSI0                          | DEVICE_STATE_OFF |
|   151     | J721E_DEV_DSS_EDP0                          | DEVICE_STATE_OFF |
|   152     | J721E_DEV_DSS0                              | DEVICE_STATE_OFF |
|   207     | J721E_DEV_NAVSS0_MODSS_INTAGGR_0            | DEVICE_STATE_ON  |
|   208     | J721E_DEV_NAVSS0_MODSS_INTAGGR_1            | DEVICE_STATE_ON  |
|   299     | J721E_DEV_NAVSS0_MODSS                      | DEVICE_STATE_ON  |
|   302     | J721E_DEV_MCU_NAVSS0_MODSS                  | DEVICE_STATE_ON  |

So I tried to enable it manually with k3conf and actually it resolved the problem. And DSS was finally initialized on the R5 core.
See the log below after I manually initialized DSS clock 158.

     k3conf enable device 158 # J721S2_DEV_DSS0
     root@j721s2-evm:/opt/vision_apps-v4# k3conf dump devices | grep DSS
|   154     | J721S2_DEV_DSS_DSI0                                 | DEVICE_STATE_ON  |
|   155     | J721S2_DEV_DSS_DSI1                                 | DEVICE_STATE_ON  |
|   156     | J721S2_DEV_DSS_EDP0                                 | DEVICE_STATE_OFF |
|   158     | J721S2_DEV_DSS0                                     | DEVICE_STATE_ON  |
|   253     | J721S2_DEV_NAVSS0_MODSS                             | DEVICE_STATE_ON  |
|   254     | J721S2_DEV_NAVSS0_MODSS_INTA_0                      | DEVICE_STATE_ON  |
|   255     | J721S2_DEV_NAVSS0_MODSS_INTA_1                      | DEVICE_STATE_ON  |
|   270     | J721S2_DEV_MCU_NAVSS0_MODSS                         | DEVICE_STATE_ON  |

root@j721s2-evm:/opt/vision_apps-v4# /opt/vision_apps-v4/vx_app_arm_remote_log.out 
[MCU2_0]    307.583509 s: CIO: Init ... Done !!!
[MCU2_0]    307.583559 s: Before  ENABLE_BOARD
[MCU2_0]    307.583580 s: Start  ENABLE_BOARD
[MCU2_0]    307.583599 s: IN  ENABLE_DSS_SINGLE
[MCU2_0]    307.583619 s: IN  ENABLE_DSS_HDMI
[MCU2_0]    307.583647 s: End  ENABLE_BOARD
[MCU2_0]    307.583666 s: After  ENABLE_BOARD
[MCU2_0]    307.583686 s: ### CPU Frequency = 1000000000 Hz
[MCU2_0]    307.583714 s: CPU is running FreeRTOS
[MCU2_0]    307.583735 s: APP: Init ... !!!
[MCU2_0]    307.583754 s: SCICLIENT: Init ... !!!
[MCU2_0]    307.583868 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[MCU2_0]    307.583901 s: SCICLIENT: DMSC FW revision 0x9  
[MCU2_0]    307.583927 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_0]    307.583957 s: SCICLIENT: Init ... Done !!!
[MCU2_0]    307.583980 s: UDMA: Init ... !!!
[MCU2_0]    307.584724 s: UDMA: Init ... Done !!!
[MCU2_0]    307.584758 s: UDMA: Init ... !!!
[MCU2_0]    307.585178 s: UDMA: Init for CSITX/CSIRX ... Done !!!
[MCU2_0]    307.585224 s: MEM: Init ... !!!
[MCU2_0]    307.585258 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ d9000000 of size 16777216 bytes !!!
[MCU2_0]    307.585318 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 60000000 of size 524288 bytes !!!
[MCU2_0]    307.585370 s: MEM: Init ... Done !!!
[MCU2_0]    307.585391 s: IPC: Init ... !!!
[MCU2_0]    307.585434 s: IPC: 5 CPUs participating in IPC !!!
[MCU2_0]    307.585468 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_0]    307.585496 s: IPC: HLOS is ready !!!
[MCU2_0]    307.594612 s: IPC: Init ... Done !!!
[MCU2_0]    307.594651 s: APP: Syncing with 4 CPUs ... !!!
[MCU2_0]    322.874339 s: APP: Syncing with 4 CPUs ... Done !!!
[MCU2_0]    322.874373 s: REMOTE_SERVICE: Init ... !!!
[MCU2_0]    322.875636 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_0]    322.875673 s: FVID2: Init ... !!!
[MCU2_0]    322.875725 s: FVID2: Init ... Done !!!
[MCU2_0]    322.875748 s: SCICLIENT: Sciclient_pmSetModuleState module=219 state=2
[MCU2_0]    322.875866 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]    322.875905 s: Before  ENABLE_DSS_SINGLE
[MCU2_0]    322.875928 s: Start  ENABLE_DSS_SINGLE
[MCU2_0]    322.875950 s: Before  APP_DSS_DEFAULT_DISPLAY_TYPE_DPI_HDMI
[MCU2_0]    322.875977 s: DSS: Init ... !!!
[MCU2_0]    322.875997 s: DSS: Display type is HDMI !!!
[MCU2_0]    322.876020 s: DSS: M2M Path is enabled !!!
[MCU2_0]    322.876043 s: DSS: SoC init ... !!!
[MCU2_0]    322.876064 s: SCICLIENT: Sciclient_pmSetModuleState module=158 state=0
[MCU2_0]    322.876126 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]    322.876200 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=158 clk=5 parent=7
[MCU2_0]    322.876280 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU2_0]    322.876308 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=158 clk=5 freq=148500000
[MCU2_0]    322.877345 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success
[MCU2_0]    322.877372 s: SCICLIENT: Sciclient_pmModuleClkRequest module=158 clk=5 state=2 flag=0
[MCU2_0]    322.877478 s: SCICLIENT: Sciclient_pmModuleClkRequest success
[MCU2_0]    322.877505 s: DSS: SoC init ... Done !!!
[MCU2_0]    322.877527 s: DSS: Board init ... !!!
[MCU2_0]    322.877549 s: DSS: Board init ... Done !!!
[MCU2_0]    322.879838 s: DSS: Display is not connected
[MCU2_0]    322.879873 s: DSS: Init ... Done !!!
[MCU2_0]    322.879897 s: End  ENABLE_DSS_SINGLE
[MCU2_0]    322.879917 s: After  ENABLE_DSS_SINGLE
[MCU2_0]    322.879939 s: VHWA: VPAC Init ... !!!
[MCU2_0]    322.879960 s: SCICLIENT: Sciclient_pmSetModuleState module=361 state=2
[MCU2_0]    322.880159 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]    322.880187 s: VHWA: LDC Init ... !!!
[MCU2_0]    322.882608 s: VHWA: LDC Init ... Done !!!
[MCU2_0]    322.882643 s: VHWA: MSC Init ... !!!
[MCU2_0]    322.890211 s: VHWA: MSC Init ... Done !!!
[MCU2_0]    322.890246 s: VHWA: NF Init ... !!!
[MCU2_0]    322.891095 s: VHWA: NF Init ... Done !!!
[MCU2_0]    322.891127 s: VHWA: VISS Init ... !!!
[MCU2_0]    322.897527 s: VHWA: VISS Init ... Done !!!
[MCU2_0]    322.897568 s: VHWA: VPAC Init ... Done !!!
[MCU2_0]    322.897604 s:  VX_ZONE_INIT:Enabled
[MCU2_0]    322.897627 s:  VX_ZONE_ERROR:Enabled
[MCU2_0]    322.897649 s:  VX_ZONE_WARNING:Enabled
[MCU2_0]    322.898649 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-0 
[MCU2_0]    322.898827 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_NF 
[MCU2_0]    322.898998 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_LDC1 
[MCU2_0]    322.899176 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC1 
[MCU2_0]    322.899342 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC2 
[MCU2_0]    322.899559 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_VISS1 
[MCU2_0]    322.899749 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE1 
[MCU2_0]    322.899924 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE2 
[MCU2_0]    322.900092 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY1 
[MCU2_0]    322.900277 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY2 
[MCU2_0]    322.900440 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CSITX 
[MCU2_0]    322.900619 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE3 
[MCU2_0]    322.900788 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE4 
[MCU2_0]    322.900964 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE5 
[MCU2_0]    322.901154 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE6 
[MCU2_0]    322.901331 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE7 
[MCU2_0]    322.901503 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE8 
[MCU2_0]    322.901673 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M1 
[MCU2_0]    322.901850 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M2 
[MCU2_0]    322.902021 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M3 
[MCU2_0]    322.902202 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M4 
[MCU2_0]    322.902376 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CSITX2 
[MCU2_0]    322.902417 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU2_0]    322.902445 s: APP: OpenVX Target kernel init ... !!!
[MCU2_0]    322.928991 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_0]    322.929025 s: CSI2RX: Init ... !!!
[MCU2_0]    322.929045 s: SCICLIENT: Sciclient_pmSetModuleState module=136 state=2
[MCU2_0]    322.929120 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]    322.929153 s: SCICLIENT: Sciclient_pmSetModuleState module=38 state=2
[MCU2_0]    322.929230 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]    322.929256 s: SCICLIENT: Sciclient_pmSetModuleState module=39 state=2
[MCU2_0]    322.929321 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]    322.929348 s: SCICLIENT: Sciclient_pmSetModuleState module=152 state=2
[MCU2_0]    322.929405 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]    322.929431 s: SCICLIENT: Sciclient_pmSetModuleState module=153 state=2
[MCU2_0]    322.929486 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]    322.929639 s: CSI2RX: Init ... Done !!!
[MCU2_0]    322.929663 s: CSI2TX: Init ... !!!
[MCU2_0]    322.929683 s: SCICLIENT: Sciclient_pmSetModuleState module=136 state=2
[MCU2_0]    322.929744 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]    322.929770 s: SCICLIENT: Sciclient_pmSetModuleState module=40 state=2
[MCU2_0]    322.929836 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]    322.929861 s: SCICLIENT: Sciclient_pmSetModuleState module=41 state=2
[MCU2_0]    322.929930 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]    322.929955 s: SCICLIENT: Sciclient_pmSetModuleState module=363 state=2
[MCU2_0]    322.930011 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]    322.930072 s: CSI2TX: Init ... Done !!!
[MCU2_0]    322.930095 s: ISS: Init ... !!!
[MCU2_0]    322.930124 s: IssSensor_Init ... Done !!!
[MCU2_0]    322.930188 s: IttRemoteServer_Init ... Done !!!
[MCU2_0]    322.930217 s: VISS REMOTE SERVICE: Init ... !!!
[MCU2_0]    322.930271 s: VISS REMOTE SERVICE: Init ... Done !!!
[MCU2_0]    322.930296 s: UDMA Copy: Init ... !!!
[MCU2_0]    322.931124 s: UDMA Copy: Init ... Done !!!
[MCU2_0]    322.931198 s: APP: Init ... Done !!!
[MCU2_0]    322.931222 s: APP: Run ... !!!
[MCU2_0]    322.931243 s: IPC: Starting echo test ...
[MCU2_0]    322.933317 s: APP: Run ... Done !!!
[MCU2_0]    322.933344 s: I am alive from MCU2_0 v2 
[MCU2_0]    322.934005 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C7X_1[P] C7X_2[.] 
[MCU2_0]    322.934073 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C7X_1[P] C7X_2[P] 
[MCU2_0]    322.934130 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C7X_1[P] C7X_2[P] 
[MCU2_0]    332.933146 s: I am alive from MCU2_0 v2 
[MCU2_0]    342.933143 s: I am alive from MCU2_0 v2 
[MCU2_0]    352.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    362.933143 s: I am alive from MCU2_0 v2 
[MCU2_0]    372.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    382.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    392.933143 s: I am alive from MCU2_0 v2 
[MCU2_0]    402.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    412.933143 s: I am alive from MCU2_0 v2 
[MCU2_0]    422.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    432.933143 s: I am alive from MCU2_0 v2 
[MCU2_0]    442.933143 s: I am alive from MCU2_0 v2 
[MCU2_0]    452.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    462.933143 s: I am alive from MCU2_0 v2 
[MCU2_0]    472.933143 s: I am alive from MCU2_0 v2 
[MCU2_0]    479.873993 s: src/drv/disp/dss_dispApi.c @ Line 336: 
[MCU2_0]    479.874025 s: Display Controller registration failed for DSS
[MCU2_0]    479.874081 s:  VX_ZONE_ERROR:[tivxDisplayCreate:545] DISPLAY: ERROR: Display Create Failed!
[MCU2_0]    482.933147 s: I am alive from MCU2_0 v2 
[MCU2_0]    492.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    502.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    512.933143 s: I am alive from MCU2_0 v2 
[MCU2_0]    522.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    532.933143 s: I am alive from MCU2_0 v2 
[MCU2_0]    542.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    552.933143 s: I am alive from MCU2_0 v2 
[MCU2_0]    562.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    572.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    582.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    592.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    602.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    612.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    622.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    632.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    642.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    652.933143 s: I am alive from MCU2_0 v2 
[MCU2_0]    662.933143 s: I am alive from MCU2_0 v2 
[MCU2_0]    672.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    682.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    692.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    702.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    712.933143 s: I am alive from MCU2_0 v2 
[MCU2_0]    722.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    732.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    742.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    752.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    762.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    772.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    782.933144 s: I am alive from MCU2_0 v2 
[MCU2_1]    322.863776 s: CIO: Init ... Done !!!
[MCU2_1]    322.863825 s: ### CPU Frequency = 1000000000 Hz
[MCU2_1]    322.863856 s: CPU is running FreeRTOS
[MCU2_1]    322.863877 s: APP: Init ... !!!
[MCU2_1]    322.863896 s: SCICLIENT: Init ... !!!
[MCU2_1]    322.864011 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[MCU2_1]    322.864044 s: SCICLIENT: DMSC FW revision 0x9  
[MCU2_1]    322.864071 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_1]    322.864102 s: SCICLIENT: Init ... Done !!!
[MCU2_1]    322.864124 s: UDMA: Init ... !!!
[MCU2_1]    322.864918 s: UDMA: Init ... Done !!!
[MCU2_1]    322.864962 s: MEM: Init ... !!!
[MCU2_1]    322.864995 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ da000000 of size 16777216 bytes !!!
[MCU2_1]    322.865053 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 60080000 of size 524288 bytes !!!
[MCU2_1]    322.865103 s: MEM: Init ... Done !!!
[MCU2_1]    322.865123 s: IPC: Init ... !!!
[MCU2_1]    322.865169 s: IPC: 5 CPUs participating in IPC !!!
[MCU2_1]    322.865203 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_1]    322.865231 s: IPC: HLOS is ready !!!
[MCU2_1]    322.874267 s: IPC: Init ... Done !!!
[MCU2_1]    322.874306 s: APP: Syncing with 4 CPUs ... !!!
[MCU2_1]    322.874339 s: APP: Syncing with 4 CPUs ... Done !!!
[MCU2_1]    322.874367 s: REMOTE_SERVICE: Init ... !!!
[MCU2_1]    322.875646 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_1]    322.875679 s: FVID2: Init ... !!!
[MCU2_1]    322.875728 s: FVID2: Init ... Done !!!
[MCU2_1]    322.875750 s: VHWA: DMPAC: Init ... !!!
[MCU2_1]    322.875771 s: SCICLIENT: Sciclient_pmSetModuleState module=58 state=2
[MCU2_1]    322.875913 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]    322.875940 s: SCICLIENT: Sciclient_pmSetModuleState module=62 state=2
[MCU2_1]    322.876009 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]    322.876036 s: VHWA: DOF Init ... !!!
[MCU2_1]    322.880241 s: VHWA: DOF Init ... Done !!!
[MCU2_1]    322.880275 s: VHWA: SDE Init ... !!!
[MCU2_1]    322.882269 s: VHWA: SDE Init ... Done !!!
[MCU2_1]    322.882301 s: VHWA: DMPAC: Init ... Done !!!
[MCU2_1]    322.882335 s:  VX_ZONE_INIT:Enabled
[MCU2_1]    322.882358 s:  VX_ZONE_ERROR:Enabled
[MCU2_1]    322.882380 s:  VX_ZONE_WARNING:Enabled
[MCU2_1]    322.883392 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-1 
[MCU2_1]    322.883578 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_SDE 
[MCU2_1]    322.883745 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_DOF 
[MCU2_1]    322.883786 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU2_1]    322.883815 s: APP: OpenVX Target kernel init ... !!!
[MCU2_1]    322.884047 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_1]    322.884076 s: UDMA Copy: Init ... !!!
[MCU2_1]    322.884914 s: UDMA Copy: Init ... Done !!!
[MCU2_1]    322.884949 s: APP: Init ... Done !!!
[MCU2_1]    322.884973 s: APP: Run ... !!!
[MCU2_1]    322.884993 s: IPC: Starting echo test ...
[MCU2_1]    322.887056 s: APP: Run ... Done !!!
[MCU2_1]    322.887592 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C7X_1[P] C7X_2[.] 
[MCU2_1]    322.887661 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C7X_1[P] C7X_2[P] 
[MCU2_1]    322.933930 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[s] C7X_1[P] C7X_2[P] 
[C7x_1 ]    252.575567 s: CIO: Init ... Done !!!
[C7x_1 ]    252.575583 s: ### CPU Frequency = 1000000000 Hz
[C7x_1 ]    252.575594 s: CPU is running FreeRTOS
[C7x_1 ]    252.575603 s: APP: Init ... !!!
[C7x_1 ]    252.575611 s: SCICLIENT: Init ... !!!
[C7x_1 ]    252.575710 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[C7x_1 ]    252.575725 s: SCICLIENT: DMSC FW revision 0x9  
[C7x_1 ]    252.575736 s: SCICLIENT: DMSC FW ABI revision 3.1
[C7x_1 ]    252.575747 s: SCICLIENT: Init ... Done !!!
[C7x_1 ]    252.575757 s: UDMA: Init ... !!!
[C7x_1 ]    252.576504 s: UDMA: Init ... Done !!!
[C7x_1 ]    252.576517 s: MEM: Init ... !!!
[C7x_1 ]    252.576530 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 117000000 of size 268435456 bytes !!!
[C7x_1 ]    252.576552 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 70020000 of size 3964928 bytes !!!
[C7x_1 ]    252.576570 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 64800000 of size 458752 bytes !!!
[C7x_1 ]    252.576589 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 64e00000 of size 16384 bytes !!!
[C7x_1 ]    252.576606 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ 100000000 of size 385875968 bytes !!!
[C7x_1 ]    252.576625 s: MEM: Init ... Done !!!
[C7x_1 ]    252.576633 s: IPC: Init ... !!!
[C7x_1 ]    252.576647 s: IPC: 5 CPUs participating in IPC !!!
[C7x_1 ]    252.576662 s: IPC: Waiting for HLOS to be ready ... !!!
[C7x_1 ]    252.576673 s: IPC: HLOS is ready !!!
[C7x_1 ]    252.578201 s: IPC: Init ... Done !!!
[C7x_1 ]    252.578214 s: APP: Syncing with 4 CPUs ... !!!
[C7x_1 ]    322.874340 s: APP: Syncing with 4 CPUs ... Done !!!
[C7x_1 ]    322.874358 s: REMOTE_SERVICE: Init ... !!!
[C7x_1 ]    322.874495 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_1 ]    322.874518 s:  VX_ZONE_INIT:Enabled
[C7x_1 ]    322.874554 s:  VX_ZONE_ERROR:Enabled
[C7x_1 ]    322.874564 s:  VX_ZONE_WARNING:Enabled
[C7x_1 ]    322.874768 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1 
[C7x_1 ]    322.874831 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_2 
[C7x_1 ]    322.874889 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_3 
[C7x_1 ]    322.874948 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_4 
[C7x_1 ]    322.875006 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_5 
[C7x_1 ]    322.875064 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_6 
[C7x_1 ]    322.875123 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_7 
[C7x_1 ]    322.875181 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_8 
[C7x_1 ]    322.875205 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C7x_1 ]    322.875218 s: APP: OpenVX Target kernel init ... !!!
[C7x_1 ]    322.875346 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_1 ]    322.875358 s: APP: Init ... Done !!!
[C7x_1 ]    322.875368 s: APP: Run ... !!!
[C7x_1 ]    322.875377 s: IPC: Starting echo test ...
[C7x_1 ]    322.875493 s: APP: Run ... Done !!!
[C7x_1 ]    322.876356 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C7X_1[s] C7X_2[P] 
[C7x_1 ]    322.887481 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C7X_1[s] C7X_2[P] 
[C7x_1 ]    322.933877 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C7X_1[s] C7X_2[P] 
[C7x_2 ]    278.674048 s: CIO: Init ... Done !!!
[C7x_2 ]    278.674064 s: ### CPU Frequency = 1000000000 Hz
[C7x_2 ]    278.674076 s: CPU is running FreeRTOS
[C7x_2 ]    278.674085 s: APP: Init ... !!!
[C7x_2 ]    278.674094 s: SCICLIENT: Init ... !!!
[C7x_2 ]    278.674192 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[C7x_2 ]    278.674206 s: SCICLIENT: DMSC FW revision 0x9  
[C7x_2 ]    278.674217 s: SCICLIENT: DMSC FW ABI revision 3.1
[C7x_2 ]    278.674228 s: SCICLIENT: Init ... Done !!!
[C7x_2 ]    278.674238 s: UDMA: Init ... !!!
[C7x_2 ]    278.674939 s: UDMA: Init ... Done !!!
[C7x_2 ]    278.674957 s: MEM: Init ... !!!
[C7x_2 ]    278.674969 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 127000000 of size 16777216 bytes !!!
[C7x_2 ]    278.674991 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 65800000 of size 458752 bytes !!!
[C7x_2 ]    278.675010 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 65e00000 of size 16384 bytes !!!
[C7x_2 ]    278.675027 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ 128000000 of size 67108864 bytes !!!
[C7x_2 ]    278.675046 s: MEM: Init ... Done !!!
[C7x_2 ]    278.675055 s: IPC: Init ... !!!
[C7x_2 ]    278.675069 s: IPC: 5 CPUs participating in IPC !!!
[C7x_2 ]    278.675084 s: IPC: Waiting for HLOS to be ready ... !!!
[C7x_2 ]    278.675096 s: IPC: HLOS is ready !!!
[C7x_2 ]    278.676613 s: IPC: Init ... Done !!!
[C7x_2 ]    278.676627 s: APP: Syncing with 4 CPUs ... !!!
[C7x_2 ]    322.874341 s: APP: Syncing with 4 CPUs ... Done !!!
[C7x_2 ]    322.874358 s: REMOTE_SERVICE: Init ... !!!
[C7x_2 ]    322.874498 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_2 ]    322.874523 s:  VX_ZONE_INIT:Enabled
[C7x_2 ]    322.874558 s:  VX_ZONE_ERROR:Enabled
[C7x_2 ]    322.874571 s:  VX_ZONE_WARNING:Enabled
[C7x_2 ]    322.875033 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP-1 
[C7x_2 ]    322.875055 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C7x_2 ]    322.875068 s: APP: OpenVX Target kernel init ... !!!
[C7x_2 ]    322.875312 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_2 ]    322.875327 s: UDMA Copy: Init ... !!!
[C7x_2 ]    322.875977 s: UDMA Copy: Init ... Done !!!
[C7x_2 ]    322.875990 s: APP: Init ... Done !!!
[C7x_2 ]    322.876001 s: APP: Run ... !!!
[C7x_2 ]    322.876009 s: IPC: Starting echo test ...
[C7x_2 ]    322.876117 s: APP: Run ... Done !!!
[C7x_2 ]    322.876362 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C7X_1[P] C7X_2[s] 
[C7x_2 ]    322.887534 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C7X_1[P] C7X_2[s] 
[C7x_2 ]    322.933910 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C7X_1[P] C7X_2[s] 
[MCU2_0]    792.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    802.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    812.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    822.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    832.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    842.933143 s: I am alive from MCU2_0 v2 
[MCU2_0]    852.933143 s: I am alive from MCU2_0 v2 
[MCU2_0]    862.933143 s: I am alive from MCU2_0 v2 
[MCU2_0]    872.933143 s: I am alive from MCU2_0 v2 
[MCU2_0]    882.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    883.401622 s: src/drv/disp/dss_dispApi.c @ Line 273: 
[MCU2_0]    883.401649 s: Driver instance already created!!
[MCU2_0]    883.401680 s: src/fvid2_drvMgr.c @ Line 759: 
[MCU2_0]    883.401704 s: Driver create failed!!
[MCU2_0]    883.401736 s:  VX_ZONE_ERROR:[tivxDisplayCreate:545] DISPLAY: ERROR: Display Create Failed!
[MCU2_0]    892.933147 s: I am alive from MCU2_0 v2 
[MCU2_0]    902.933144 s: I am alive from MCU2_0 v2 

The problem I see is that the SCI client does not initialize the DSS clock and I need help to fix this issue.

Also for some reason when I use an OpenVX app to stream video to the display it fails with an error which you can see in the logs:

[MCU2_0]    462.933143 s: I am alive from MCU2_0 v2 
[MCU2_0]    472.933143 s: I am alive from MCU2_0 v2 
[MCU2_0]    479.873993 s: src/drv/disp/dss_dispApi.c @ Line 336: 
[MCU2_0]    479.874025 s: Display Controller registration failed for DSS
[MCU2_0]    479.874081 s:  VX_ZONE_ERROR:[tivxDisplayCreate:545] DISPLAY: ERROR: Display Create Failed!
[MCU2_0]    482.933147 s: I am alive from MCU2_0 v2 
[MCU2_0]    492.933144 s: I am alive from MCU2_0 v2 
[MCU2_0]    502.933144 s: I am alive from MCU2_0 v2 

Hi,

From the sciclient APIs, I see few calls missing from the latest SDK

Can you add the below in the SDK version you are using and try again?

in app_dss_soc.c, please find the below added. 

Regarding the logs " DSS: Display is not connected", I checked the code and the if condition needs to be entered for HDMI. So currently the if condition is changed as shown below.

Please do the above 2 changes in the SDK version you are using or move to the latest SDK.

Please ensure that the log "DSS: Display is not connected" does come after this change. 

In this case, the vision_apps OpenVX display will work

Regards,

Nikhil

Yes after your suggested changes it finally initializes the display.

oot@j721s2-evm:/opt/edgeai-gst-apps# /opt/vision_apps-v6-debug/vx_app_arm_remote_log.out 
[MCU2_0]     23.714414 s: CIO: Init ... Done !!!
[MCU2_0]     23.714466 s: Before  ENABLE_BOARD
[MCU2_0]     23.714488 s: Start  ENABLE_BOARD
[MCU2_0]     23.714508 s: IN  ENABLE_DSS_SINGLE
[MCU2_0]     23.714529 s: IN  ENABLE_DSS_HDMI
[MCU2_0]     23.714559 s: End  ENABLE_BOARD
[MCU2_0]     23.714578 s: After  ENABLE_BOARD
[MCU2_0]     23.714598 s: ### CPU Frequency = 1000000000 Hz
[MCU2_0]     23.714627 s: CPU is running FreeRTOS
[MCU2_0]     23.714648 s: APP: Init ... !!!
[MCU2_0]     23.714668 s: SCICLIENT: Init ... !!!
[MCU2_0]     23.714787 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[MCU2_0]     23.714823 s: SCICLIENT: DMSC FW revision 0x9  
[MCU2_0]     23.714851 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_0]     23.714882 s: SCICLIENT: Init ... Done !!!
[MCU2_0]     23.714905 s: UDMA: Init ... !!!
[MCU2_0]     23.715707 s: UDMA: Init ... Done !!!
[MCU2_0]     23.715749 s: UDMA: Init ... !!!
[MCU2_0]     23.716236 s: UDMA: Init for CSITX/CSIRX ... Done !!!
[MCU2_0]     23.716300 s: MEM: Init ... !!!
[MCU2_0]     23.716335 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ d9000000 of size 16777216 bytes !!!
[MCU2_0]     23.716395 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 60000000 of size 524288 bytes !!!
[MCU2_0]     23.716449 s: MEM: Init ... Done !!!
[MCU2_0]     23.716470 s: IPC: Init ... !!!
[MCU2_0]     23.716517 s: IPC: 5 CPUs participating in IPC !!!
[MCU2_0]     23.716553 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_0]     23.716582 s: IPC: HLOS is ready !!!
[MCU2_0]     23.726075 s: IPC: Init ... Done !!!
[MCU2_0]     23.726119 s: APP: Syncing with 4 CPUs ... !!!
[MCU2_0]     23.924874 s: APP: Syncing with 4 CPUs ... Done !!!
[MCU2_0]     23.924907 s: REMOTE_SERVICE: Init ... !!!
[MCU2_0]     23.926180 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_0]     23.926219 s: FVID2: Init ... !!!
[MCU2_0]     23.926315 s: FVID2: Init ... Done !!!
[MCU2_0]     23.926340 s: SCICLIENT: Sciclient_pmSetModuleState module=219 state=2
[MCU2_0]     23.926430 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     23.926472 s: Before  ENABLE_DSS_SINGLE
[MCU2_0]     23.926494 s: Start  ENABLE_DSS_SINGLE
[MCU2_0]     23.926516 s: Set APP_DSS_DEFAULT_DISPLAY_TYPE_DPI_HDMI
[MCU2_0]     23.926541 s: Set  APP_DSS_DEFAULT_DISPLAY_TYPE_EDP
[MCU2_0]     23.926565 s: Display timings:
[MCU2_0] width = 720
[MCU2_0] height = 480
[MCU2_0] hFrontPorch = 16
[MCU2_0] hBackPorch = 6
[MCU2_0] hSyncLen = 267
[MCU2_0] vFrontPorch = 15
[MCU2_0] vBackPorch = 5
[MCU2_0] vSyncLen = 0
[MCU2_0] pixelClock = 27000000
[MCU2_0]     23.926651 s: Before  appDssDefaultInit
[MCU2_0]     23.926673 s: DSS: Init ... !!!
[MCU2_0]     23.926693 s: DSS: Display type is HDMI !!!
[MCU2_0]     23.926716 s: DSS: M2M Path is enabled !!!
[MCU2_0]     23.926739 s: DSS: SoC init ... !!!
[MCU2_0]     23.926759 s: SCICLIENT: Sciclient_pmSetModuleState module=158 state=0
[MCU2_0]     23.926824 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     23.926854 s: SCICLIENT: Sciclient_pmSetModuleState module=158 state=0
[MCU2_0]     23.926954 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     23.926986 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=158 clk=5 parent=7
[MCU2_0]     23.927088 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU2_0]     23.927120 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=158 clk=5 freq=27000000
[MCU2_0]     23.928748 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success
[MCU2_0]     23.928778 s: SCICLIENT: Sciclient_pmModuleClkRequest module=158 clk=5 state=2 flag=0
[MCU2_0]     23.928885 s: SCICLIENT: Sciclient_pmModuleClkRequest success
[MCU2_0]     23.928912 s: SCICLIENT: Sciclient_pmSetModuleState module=158 state=2
[MCU2_0]     23.929022 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     23.929052 s: DSS: SoC init ... Done !!!
[MCU2_0]     23.929074 s: DSS: Board init ... !!!
[MCU2_0]     23.929095 s: DSS: Board init ... Done !!!
[MCU2_0]     23.931615 s: DSS: Init ... Done !!!
[MCU2_0]     23.931660 s: End  ENABLE_DSS_SINGLE
[MCU2_0]     23.931681 s: After  ENABLE_DSS_SINGLE
[MCU2_0]     23.931703 s: VHWA: VPAC Init ... !!!
[MCU2_0]     23.931725 s: SCICLIENT: Sciclient_pmSetModuleState module=361 state=2
[MCU2_0]     23.931846 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     23.931877 s: VHWA: LDC Init ... !!!
[MCU2_0]     23.934124 s: VHWA: LDC Init ... Done !!!
[MCU2_0]     23.934165 s: VHWA: MSC Init ... !!!
[MCU2_0]     23.941883 s: VHWA: MSC Init ... Done !!!
[MCU2_0]     23.941926 s: VHWA: NF Init ... !!!
[MCU2_0]     23.942811 s: VHWA: NF Init ... Done !!!
[MCU2_0]     23.942849 s: VHWA: VISS Init ... !!!
[MCU2_0]     23.949439 s: VHWA: VISS Init ... Done !!!
[MCU2_0]     23.949483 s: VHWA: VPAC Init ... Done !!!
[MCU2_0]     23.949518 s:  VX_ZONE_INIT:Enabled
[MCU2_0]     23.949541 s:  VX_ZONE_ERROR:Enabled
[MCU2_0]     23.949563 s:  VX_ZONE_WARNING:Enabled
[MCU2_0]     23.950604 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-0 
[MCU2_0]     23.950793 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_NF 
[MCU2_0]     23.950965 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_LDC1 
[MCU2_0]     23.951149 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC1 
[MCU2_0]     23.951322 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC2 
[MCU2_0]     23.951542 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_VISS1 
[MCU2_0]     23.951738 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE1 
[MCU2_0]     23.951921 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE2 
[MCU2_0]     23.952115 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY1 
[MCU2_0]     23.952308 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY2 
[MCU2_0]     23.952478 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CSITX 
[MCU2_0]     23.952663 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE3 
[MCU2_0]     23.952853 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE4 
[MCU2_0]     23.953050 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE5 
[MCU2_0]     23.953249 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE6 
[MCU2_0]     23.953445 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE7 
[MCU2_0]     23.953635 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE8 
[MCU2_0]     23.953812 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M1 
[MCU2_0]     23.953987 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M2 
[MCU2_0]     23.954180 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M3 
[MCU2_0]     23.954367 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M4 
[MCU2_0]     23.954547 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CSITX2 
[MCU2_0]     23.954589 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU2_0]     23.954619 s: APP: OpenVX Target kernel init ... !!!
[MCU2_0]     23.981102 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_0]     23.981140 s: VISS REMOTE SERVICE: Init ... !!!
[MCU2_0]     23.981208 s: VISS REMOTE SERVICE: Init ... Done !!!
[MCU2_0]     23.981235 s: UDMA Copy: Init ... !!!
[MCU2_0]     23.982136 s: UDMA Copy: Init ... Done !!!
[MCU2_0]     23.982207 s: APP: Init ... Done !!!
[MCU2_0]     23.982233 s: APP: Run ... !!!
[MCU2_0]     23.982253 s: IPC: Starting echo test ...
[MCU2_0]     23.984322 s: APP: Run ... Done !!!
[MCU2_0]     23.984350 s: I am alive from MCU2_0 v7 
[MCU2_0]     23.985082 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C7X_1[P] C7X_2[.] 
[MCU2_0]     23.985155 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C7X_1[P] C7X_2[P] 
[MCU2_0]     23.985216 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C7X_1[P] C7X_2[P] 
[MCU2_0]     33.984047 s: I am alive from MCU2_0 v7 
[MCU2_0]     43.984045 s: I am alive from MCU2_0 v7 
[MCU2_0]     53.984045 s: I am alive from MCU2_0 v7 
[MCU2_0]     63.984045 s: I am alive from MCU2_0 v7 
[MCU2_0]     73.984045 s: I am alive from MCU2_0 v7 
[MCU2_0]     83.984045 s: I am alive from MCU2_0 v7 
[MCU2_0]     93.984044 s: I am alive from MCU2_0 v7 
[MCU2_1]     23.913791 s: CIO: Init ... Done !!!
[MCU2_1]     23.913844 s: Before  ENABLE_BOARD
[MCU2_1]     23.913865 s: After  ENABLE_BOARD
[MCU2_1]     23.913884 s: ### CPU Frequency = 1000000000 Hz
[MCU2_1]     23.913914 s: CPU is running FreeRTOS
[MCU2_1]     23.913935 s: APP: Init ... !!!
[MCU2_1]     23.913955 s: SCICLIENT: Init ... !!!
[MCU2_1]     23.914071 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[MCU2_1]     23.914104 s: SCICLIENT: DMSC FW revision 0x9  
[MCU2_1]     23.914131 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_1]     23.914161 s: SCICLIENT: Init ... Done !!!
[MCU2_1]     23.914184 s: UDMA: Init ... !!!
[MCU2_1]     23.915033 s: UDMA: Init ... Done !!!
[MCU2_1]     23.915091 s: MEM: Init ... !!!
[MCU2_1]     23.915127 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ da000000 of size 16777216 bytes !!!
[MCU2_1]     23.915183 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 60080000 of size 524288 bytes !!!
[MCU2_1]     23.915234 s: MEM: Init ... Done !!!
[MCU2_1]     23.915255 s: IPC: Init ... !!!
[MCU2_1]     23.915302 s: IPC: 5 CPUs participating in IPC !!!
[MCU2_1]     23.915340 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_1]     23.915369 s: IPC: HLOS is ready !!!
[MCU2_1]     23.924797 s: IPC: Init ... Done !!!
[MCU2_1]     23.924838 s: APP: Syncing with 4 CPUs ... !!!
[MCU2_1]     23.924873 s: APP: Syncing with 4 CPUs ... Done !!!
[MCU2_1]     23.924902 s: REMOTE_SERVICE: Init ... !!!
[MCU2_1]     23.926184 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_1]     23.926222 s: FVID2: Init ... !!!
[MCU2_1]     23.926314 s: FVID2: Init ... Done !!!
[MCU2_1]     23.926336 s: Before  ENABLE_DSS_SINGLE
[MCU2_1]     23.926357 s: After  ENABLE_DSS_SINGLE
[MCU2_1]     23.926378 s: VHWA: DMPAC: Init ... !!!
[MCU2_1]     23.926399 s: SCICLIENT: Sciclient_pmSetModuleState module=58 state=2
[MCU2_1]     23.926540 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]     23.926568 s: SCICLIENT: Sciclient_pmSetModuleState module=62 state=2
[MCU2_1]     23.926642 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]     23.926668 s: VHWA: DOF Init ... !!!
[MCU2_1]     23.931552 s: VHWA: DOF Init ... Done !!!
[MCU2_1]     23.931593 s: VHWA: SDE Init ... !!!
[MCU2_1]     23.933422 s: VHWA: SDE Init ... Done !!!
[MCU2_1]     23.933453 s: VHWA: DMPAC: Init ... Done !!!
[MCU2_1]     23.933489 s:  VX_ZONE_INIT:Enabled
[MCU2_1]     23.933512 s:  VX_ZONE_ERROR:Enabled
[MCU2_1]     23.933534 s:  VX_ZONE_WARNING:Enabled
[MCU2_1]     23.934562 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-1 
[MCU2_1]     23.934736 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_SDE 
[MCU2_1]     23.934904 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_DOF 
[MCU2_1]     23.934945 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU2_1]     23.934975 s: APP: OpenVX Target kernel init ... !!!
[MCU2_1]     23.935211 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_1]     23.935240 s: UDMA Copy: Init ... !!!
[MCU2_1]     23.936151 s: UDMA Copy: Init ... Done !!!
[MCU2_1]     23.936195 s: APP: Init ... Done !!!
[MCU2_1]     23.936220 s: APP: Run ... !!!
[MCU2_1]     23.936239 s: IPC: Starting echo test ...
[MCU2_1]     23.938303 s: APP: Run ... Done !!!
[MCU2_1]     23.938868 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C7X_1[.] C7X_2[P] 
[MCU2_1]     23.938943 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C7X_1[P] C7X_2[P] 
[MCU2_1]     23.984986 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[s] C7X_1[P] C7X_2[P] 
[C7x_1 ]     23.546210 s: CIO: Init ... Done !!!
[C7x_1 ]     23.546225 s: Before  ENABLE_BOARD
[C7x_1 ]     23.546234 s: After  ENABLE_BOARD
[C7x_1 ]     23.546242 s: ### CPU Frequency = 1000000000 Hz
[C7x_1 ]     23.546253 s: CPU is running FreeRTOS
[C7x_1 ]     23.546261 s: APP: Init ... !!!
[C7x_1 ]     23.546269 s: SCICLIENT: Init ... !!!
[C7x_1 ]     23.546369 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[C7x_1 ]     23.546383 s: SCICLIENT: DMSC FW revision 0x9  
[C7x_1 ]     23.546394 s: SCICLIENT: DMSC FW ABI revision 3.1
[C7x_1 ]     23.546405 s: SCICLIENT: Init ... Done !!!
[C7x_1 ]     23.546415 s: UDMA: Init ... !!!
[C7x_1 ]     23.547193 s: UDMA: Init ... Done !!!
[C7x_1 ]     23.547206 s: MEM: Init ... !!!
[C7x_1 ]     23.547218 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 117000000 of size 268435456 bytes !!!
[C7x_1 ]     23.547240 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 70020000 of size 3964928 bytes !!!
[C7x_1 ]     23.547258 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 64800000 of size 458752 bytes !!!
[C7x_1 ]     23.547276 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 64e00000 of size 16384 bytes !!!
[C7x_1 ]     23.547294 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ 100000000 of size 385875968 bytes !!!
[C7x_1 ]     23.547314 s: MEM: Init ... Done !!!
[C7x_1 ]     23.547322 s: IPC: Init ... !!!
[C7x_1 ]     23.547336 s: IPC: 5 CPUs participating in IPC !!!
[C7x_1 ]     23.547351 s: IPC: Waiting for HLOS to be ready ... !!!
[C7x_1 ]     23.547363 s: IPC: HLOS is ready !!!
[C7x_1 ]     23.549038 s: IPC: Init ... Done !!!
[C7x_1 ]     23.549053 s: APP: Syncing with 4 CPUs ... !!!
[C7x_1 ]     23.924875 s: APP: Syncing with 4 CPUs ... Done !!!
[C7x_1 ]     23.924893 s: REMOTE_SERVICE: Init ... !!!
[C7x_1 ]     23.925039 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_1 ]     23.925056 s: Before  ENABLE_DSS_SINGLE
[C7x_1 ]     23.925065 s: After  ENABLE_DSS_SINGLE
[C7x_1 ]     23.925079 s:  VX_ZONE_INIT:Enabled
[C7x_1 ]     23.925097 s:  VX_ZONE_ERROR:Enabled
[C7x_1 ]     23.925108 s:  VX_ZONE_WARNING:Enabled
[C7x_1 ]     23.925348 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1 
[C7x_1 ]     23.925412 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_2 
[C7x_1 ]     23.925475 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_3 
[C7x_1 ]     23.925537 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_4 
[C7x_1 ]     23.925600 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_5 
[C7x_1 ]     23.925664 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_6 
[C7x_1 ]     23.925729 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_7 
[C7x_1 ]     23.925793 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_8 
[C7x_1 ]     23.925816 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C7x_1 ]     23.925830 s: APP: OpenVX Target kernel init ... !!!
[C7x_1 ]     23.925993 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_1 ]     23.926007 s: APP: Init ... Done !!!
[C7x_1 ]     23.926016 s: APP: Run ... !!!
[C7x_1 ]     23.926025 s: IPC: Starting echo test ...
[C7x_1 ]     23.926152 s: APP: Run ... Done !!!
[C7x_1 ]     23.927129 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C7X_1[s] C7X_2[P] 
[C7x_1 ]     23.938758 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C7X_1[s] C7X_2[P] 
[C7x_1 ]     23.984926 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C7X_1[s] C7X_2[P] 
[C7x_2 ]     23.623300 s: CIO: Init ... Done !!!
[C7x_2 ]     23.623315 s: Before  ENABLE_BOARD
[C7x_2 ]     23.623324 s: After  ENABLE_BOARD
[C7x_2 ]     23.623333 s: ### CPU Frequency = 1000000000 Hz
[C7x_2 ]     23.623343 s: CPU is running FreeRTOS
[C7x_2 ]     23.623353 s: APP: Init ... !!!
[C7x_2 ]     23.623360 s: SCICLIENT: Init ... !!!
[C7x_2 ]     23.623461 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)]
[C7x_2 ]     23.623475 s: SCICLIENT: DMSC FW revision 0x9  
[C7x_2 ]     23.623486 s: SCICLIENT: DMSC FW ABI revision 3.1
[C7x_2 ]     23.623497 s: SCICLIENT: Init ... Done !!!
[C7x_2 ]     23.623506 s: UDMA: Init ... !!!
[C7x_2 ]     23.624247 s: UDMA: Init ... Done !!!
[C7x_2 ]     23.624260 s: MEM: Init ... !!!
[C7x_2 ]     23.624272 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 127000000 of size 16777216 bytes !!!
[C7x_2 ]     23.624293 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 65800000 of size 458752 bytes !!!
[C7x_2 ]     23.624312 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 65e00000 of size 16384 bytes !!!
[C7x_2 ]     23.624330 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ 128000000 of size 67108864 bytes !!!
[C7x_2 ]     23.624349 s: MEM: Init ... Done !!!
[C7x_2 ]     23.624357 s: IPC: Init ... !!!
[C7x_2 ]     23.624372 s: IPC: 5 CPUs participating in IPC !!!
[C7x_2 ]     23.624386 s: IPC: Waiting for HLOS to be ready ... !!!
[C7x_2 ]     23.624399 s: IPC: HLOS is ready !!!
[C7x_2 ]     23.626069 s: IPC: Init ... Done !!!
[C7x_2 ]     23.626084 s: APP: Syncing with 4 CPUs ... !!!
[C7x_2 ]     23.924875 s: APP: Syncing with 4 CPUs ... Done !!!
[C7x_2 ]     23.924892 s: REMOTE_SERVICE: Init ... !!!
[C7x_2 ]     23.925044 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_2 ]     23.925061 s: Before  ENABLE_DSS_SINGLE
[C7x_2 ]     23.925071 s: After  ENABLE_DSS_SINGLE
[C7x_2 ]     23.925086 s:  VX_ZONE_INIT:Enabled
[C7x_2 ]     23.925097 s:  VX_ZONE_ERROR:Enabled
[C7x_2 ]     23.925108 s:  VX_ZONE_WARNING:Enabled
[C7x_2 ]     23.925685 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP-1 
[C7x_2 ]     23.925708 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C7x_2 ]     23.925722 s: APP: OpenVX Target kernel init ... !!!
[C7x_2 ]     23.926022 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_2 ]     23.926037 s: UDMA Copy: Init ... !!!
[C7x_2 ]     23.926713 s: UDMA Copy: Init ... Done !!!
[C7x_2 ]     23.926728 s: APP: Init ... Done !!!
[C7x_2 ]     23.926738 s: APP: Run ... !!!
[C7x_2 ]     23.926747 s: IPC: Starting echo test ...
[C7x_2 ]     23.926865 s: APP: Run ... Done !!!
[C7x_2 ]     23.927134 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C7X_1[P] C7X_2[s] 
[C7x_2 ]     23.938855 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C7X_1[P] C7X_2[s] 
[C7x_2 ]     23.984952 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C7X_1[P] C7X_2[s] 
[MCU2_0]    103.984045 s: I am alive from MCU2_0 v7 
[MCU2_0]    113.984045 s: I am alive from MCU2_0 v7 
[MCU2_0]    123.984045 s: I am alive from MCU2_0 v7 
[MCU2_0]    133.984045 s: I am alive from MCU2_0 v7 
[MCU2_0]    143.984045 s: I am alive from MCU2_0 v7 
[MCU2_0]    153.984045 s: I am alive from MCU2_0 v7 
[MCU2_0]    163.984045 s: I am alive from MCU2_0 v7 
[MCU2_0]    173.984045 s: I am alive from MCU2_0 v7 

When I run my OpenVX app the graph is processing the video:

[$] <> ./VideoStreamMain ../cvbs_monitor/data/frieren-720-480.mkv 
DSI stream video: ../cvbs_monitor/data/frieren-720-480.mkv
Video '../cvbs_monitor/data/frieren-720-480.mkv': res [720x480] frames 503
Enable debug
     0.000000 s:  VX_ZONE_ERROR:Enabled
     0.000000 s:  VX_ZONE_WARNING:Enabled
     0.000000 s:  VX_ZONE_API:Enabled
     0.000000 s:  VX_ZONE_INFO:Enabled
     0.000000 s:  VX_ZONE_KERNEL:Enabled
     0.000000 s:  VX_ZONE_GRAPH:Enabled
     0.000000 s:  VX_ZONE_NODE:Enabled
     0.000000 s:  VX_ZONE_PARAMETER:Enabled
     0.000000 s:  VX_ZONE_NODE:Enabled
     0.000000 s:  VX_ZONE_TARGET:Enabled
     0.000000 s:  VX_ZONE_LOG:Enabled
     0.000000 s:  VX_ZONE_INIT:Enabled
APP: Init ... !!!
MEM: Init ... !!!
MEM: Initialized DMA HEAP (fd=5) !!!
MEM: Init ... Done !!!
IPC: Init ... !!!
IPC: Init ... Done !!!
REMOTE_SERVICE: Init ... !!!
REMOTE_SERVICE: Init ... Done !!!
   270.194933 s: GTC Frequency = 200 MHz
APP: Init ... Done !!!
   270.194972 s:  VX_ZONE_INIT:Enabled
   270.194982 s:  VX_ZONE_ERROR:Enabled
   270.194991 s:  VX_ZONE_WARNING:Enabled
   270.194999 s:  VX_ZONE_INFO:Disabled
   270.196558 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
   270.197514 s:  VX_ZONE_INIT:[tivxHostInitLocal:93] Initialization Done for HOST !!!
   270.200327 s:  VX_ZONE_WARNING:[vxAddLogEntry:61] Invalid status code; VX_SUCCESS status is not logged!
   270.200983 s:  VX_ZONE_PARAMETER:[vxSetParameterByIndex:181] Attempting to set parameter[0] on com.ti.hwa.display (enum:-2097143) to 0xffffa9830950
   270.201017 s:  VX_ZONE_PARAMETER:[vxSetParameterByIndex:218] Query returned type 00000816 for ref 0xffffa9830950
   270.201235 s:  VX_ZONE_PARAMETER:[vxSetParameterByIndex:282] Assigned Node[0] 0xffffa97a26d0 type:00000816 ref=0xffffa9830950
   270.201280 s:  VX_ZONE_PARAMETER:[vxSetParameterByIndex:181] Attempting to set parameter[1] on com.ti.hwa.display (enum:-2097143) to 0xffffa9869ed0
   270.201305 s:  VX_ZONE_PARAMETER:[vxSetParameterByIndex:218] Query returned type 0000080f for ref 0xffffa9869ed0
   270.201353 s:  VX_ZONE_PARAMETER:[vxSetParameterByIndex:282] Assigned Node[1] 0xffffa97a26d0 type:0000080f ref=0xffffa9869ed0
Display Set Target -> DONE
Verified OpenVX graph -- Success
Start streaming

Progress:  480/503End streaming                                           
   285.584317 s:  VX_ZONE_WARNING:[vxReleaseContext:1055] Found a reference 0xffffa97ec7f0 of type 00000804 at external count 1, internal count 1, releasing it
   285.584349 s:  VX_ZONE_WARNING:[vxReleaseContext:1057] Releasing reference (name=com.ti.img_proc.img.preprocess) now as a part of garbage collection
   285.584412 s:  VX_ZONE_WARNING:[vxReleaseContext:1066] A kernel with name com.ti.img_proc.img.preprocess has not been removed, possibly due to a kernel module not being unloaded.
   285.584440 s:  VX_ZONE_WARNING:[vxReleaseContext:1067] Removing as a part of garbage collection
   285.584475 s:  VX_ZONE_WARNING:[vxReleaseContext:1055] Found a reference 0xffffa97ed4e8 of type 00000804 at external count 1, internal count 1, releasing it
   285.584514 s:  VX_ZONE_WARNING:[vxReleaseContext:1057] Releasing reference (name=com.ti.img_proc.oc.pre.proc) now as a part of garbage collection
   285.584532 s:  VX_ZONE_WARNING:[vxReleaseContext:1066] A kernel with name com.ti.img_proc.oc.pre.proc has not been removed, possibly due to a kernel module not being unloaded.
   285.584552 s:  VX_ZONE_WARNING:[vxReleaseContext:1067] Removing as a part of garbage collection
   285.584591 s:  VX_ZONE_WARNING:[vxReleaseContext:1055] Found a reference 0xffffa97ee1e0 of type 00000804 at external count 1, internal count 1, releasing it
   285.584611 s:  VX_ZONE_WARNING:[vxReleaseContext:1057] Releasing reference (name=com.ti.img_proc.oc.post.proc) now as a part of garbage collection
   285.584630 s:  VX_ZONE_WARNING:[vxReleaseContext:1066] A kernel with name com.ti.img_proc.oc.post.proc has not been removed, possibly due to a kernel module not being unloaded.
   285.584998 s:  VX_ZONE_WARNING:[vxReleaseContext:1067] Removing as a part of garbage collection
   285.585022 s:  VX_ZONE_WARNING:[vxReleaseContext:1055] Found a reference 0xffffa97eeed8 of type 00000804 at external count 1, internal count 1, releasing it
   285.585030 s:  VX_ZONE_WARNING:[vxReleaseContext:1057] Releasing reference (name=com.ti.img_proc.od.postprocess) now as a part of garbage collection
   285.585036 s:  VX_ZONE_WARNING:[vxReleaseContext:1066] A kernel with name com.ti.img_proc.od.postprocess has not been removed, possibly due to a kernel module not being unloaded.
   285.585042 s:  VX_ZONE_WARNING:[vxReleaseContext:1067] Removing as a part of garbage collection
   285.585054 s:  VX_ZONE_WARNING:[vxReleaseContext:1055] Found a reference 0xffffa97efbd0 of type 00000804 at external count 1, internal count 1, releasing it
   285.585064 s:  VX_ZONE_WARNING:[vxReleaseContext:1057] Releasing reference (name=com.ti.img_proc.dof.plane.seperation) now as a part of garbage collection
   285.585073 s:  VX_ZONE_WARNING:[vxReleaseContext:1066] A kernel with name com.ti.img_proc.dof.plane.seperation has not been removed, possibly due to a kernel module not being unloaded.
   285.585079 s:  VX_ZONE_WARNING:[vxReleaseContext:1067] Removing as a part of garbage collection
   285.585090 s:  VX_ZONE_WARNING:[vxReleaseContext:1055] Found a reference 0xffffa97f08c8 of type 00000804 at external count 1, internal count 1, releasing it
   285.585096 s:  VX_ZONE_WARNING:[vxReleaseContext:1057] Releasing reference (name=com.ti.img_proc.pose.visualization) now as a part of garbage collection
   285.585103 s:  VX_ZONE_WARNING:[vxReleaseContext:1066] A kernel with name com.ti.img_proc.pose.visualization has not been removed, possibly due to a kernel module not being unloaded.
   285.585109 s:  VX_ZONE_WARNING:[vxReleaseContext:1067] Removing as a part of garbage collection
   285.585120 s:  VX_ZONE_WARNING:[vxReleaseContext:1055] Found a reference 0xffffa97f15c0 of type 00000804 at external count 1, internal count 1, releasing it
   285.585140 s:  VX_ZONE_WARNING:[vxReleaseContext:1057] Releasing reference (name=com.ti.img_proc.visual.localization) now as a part of garbage collection
   285.585148 s:  VX_ZONE_WARNING:[vxReleaseContext:1066] A kernel with name com.ti.img_proc.visual.localization has not been removed, possibly due to a kernel module not being unloaded.
   285.585154 s:  VX_ZONE_WARNING:[vxReleaseContext:1067] Removing as a part of garbage collection
   285.585166 s:  VX_ZONE_WARNING:[vxReleaseContext:1055] Found a reference 0xffffa97f22b8 of type 00000804 at external count 1, internal count 1, releasing it
   285.585172 s:  VX_ZONE_WARNING:[vxReleaseContext:1057] Releasing reference (name=com.ti.img_proc.od.draw.keypoint.detections) now as a part of garbage collection
   285.585178 s:  VX_ZONE_WARNING:[vxReleaseContext:1066] A kernel with name com.ti.img_proc.od.draw.keypoint.detections has not been removed, possibly due to a kernel module not being unloaded.
   285.585185 s:  VX_ZONE_WARNING:[vxReleaseContext:1067] Removing as a part of garbage collection
   285.585195 s:  VX_ZONE_WARNING:[vxReleaseContext:1055] Found a reference 0xffffa97f2fb0 of type 00000804 at external count 1, internal count 1, releasing it
   285.585201 s:  VX_ZONE_WARNING:[vxReleaseContext:1057] Releasing reference (name=com.ti.img_proc.od.draw.box.detections) now as a part of garbage collection
   285.585224 s:  VX_ZONE_WARNING:[vxReleaseContext:1066] A kernel with name com.ti.img_proc.od.draw.box.detections has not been removed, possibly due to a kernel module not being unloaded.
   285.585231 s:  VX_ZONE_WARNING:[vxReleaseContext:1067] Removing as a part of garbage collection
   285.585252 s:  VX_ZONE_WARNING:[vxReleaseContext:1055] Found a reference 0xffffa97f3ca8 of type 00000804 at external count 1, internal count 1, releasing it
   285.585261 s:  VX_ZONE_WARNING:[vxReleaseContext:1057] Releasing reference (name=com.ti.img_proc.img.hist) now as a part of garbage collection
   285.585267 s:  VX_ZONE_WARNING:[vxReleaseContext:1066] A kernel with name com.ti.img_proc.img.hist has not been removed, possibly due to a kernel module not being unloaded.
   285.585273 s:  VX_ZONE_WARNING:[vxReleaseContext:1067] Removing as a part of garbage collection
   285.585284 s:  VX_ZONE_WARNING:[vxReleaseContext:1055] Found a reference 0xffffa97f49a0 of type 00000804 at external count 1, internal count 1, releasing it
   285.585290 s:  VX_ZONE_WARNING:[vxReleaseContext:1057] Releasing reference (name=com.ti.img_proc.sfm) now as a part of garbage collection
   285.585296 s:  VX_ZONE_WARNING:[vxReleaseContext:1066] A kernel with name com.ti.img_proc.sfm has not been removed, possibly due to a kernel module not being unloaded.
   285.585304 s:  VX_ZONE_WARNING:[vxReleaseContext:1067] Removing as a part of garbage collection
   285.585564 s:  VX_ZONE_WARNING:[vxReleaseContext:1055] Found a reference 0xffffa97f5698 of type 00000804 at external count 1, internal count 1, releasing it
   285.585591 s:  VX_ZONE_WARNING:[vxReleaseContext:1057] Releasing reference (name=com.ti.img_proc.dl.pre.proc) now as a part of garbage collection
   285.585598 s:  VX_ZONE_WARNING:[vxReleaseContext:1066] A kernel with name com.ti.img_proc.dl.pre.proc has not been removed, possibly due to a kernel module not being unloaded.
   285.585603 s:  VX_ZONE_WARNING:[vxReleaseContext:1067] Removing as a part of garbage collection
   285.585637 s:  VX_ZONE_WARNING:[vxReleaseContext:1055] Found a reference 0xffffa97f6390 of type 00000804 at external count 1, internal count 1, releasing it
   285.585646 s:  VX_ZONE_WARNING:[vxReleaseContext:1057] Releasing reference (name=com.ti.img_proc.dl.color.blend) now as a part of garbage collection
   285.585653 s:  VX_ZONE_WARNING:[vxReleaseContext:1066] A kernel with name com.ti.img_proc.dl.color.blend has not been removed, possibly due to a kernel module not being unloaded.
   285.585660 s:  VX_ZONE_WARNING:[vxReleaseContext:1067] Removing as a part of garbage collection
   285.585672 s:  VX_ZONE_WARNING:[vxReleaseContext:1055] Found a reference 0xffffa97f7088 of type 00000804 at external count 1, internal count 1, releasing it
   285.585682 s:  VX_ZONE_WARNING:[vxReleaseContext:1057] Releasing reference (name=com.ti.img_proc.dl.draw.box) now as a part of garbage collection
   285.585688 s:  VX_ZONE_WARNING:[vxReleaseContext:1066] A kernel with name com.ti.img_proc.dl.draw.box has not been removed, possibly due to a kernel module not being unloaded.
   285.585694 s:  VX_ZONE_WARNING:[vxReleaseContext:1067] Removing as a part of garbage collection
   285.585706 s:  VX_ZONE_WARNING:[vxReleaseContext:1055] Found a reference 0xffffa97f7d80 of type 00000804 at external count 1, internal count 1, releasing it
   285.585712 s:  VX_ZONE_WARNING:[vxReleaseContext:1057] Releasing reference (name=com.ti.img_proc.dl.color.convert) now as a part of garbage collection
   285.585718 s:  VX_ZONE_WARNING:[vxReleaseContext:1066] A kernel with name com.ti.img_proc.dl.color.convert has not been removed, possibly due to a kernel module not being unloaded.
   285.585724 s:  VX_ZONE_WARNING:[vxReleaseContext:1067] Removing as a part of garbage collection
   285.585792 s:  VX_ZONE_INIT:[tivxHostDeInitLocal:107] De-Initialization Done for HOST !!!
   285.590144 s:  VX_ZONE_INIT:[tivxDeInitLocal:193] De-Initialization Done !!!
APP: Deinit ... !!!
REMOTE_SERVICE: Deinit ... !!!
REMOTE_SERVICE: Deinit ... Done !!!
IPC: Deinit ... !!!
IPC: DeInit ... Done !!!
MEM: Deinit ... !!!
DDR_SHARED_MEM: Alloc's: 2 alloc's of 518444 bytes 
DDR_SHARED_MEM: Free's : 2 free's  of 518444 bytes 
DDR_SHARED_MEM: Open's : 0 allocs  of 0 bytes 
DDR_SHARED_MEM: Total size: 536870912 bytes 
MEM: Deinit ... Done !!!
APP: Deinit ... Done !!!

But there is still a problem.

I am configuring the timings for the analog converter. Following another thread: link
But there is no option in app_dss_defaults.c appDctrlDefaultInit to set the vpParams.scanFmt to FVID2_SF_INTERLACED.
The vpParams variable, an app_dctrl_vp_params_t structure, does not have the scanFmt field.
This is strange because the standard field has options that support interlaced mode and the driver supports it.
But there is no interface to set the scanFmt from app_dss_defaults.c

Could you help me set the interlace mode for the display with my custom timings and colorspace?

# app_dss_defaults.c appDctrlDefaultInit line 329:
vpParams.pixelClkPolarity = APP_DCTRL_EDGE_POL_FALLING;
vpParams.scanFmt = FVID2_SF_INTERLACED;
vpParams.dvoFormat = APP_DCTRL_DV_BT656_EMBSYNC;

For now, I just changed the define of progressive mode to hold the same value as progresive. To only be able to enable interlace.

/**
 *  \anchor Fvid2_ScanFormat
 *  \name Scan format
 *
 *  @{
 */
typedef uint32_t Fvid2_ScanFormat;
/** \brief Interlaced mode */
#define FVID2_SF_INTERLACED                 ((uint32_t) 0x00U)
/** \brief Progressive mode */
#define FVID2_SF_PROGRESSIVE                ((uint32_t) 0x00U)
/** \brief Used by driver for validating the input parameters */
#define FVID2_SF_MAX                        ((uint32_t) 0x02U)
/* @} */

D0 data
D1 data
D2 data
D3 data
D4 data
D5 data
D6 data
D7 data
D8 data
D9 data
D10 zeros	
D11 zeros
D12 zeros
D13 zeros
D14 zeros
D15 zeros

There are two problems:
- To be able to see data I set the DPi pins with pin-muxes in the Linux device tree to enable the DPI pins as R5 FW does not enable them for some reason. See the device tree below:

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2023 FOXFOUR AI
 * Author: Denys Datsko <denys.datsko@foxfour.ai>
 */

/dts-v1/;

#include <dt-bindings/leds/leds-pca9532.h>
#include <dt-bindings/mux/ti-serdes.h>
#include <dt-bindings/phy/phy.h>
#include "k3-am68-phycore-som.dtsi"

/ {
  compatible = "am68-cvbs-carrier-board",
    "ti,j721s2";

  aliases {
    mmc1 = &main_sdhci1;
    serial0 = &mcu_uart0;
  };

  chosen {
    stdout-path = "serial3:115200n8";
    bootargs = "console=ttyS3,115200n8 earlycon=ns16550a,mmio32,0x2830000";
  };

  vcc_12v0: regulator-12v0 {
    /* main supply */
    compatible = "regulator-fixed";
    regulator-name = "VCC_IN";
    regulator-min-microvolt = <12000000>;
    regulator-max-microvolt = <12000000>;
    regulator-always-on;
    regulator-boot-on;
  };

  vcc_1v8: regulator-vcc-1v8 {
    /* Output of TLV7158P */
    compatible = "regulator-fixed";
    regulator-name = "VCC_1V8";
    regulator-min-microvolt = <1800000>;
    regulator-max-microvolt = <1800000>;
    regulator-always-on;
    regulator-boot-on;
    vin-supply = <&vcc_3v3>;
  };

  vcc_3v3: regulator-vcc-3v3 {
    /* Output of SiC431 */
    compatible = "regulator-fixed";
    regulator-name = "VCC_3V3";
    regulator-min-microvolt = <3300000>;
    regulator-max-microvolt = <3300000>;
    regulator-always-on;
    regulator-boot-on;
    vin-supply = <&vcc_5v0>;
  };

  vcc_5v0: regulator-vcc-5v0 {
    /* Output of LM5116 */
    compatible = "regulator-fixed";
    regulator-name = "VCC_5V0";
    regulator-min-microvolt = <5000000>;
    regulator-max-microvolt = <5000000>;
    regulator-always-on;
    regulator-boot-on;
    vin-supply = <&vcc_12v0>;
  };
};

&main_pmx0 {
  main_i2c4_pins_default: main-i2c4-pins-default {
    pinctrl-single,pins = <
      J721S2_IOPAD(0x014, PIN_INPUT_PULLUP, 8) /* (AD25) MCAN14_TX.I2C4_SCL */
      J721S2_IOPAD(0x010, PIN_INPUT_PULLUP, 8) /* (AF28) MCAN13_RX.I2C4_SDA */
    >;
  };

  main_i2c1_pins_default: main-i2c1-pins-default {
    pinctrl-single,pins = <
	    J721S2_IOPAD(0x0ac, PIN_INPUT, 13) /* (AC25) MCASP0_AXR15.I2C1_SCL */
	    J721S2_IOPAD(0x0b0, PIN_INPUT, 13) /* (AD26) MCASP1_AXR3.I2C1_SDA */
    >;
  };

  main_mmc1_pins_default: main-mmc1-pins-default {
    pinctrl-single,pins = <
      J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
      J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */
      J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */
      J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */
      J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
      J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */
      J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */
      J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */
    >;
  };
 
  // TODO: double check that the pinout os correct and that there are no conflicts with other peripherals!!!
  main_dpi0_pins_default: main-dpi0-pins-default {
    pinctrl-single,pins = <
      J721S2_IOPAD(0x088, PIN_OUTPUT, 2) /* (AD27) MCASP0_AXR6.VOUT0_VSYNC */
      J721S2_IOPAD(0x080, PIN_OUTPUT, 2) /* (U26) MCASP0_AXR4.VOUT0_HSYNC */
      J721S2_IOPAD(0x074, PIN_OUTPUT, 2) /* (R28) MCAN2_TX.VOUT0_DATA0 */
      J721S2_IOPAD(0x078, PIN_OUTPUT, 2) /* (Y25) MCAN2_RX.VOUT0_PCLK */
      J721S2_IOPAD(0x070, PIN_OUTPUT, 2) /* (R27) MCAN1_RX.VOUT0_DATA1 */
      J721S2_IOPAD(0x07C, PIN_OUTPUT, 2) /* (T27) MCASP0_AXR3.VOUT0_DATA2 */
      J721S2_IOPAD(0x068, PIN_OUTPUT, 2) /* (U28) MCAN0_RX.VOUT0_DATA3 */
      J721S2_IOPAD(0x064, PIN_OUTPUT, 2) /* (W28) MCAN0_TX.VOUT0_DATA4 */
      J721S2_IOPAD(0x060, PIN_OUTPUT, 2) /* (AC27) MCASP2_AXR1.VOUT0_DATA5 */
      J721S2_IOPAD(0x05C, PIN_OUTPUT, 2) /* (AA26) MCASP2_AXR0.VOUT0_DATA6 */
      J721S2_IOPAD(0x058, PIN_OUTPUT, 2) /* (AA27) MCASP2_AFSX.VOUT0_DATA7 */
      J721S2_IOPAD(0x054, PIN_OUTPUT, 2) /* (Y27) MCASP2_ACLKX.VOUT0_DATA8 */
      J721S2_IOPAD(0x050, PIN_OUTPUT, 2) /* (W27) MCASP1_AXR2.VOUT0_DATA9 */
      J721S2_IOPAD(0x04C, PIN_OUTPUT, 2) /* (V27) MCASP1_AXR1.VOUT0_DATA10 */
      J721S2_IOPAD(0x048, PIN_OUTPUT, 2) /* (AB27) MCASP0_AXR2.VOUT0_DATA11 */
      J721S2_IOPAD(0x044, PIN_OUTPUT, 2) /* (Y27) MCASP0_AXR1.VOUT0_DATA12 */
      J721S2_IOPAD(0x040, PIN_OUTPUT, 2) /* (AC28) MCASP0_AXR0.VOUT0_DATA13 */
      J721S2_IOPAD(0x03C, PIN_OUTPUT, 2) /* (U27) MCASP0_AFSX.VOUT0_DATA14 */
      J721S2_IOPAD(0x038, PIN_OUTPUT, 2) /* (AB28) MCASP0_ACLKX.VOUT0_DATA15 */
      J721S2_IOPAD(0x0C8, PIN_OUTPUT, 2) /* (AD28) EXT_REFCLK1.VOUT0_DATA16 */
      J721S2_IOPAD(0x030, PIN_OUTPUT, 2) /* (T26) GPIO0_12.VOUT0_DATA17 */
      J721S2_IOPAD(0x02C, PIN_OUTPUT, 2) /* (V23) GPIO0_11.VOUT0_DATA18 */
      J721S2_IOPAD(0x028, PIN_OUTPUT, 2) /* (AB24) MCAN16_RX.VOUT0_DATA19 */
      J721S2_IOPAD(0x024, PIN_OUTPUT, 2) /* (Y28) MCAN16_TX.VOUT0_DATA20 */
      J721S2_IOPAD(0x020, PIN_OUTPUT, 2) /* (AA23) MCAN15_RX.VOUT0_DATA21 */
      J721S2_IOPAD(0x01C, PIN_OUTPUT, 2) /* (Y24) MCAN15_TX.VOUT0_DATA22 */
      J721S2_IOPAD(0x018, PIN_OUTPUT, 2) /* (W23) MCAN14_RX.VOUT0_DATA23 */
    >;
  };
};

&wkup_pmx0 {
  mcu_uart0_pins_default: mcu-uart0-pins-default {
    pinctrl-single,pins = <
      J721S2_WKUP_IOPAD(0x0f4, PIN_INPUT, 0) /* (C24) WKUP_GPIO0_13.MCU_UART0_RXD */
      J721S2_WKUP_IOPAD(0x0f0, PIN_OUTPUT, 0) /* (C25) WKUP_GPIO0_12.MCU_UART0_TXD */
    >;
  };

  wkup_uart0_pins_default: wkup-uart0-pins-default {
    pinctrl-single,pins = <
      J721S2_WKUP_IOPAD(0x0b0, PIN_INPUT, 0) /* (D28) WKUP_UART0_RXD */
      J721S2_WKUP_IOPAD(0x0b4, PIN_OUTPUT, 0) /* (D27) WKUP_UART0_TXD */
    >;
  };
};

&cdns_csi2rx1 {
  status = "disabled";
};


&i2c_som_rtc {
  enable-level-switching-mode;
  trickle-resistor-ohms = <3000>;
};

&main_gpio0 {
  status = "okay";
  // Just setting pins here so that they are configured. Maybe there is a better place for this
  pinctrl-names = "default";
  pinctrl-0 = <&main_dpi0_pins_default>;
};

&main_gpio2 {
  status = "disabled";
};

&main_gpio4 {
  status = "disabled";
};

&main_gpio6 {
  status = "disabled";
};

&wkup_gpio1 {
  status = "disabled";
};

&main_i2c1 {
  status = "okay";
  pinctrl-names = "default";
  clock-frequency = <400000>;
  pinctrl-0 = <&main_i2c1_pins_default>;
  #address-cells = <1>;
  #size-cells = <0>;
};

&main_i2c2 {
  status = "disabled";
};

&main_i2c3 {
  status = "disabled";
};

/* CSI0 + RPI */
&main_i2c4 {
  pinctrl-names = "default";
  pinctrl-0 = <&main_i2c4_pins_default>;
};

/* CSI1 + PCIe */
&main_i2c5 {
  status = "disabled";
};

&main_i2c6 {
  status = "disabled";
};

&main_mcan0 {
  status = "disabled";
};

&main_mcan1 {
  status = "disabled";
};

&main_mcan2 {
  status = "disabled";
};

&main_mcan3 {
  status = "disabled";
};

&main_mcan4 {
  status = "disabled";
};

&main_mcan5 {
  status = "disabled";
};

&main_mcan6 {
  status = "disabled";
};

&main_mcan7 {
  status = "disabled";
};

&main_mcan8 {
  status = "disabled";
};

&main_mcan9 {
  status = "disabled";
};

&main_mcan10 {
  status = "disabled";
};

&main_mcan11 {
  status = "disabled";
};

&main_mcan12 {
  status = "disabled";
};

&main_mcan13 {
  status = "disabled";
};

&main_mcan14 {
  status = "disabled";
};

&main_mcan15 {
  status = "disabled";
};

&main_mcan16 {
  status = "disabled";
};

&main_mcan17 {
  status = "disabled";
};

/* SD-Card */
&main_sdhci1 {
  pinctrl-0 = <&main_mmc1_pins_default>;
  pinctrl-names = "default";
  disable-wp;
  vmmc-supply = <&vcc_3v3>;
  /* 1.8v broken on alpha HW */
  no-1-8-v;
};

&main_spi0 {
  status = "disabled";
};

&main_spi1 {
  status = "disabled";
};

&main_spi2 {
  status = "disabled";
};

&main_spi3 {
  status = "disabled";
};

&main_spi4 {
  status = "disabled";
};

&main_spi5 {
  status = "disabled";
};

&main_spi6 {
  status = "disabled";
};

&main_spi7 {
  status = "disabled";
};

&main_uart0 {
  status = "disabled";
};

&main_uart1 {
  status = "disabled";
};

&main_uart2 {
  status = "disabled";
};

&main_uart3 {
  status = "disabled";
};

&main_uart4 {
  status = "disabled";
};

&main_uart5 {
  status = "disabled";
};

&main_uart6 {
  status = "disabled";
};

&main_uart7 {
  status = "disabled";
};

&main_uart8 {
  status = "disabled";
};

&main_uart9 {
  status = "disabled";
};

&mcu_cpsw {
  status = "disabled";
};

&mcu_i2c1 {
  status = "disabled";
};

&mcu_mcan0 {
  status = "disabled";
};

&mcu_mcan1 {
  status = "disabled";
};

&mcu_spi0 {
  status = "disabled";
};

&mcu_spi1 {
  status = "disabled";
};

&mcu_spi2 {
  status = "disabled";
};

/* RPI-Header */
&mcu_uart0 {
  pinctrl-names = "default";
  pinctrl-0 = <&mcu_uart0_pins_default>;
};

&mhdp {
  status = "disabled";
  cdns,no-hpd;
};

&ospi1 {
  status = "disabled";
};

&pcie1_rc {
  status = "disabled";
};

&pcie1_ep {
  status = "disabled";
};

&serdes_ln_ctrl {
idle-states = <J721S2_SERDES0_LANE0_USB_SWAP>, <J721S2_SERDES0_LANE1_USB>,
          <J721S2_SERDES0_LANE2_IP4_UNUSED>, <J721S2_SERDES0_LANE3_IP4_UNUSED>;
};

&serdes_refclk {
  clock-frequency = <100000000>;
};

&serdes0 {
  serdes0_usb_link: phy@1 {
    reg = <1>;
    cdns,num-lanes = <2>;
    #phy-cells = <0>;
    cdns,phy-type = <PHY_TYPE_USB3>;
    resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>;
  };
};

&torrent_phy_dp {
  status = "disabled";
};

&tscadc0 {
  status = "okay";

  adc {
    ti,adc-channels = <0 1 2 3 4 5 6 7>;
  };
};

&tscadc1 {
  status = "okay";

  adc {
    ti,adc-channels = <3 4 5 6 7>;
  };
};

&usbss0 {
  ti,vbus-divider;
  ti,usb2-only;
};

&usb0 {
  dr_mode = "host";
  maximum-speed = "high-speed";
};

&usb_serdes_mux {
  idle-states = <1>; /* SHould be USB0 to SERDES lane 1, but need to check */
};

/* Shared with firmware debug messages */
&wkup_uart0 {
  pinctrl-names = "default";
  pinctrl-0 = <&wkup_uart0_pins_default>;
  status = "reserved";
};

- The second problem is that the vpParams.videoIfWidth parameter does not affect the number of lanes used in DPI. I tried the next three options. Oscilloscope shows that the same 10 lanes are used.

vpParams.videoIfWidth = APP_DCTRL_VIFW_8BIT;
vpParams.videoIfWidth = APP_DCTRL_VIFW_16BIT;
vpParams.videoIfWidth = APP_DCTRL_VIFW_24BIT;

For your interest, here is the Clock config:

root@j721s2-evm:/opt/edgeai-gst-apps# k3conf dump devices | grep DSS
|   154     | J721S2_DEV_DSS_DSI0                                 | DEVICE_STATE_ON  |
|   155     | J721S2_DEV_DSS_DSI1                                 | DEVICE_STATE_OFF |
|   156     | J721S2_DEV_DSS_EDP0                                 | DEVICE_STATE_OFF |
|   158     | J721S2_DEV_DSS0                                     | DEVICE_STATE_ON  |
|   253     | J721S2_DEV_NAVSS0_MODSS                             | DEVICE_STATE_ON  |
|   254     | J721S2_DEV_NAVSS0_MODSS_INTA_0                      | DEVICE_STATE_ON  |
|   255     | J721S2_DEV_NAVSS0_MODSS_INTA_1                      | DEVICE_STATE_ON  |
|   270     | J721S2_DEV_MCU_NAVSS0_MODSS                         | DEVICE_STATE_ON  |
root@j721s2-evm:/opt/edgeai-gst-apps# k3conf dump clocks | grep 158 # J721S2_DEV_DSS0
|   158     |     0    | DEV_DSS0_DSS_FUNC_CLK                                                             | CLK_STATE_READY     | 600000000       |
|   158     |     1    | DEV_DSS0_DSS_INST0_DPI_0_IN_CLK                                                   | CLK_STATE_READY     | 297000000       |
|   158     |     2    | DEV_DSS0_DSS_INST0_DPI_0_IN_2X_CLK                                                | CLK_STATE_READY     | 594000000       |
|   158     |     3    | DEV_DSS0_DSS_INST0_DPI_0_IN_2X_CLK_PARENT_HSDIV1_16FFT_MAIN_16_HSDIVOUT0_CLK      | CLK_STATE_READY     | 594000000       |
|   158     |     4    | DEV_DSS0_DSS_INST0_DPI_0_IN_2X_CLK_PARENT_DPI_1_PCLK_SEL_OUT0                     | CLK_STATE_READY     | 27000000        |
|   158     |     5    | DEV_DSS0_DSS_INST0_DPI_1_IN_2X_CLK                                                | CLK_STATE_READY     | 27000000        |
|   158     |     6    | DEV_DSS0_DSS_INST0_DPI_1_IN_2X_CLK_PARENT_HSDIV1_16FFT_MAIN_17_HSDIVOUT0_CLK      | CLK_STATE_READY     | 594000000       |
|   158     |     7    | DEV_DSS0_DSS_INST0_DPI_1_IN_2X_CLK_PARENT_DPI0_EXT_CLKSEL_OUT0                    | CLK_STATE_READY     | 27000000        |
|   158     |     8    | DEV_DSS0_DSS_INST0_DPI_1_IN_2X_CLK_PARENT_DPI0_EXT_CLKSEL_OUT0_DUP0               | CLK_STATE_READY     | 27000000        |
|   158     |     9    | DEV_DSS0_DSS_INST0_DPI_1_IN_2X_CLK_PARENT_HSDIV1_16FFT_MAIN_16_HSDIVOUT0_CLK      | CLK_STATE_READY     | 594000000       |
|   158     |    10    | DEV_DSS0_DSS_INST0_DPI_2_IN_CLK                                                   | CLK_STATE_READY     | 297000000       |
|   158     |    11    | DEV_DSS0_DSS_INST0_DPI_2_IN_CLK_PARENT_HSDIV1_16FFT_MAIN_16_HSDIVOUT0_CLK         | CLK_STATE_READY     | 297000000       |
|   158     |    12    | DEV_DSS0_DSS_INST0_DPI_2_IN_CLK_PARENT_HSDIV1_16FFT_MAIN_17_HSDIVOUT0_CLK         | CLK_STATE_READY     | 297000000       |
|   158     |    13    | DEV_DSS0_DSS_INST0_DPI_2_IN_CLK_PARENT_DPI0_EXT_CLKSEL_OUT0                       | CLK_STATE_READY     | 13500000        |
|   158     |    14    | DEV_DSS0_DSS_INST0_DPI_2_IN_2X_CLK                                                | CLK_STATE_READY     | 594000000       |
|   158     |    15    | DEV_DSS0_DSS_INST0_DPI_2_IN_2X_CLK_PARENT_HSDIV1_16FFT_MAIN_16_HSDIVOUT0_CLK      | CLK_STATE_READY     | 594000000       |
|   158     |    16    | DEV_DSS0_DSS_INST0_DPI_2_IN_2X_CLK_PARENT_HSDIV1_16FFT_MAIN_17_HSDIVOUT0_CLK      | CLK_STATE_READY     | 594000000       |
|   158     |    17    | DEV_DSS0_DSS_INST0_DPI_2_IN_2X_CLK_PARENT_DPI0_EXT_CLKSEL_OUT0                    | CLK_STATE_READY     | 27000000        |
|   158     |    18    | DEV_DSS0_DSS_INST0_DPI_3_IN_2X_CLK                                                | CLK_STATE_READY     | 594000000       |
|   158     |    19    | DEV_DSS0_DSS_INST0_DPI_3_IN_2X_CLK_PARENT_HSDIV1_16FFT_MAIN_16_HSDIVOUT1_CLK      | CLK_STATE_READY     | 594000000       |
|   158     |    20    | DEV_DSS0_DSS_INST0_DPI_3_IN_2X_CLK_PARENT_HSDIV1_16FFT_MAIN_17_HSDIVOUT1_CLK      | CLK_STATE_READY     | 594000000       |
|   158     |    21    | DEV_DSS0_DSS_INST0_DPI_3_IN_2X_CLK_PARENT_HSDIV1_16FFT_MAIN_17_HSDIVOUT1_CLK_DUP0 | CLK_STATE_READY     | 594000000       |
|   158     |    22    | DEV_DSS0_DSS_INST0_DPI_3_IN_2X_CLK_PARENT_DPI0_EXT_CLKSEL_OUT0                    | CLK_STATE_READY     | 27000000        |
|   158     |    23    | DEV_DSS0_DSS_INST0_DPI_3_IN_2X_CLK_PARENT_DPI0_EXT_CLKSEL_OUT0_DUP0               | CLK_STATE_READY     | 27000000        |
|   158     |    24    | DEV_DSS0_DSS_INST0_PARA_1_OUT_CLK                                                 | CLK_STATE_READY     | 0               |
|   158     |    25    | DEV_DSS0_DSS_INST0_PARA_3_OUT_CLK                                                 | CLK_STATE_READY     | 0               |
|   158     |    26    | DEV_DSS0_DSS_INST0_DPI_0_OUT_CLK                                                  | CLK_STATE_READY     | 0               |
|   158     |    27    | DEV_DSS0_DSS_INST0_DPI_1_OUT_CLK                                                  | CLK_STATE_READY     | 0               |
|   158     |    28    | DEV_DSS0_DSS_INST0_DPI_2_OUT_CLK                                                  | CLK_STATE_READY     | 0               |
|   158     |    29    | DEV_DSS0_DSS_INST0_DPI_3_OUT_CLK                                                  | CLK_STATE_READY     | 0               |
|   158     |    30    | DEV_DSS0_DSS_INST0_DPI_0_OUT_2X_CLK                                               | CLK_STATE_READY     | 0               |
root@j721s2-evm:/opt/edgeai-gst-apps# k3conf dump clocks | grep 154 # J721S2_DEV_DSS_DSI0
|   157     |   154    | DEV_BOARD0_AUDIO_EXT_REFCLK0_IN_PARENT_MCASP_MAIN_2_MCASP_AHCLKX_POUT             | CLK_STATE_READY     | 0               |
|   154     |     0    | DEV_DSS_DSI0_PLL_CTRL_CLK                                                         | CLK_STATE_READY     | 500000000       |
|   154     |     1    | DEV_DSS_DSI0_SYS_CLK                                                              | CLK_STATE_READY     | 250000000       |
|   154     |     2    | DEV_DSS_DSI0_DPHY_0_RX_ESC_CLK                                                    | CLK_STATE_READY     | 0               |
|   154     |     3    | DEV_DSS_DSI0_DPHY_0_TX_ESC_CLK                                                    | CLK_STATE_READY     | 20000000        |
|   154     |     4    | DEV_DSS_DSI0_DPI_0_CLK                                                            | CLK_STATE_READY     | 0               |
|   154     |     5    | DEV_DSS_DSI0_PPI_0_TXBYTECLKHS_CL_CLK                                             | CLK_STATE_READY     | 0               |

Please help me find out how to fix pinmux on R5, and how to change DPI to use 16 lanes.

Best regards,

Yuriy

Hi Yuriy,

If you are using BT output mode, then the number of data lines are fixed.. 

Regards,

Brijesh

Great that makes sense.
And what regarding the pin-mux?
Is it required to set DPI pin modes through the Linux device tree or should pinmuxing for DPI be configured by R5 core FW? 

On R5F, it should be taken care by app_utils/utils/misc/src/app_pinmux_j721e.c file, if appropriate flags are provided. 

OK, I will check the app_pinmux file.

I have good news, I was able to get a video stream through DPI. I was also able to convert some video to analog with ADV7393.

I used Table 65 from the ADV7393 datasheet as a setup example, but 0x00 set to 0x12 (PLL off) and 0x88 set to 0x10 (10-bit input) (works exactly the same with 8-bit). My register setup of ADV7393:

0x17 -> 0x02 // Software reset
0x00 -> 0x12 // DAC1 enabled, PLL off
0x01 -> 0x00 // SD input mode.
0x80 -> 0x10 // NTSC standard. SSAF luma filter enabled. 1.3 MHz chroma filter enabled.
0x82 -> 0xCB // Pixel data valid. CVBS/Y-C (S-Video) out. SSAF PrPb filter enabled. Active video edge control enabled. Pedestal enabled.
0x88 -> 0x10 // 10-bit input (no difference between 8-bit and 10-bit here observed)

On oscilloscope photo: signal on VOUT0_DATA5, 33ms between cursors, so 2 60Hz frames are seen with one being mostly zeros.
When the photo was taken, we were outputting constant red color (so I guess, both frames should've been the same)

The problem could be in the timings, or the output format.
My current setting on r5 core:

        prm.enableM2m            = true;
        /* Do not rely on "init". Always provide known good tmings */
        prm.timings.width = 720U;
        prm.timings.height = 480U;
        prm.timings.hFrontPorch = 16U;
        prm.timings.hBackPorch = 6U;
        prm.timings.hSyncLen = 267;
        prm.timings.vFrontPorch = 15U;
        prm.timings.vBackPorch = 5U;
        prm.timings.vSyncLen = 0U;
        prm.timings.pixelClock = 27000000ULL;

        vpParams.pixelClkPolarity = APP_DCTRL_EDGE_POL_FALLING;
        vpParams.dvoFormat = APP_DCTRL_DV_BT656_EMBSYNC;
        vpParams.videoIfWidth = APP_DCTRL_VIFW_10BIT;
        vpParams.scanFmt = FVID2_SF_INTERLACED;

Input Format -- 525i (NTSC)
Input Data Width1  -- 10-bit SDR
Synchronization Format -- EAV/SAV
Input Color Space   -- YCrCb
Output Color Space  -- CVBS/Y-C (S-Video)
     

Could you help figure out what is wrong with the input timings?

Hi,

We have not really validated interlaced output, so might require some changes.. 

Can we please get the DSS VP register dump and see if it is configured correctly, primarily, timing registers? 

Regards,

Brijesh

Could you give me instructions on how to gather the information you need?

Please save TIMING_H and TIMING_V registers of the VP you are using and share them.

How can I read them when I do not have a working JTAG?

Hi,

You can use the devmem tool of linux to read the values of this registors on the board.

Regards

Nikhil

As  I see I use Video Port 2 for DPI output.
Registers I read based on the j721s2 user reference manual table is DSS_VP2_TIMING_H and DSS_VP2_TIMING_V.

root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04AA0054 # DSS_VP2_TIMING_H
/dev/mem opened.
Memory mapped at address 0xffff96424000.
Read at address  0x04AA0054 (0xffff96424054): 0x0000000B
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04AA0058 # DSS_VP2_TIMING_V
/dev/mem opened.
Memory mapped at address 0xffffb5d60000.
Read at address  0x04AA0058 (0xffffb5d60058): 0x00500F01

To be sure I also checked other VP timings:

root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A80054 # DSS_VP1_TIMING_H
/dev/mem opened.
Memory mapped at address 0xffff9e927000.
Read at address  0x04A80054 (0xffff9e927054): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A80058 # DSS_VP1_TIMING_V
/dev/mem opened.
Memory mapped at address 0xffff96d52000.
Read at address  0x04A80058 (0xffff96d52058): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# 
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04AA0054 # DSS_VP2_TIMING_H
/dev/mem opened.
Memory mapped at address 0xffffa5793000.
Read at address  0x04AA0054 (0xffffa5793054): 0x0000000B
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04AA0058 # DSS_VP2_TIMING_V
/dev/mem opened.
Memory mapped at address 0xffff83a98000.
Read at address  0x04AA0058 (0xffff83a98058): 0x00500F01
root@j721s2-evm:/opt/edgeai-gst-apps# 
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04AC0054 # DSS_VP3_TIMING_H
/dev/mem opened.
Memory mapped at address 0xffff8eb3e000.
Read at address  0x04AC0054 (0xffff8eb3e054): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04AC0058 # DSS_VP3_TIMING_V
/dev/mem opened.
Memory mapped at address 0xffff91f1a000.
Read at address  0x04AC0058 (0xffff91f1a058): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# 
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04AE0054 # DSS_VP4_TIMING_H
/dev/mem opened.
Memory mapped at address 0xffff9c53d000.
Read at address  0x04AE0054 (0xffff9c53d054): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04AE0058 # DSS_VP4_TIMING_V
/dev/mem opened.
Memory mapped at address 0xffff9c40c000.
Read at address  0x04AE0058 (0xffff9c40c058): 0x00000000

My big apologies. I dumped the register with not working FW.
Here are the up-to-date register values:

root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04AA0054 # DSS_VP2_TIMING_H
/dev/mem opened.
Memory mapped at address 0xffffb458a000.
Read at address  0x04AA0054 (0xffffb458a054): 0x0060100B
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04AA0058 # DSS_VP2_TIMING_V
/dev/mem opened.
Memory mapped at address 0xffff8e7f3000.
Read at address  0x04AA0058 (0xffff8e7f3058): 0x00500F01

Also please note that I am using APP_DCTRL_DV_BT656_EMBSYNC and I see that for BT mode these registers are interpreted in a special way I see.

Hi,

Could you also please share the value of VP_CONFIG and VP_CONTROL register for this VP?

Regards,

Brijesh 

Here are all the registers that I think could be relevant:

root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04AA0000 # DSS_VP2_CONFIG
/dev/mem opened.
Memory mapped at address 0xffffbebbb000.
Read at address  0x04AA0000 (0xffffbebbb000): 0x03500000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04AA0004 # DSS_VP2_CONTROL
/dev/mem opened.
Memory mapped at address 0xffff84930000.
Read at address  0x04AA0004 (0xffff84930004): 0x00000741
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04AA0044 # DSS_VP2_LINE_NUMBER
/dev/mem opened.
Memory mapped at address 0xffff94c24000.
Read at address  0x04AA0044 (0xffff94c24044): 0x000001DB
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04AA004C # DSS_VP2_POL_FREQ
/dev/mem opened.
Memory mapped at address 0xffff9e380000.
Read at address  0x04AA004C (0xffff9e38004c): 0x00004000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04AA0050 # DSS_VP2_SIZE_SCREEN
/dev/mem opened.
Memory mapped at address 0xffff8f0d1000.
Read at address  0x04AA0050 (0xffff8f0d1050): 0x00EF02CF
<ps# devmem2 0x04AA0054 # DSS_VP2_TIMING_H
/dev/mem opened.
Memory mapped at address 0xffff8b2c4000.
Read at address  0x04AA0054 (0xffff8b2c4054): 0x0060100B
<ps# devmem2 0x04AA0058 # DSS_VP2_TIMING_V
/dev/mem opened.
Memory mapped at address 0xffff9f120000.
Read at address  0x04AA0058 (0xffff9f120058): 0x00500F01

Hi Brijesh Jadav

How is your research going?
Do you need any additional information from me?

Best regards,
Yuriy

Hi Yuriy,

This does not correct. Can you please check below highlighted items, especially vertical blanking? Vertical blanking should be 22 lines and then you can use Delta_LPP to adjust line difference between even and odd field. 

Can you try setting even field blanking to 5 and 15 ie,  DSS_VP2_TIMING_H = 0x00500F0B and odd field blanking to 6 and 16, ie DSS_VP2_TIMING_V = 0x00601001? and then try adjusting Delta_LPP to either value1 or value2? 

VP2_CONFIG = 0x03500000

  - BT656 is enabled

  - Interlaced output is enabled

  -  Even field first is output

  - full range CSC output is enabled

DSS_VP2_CONTROL = 0x00000741

   - VP is enabled

   - DPI is anbled

   - output interface value is set 0x7, which is invalid

DSS_VP2_SIZE_SCREEN = 0x00EF02CF

   - Frame size is set to 720 x 240

   - DELTA_LPP is not set, so even and odd field are of same size

DSS_VP2_TIMING_H = 0x0060100B

DSS_VP2_TIMING_V = 0x00500F01

   - 268 horizontal clock cycle, for BT656, there are 134 pixels for horizontal blanking.

   - even field vertical blanking is set to 7 and 17

   - odd field vertical blanking is set to 5 and 15

Regards,

Brijesh

Changing the timings does not change anything visually. The image still is flashing with a green color.
Commands I use

devmem2 0x04AA0054 w 0x00500F0B # DSS_VP2_TIMING_H before 0x0060100B
devmem2 0x04AA0058 w 0x00601001 # DSS_VP2_TIMING_V before 0x00500F01

After this when I try adding DELTA_LPP in one or another mode it just adds a few glitchy lines in the black line on the bottom.

devmem2 0x04AA0050 w 0x00EF42CF # DSS_VP2_SIZE_SCREEN before 0x01DF02CF delta1
# or
devmem2 0x04AA0050 w 0x00EF82CF # DSS_VP2_SIZE_SCREEN before 0x01DF02CF delta2

ok, are you sure that the receiver is configured correct? Is it reporting some errors? or is there a status on receiving device to check the number of lines received or something?

There are no status registers or so.
The receiver is configured by the examples as so:

i2cset -y 1 0x2a 0x17 0x02 # Software reset.
i2cset -y 1 0x2a 0x82 0xC3 # SD PrPb SSAF filter + SD DAC Output 1 (Enable CVBS) + Data Valid
i2cset -y 1 0x2a 0x88 0x10 # 10-bit input enabled.

The second part of interlace data does not seem to be sent based on the plots from the oscilloscope.
The data from the oscilloscope was collected directly from the DPI pins of the j721s2 chip.

When I send the image only one upper half of it is visible on the display and it is two times zoomed on the vertical axe.

Also, I attached the datasheet to the ADV7393 analog chip I am using. Maybe it will help to find out what the problem is. 

ADV7393-datasheet.pdf

I already checked the ADV side, and everything is configured properly.

Here is the dump of the requested registers. And they all are zeros when the stream is not running:

root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A20028 # DSS_VIDL1_BA_0
/dev/mem opened.
Memory mapped at address 0xffffa6648000.
Read at address  0x04A20028 (0xffffa6648028): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A2002C # DSS_VIDL1_BA_1
/dev/mem opened.
Memory mapped at address 0xffffbd779000.
Read at address  0x04A2002C (0xffffbd77902c): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A20030 # DSS_VIDL1_BA_UV_0
/dev/mem opened.
Memory mapped at address 0xffffbe691000.
Read at address  0x04A20030 (0xffffbe691030): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A20034 # DSS_VIDL1_BA_UV_1
/dev/mem opened.
Memory mapped at address 0xffff97230000.
Read at address  0x04A20034 (0xffff97230034): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# 
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A30028 # DSS_VIDL2_BA_0
/dev/mem opened.
Memory mapped at address 0xffffb90a6000.
Read at address  0x04A30028 (0xffffb90a6028): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A3002C # DSS_VIDL2_BA_1
/dev/mem opened.
Memory mapped at address 0xffff8310a000.
Read at address  0x04A3002C (0xffff8310a02c): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A30030 # DSS_VIDL2_BA_UV_0
/dev/mem opened.
Memory mapped at address 0xffff9268e000.
Read at address  0x04A30030 (0xffff9268e030): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A30034 # DSS_VIDL2_BA_UV_1
/dev/mem opened.
Memory mapped at address 0xffffbe1e8000.
Read at address  0x04A30034 (0xffffbe1e8034): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# 
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A50028 # DSS_VID1_BA_0
/dev/mem opened.
Memory mapped at address 0xffffa05b7000.
Read at address  0x04A50028 (0xffffa05b7028): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A5002C # DSS_VID1_BA_1
/dev/mem opened.
Memory mapped at address 0xffff89ebc000.
Read at address  0x04A5002C (0xffff89ebc02c): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A50030 # DSS_VID1_BA_UV_0
/dev/mem opened.
Memory mapped at address 0xffffb02aa000.
Read at address  0x04A50030 (0xffffb02aa030): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A50034 # DSS_VID1_BA_UV_1
/dev/mem opened.
Memory mapped at address 0xffff84bb2000.
Read at address  0x04A50034 (0xffff84bb2034): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# 
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A60028 # DSS_VID2_BA_0
/dev/mem opened.
Memory mapped at address 0xffff88eb6000.
Read at address  0x04A60028 (0xffff88eb6028): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A6002C # DSS_VID2_BA_1
/dev/mem opened.
Memory mapped at address 0xffffb0add000.
Read at address  0x04A6002C (0xffffb0add02c): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A60030 # DSS_VID2_BA_UV_0
/dev/mem opened.
Memory mapped at address 0xffffb2a7c000.
Read at address  0x04A60030 (0xffffb2a7c030): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A60034 # DSS_VID2_BA_UV_1
/dev/mem opened.
Memory mapped at address 0xffff930de000.
Read at address  0x04A60034 (0xffff930de034): 0x00000000

When I start the stream some of them have some values:

root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A20028 # DSS_VIDL1_BA_0
/dev/mem opened.
Memory mapped at address 0xffff919bf000.
Read at address  0x04A20028 (0xffff919bf028): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A2002C # DSS_VIDL1_BA_1
/dev/mem opened.
Memory mapped at address 0xffff91570000.
Read at address  0x04A2002C (0xffff9157002c): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A20030 # DSS_VIDL1_BA_UV_0
/dev/mem opened.
Memory mapped at address 0xffff9989b000.
Read at address  0x04A20030 (0xffff9989b030): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A20034 # DSS_VIDL1_BA_UV_1
/dev/mem opened.
Memory mapped at address 0xffff7fdbd000.
Read at address  0x04A20034 (0xffff7fdbd034): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# 
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A30028 # DSS_VIDL2_BA_0
/dev/mem opened.
Memory mapped at address 0xffff80500000.
Read at address  0x04A30028 (0xffff80500028): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A3002C # DSS_VIDL2_BA_1
/dev/mem opened.
Memory mapped at address 0xffff9b468000.
Read at address  0x04A3002C (0xffff9b46802c): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A30030 # DSS_VIDL2_BA_UV_0
/dev/mem opened.
Memory mapped at address 0xffff9698b000.
Read at address  0x04A30030 (0xffff9698b030): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A30034 # DSS_VIDL2_BA_UV_1
/dev/mem opened.
Memory mapped at address 0xffffbc380000.
Read at address  0x04A30034 (0xffffbc380034): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# 
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A50028 # DSS_VID1_BA_0
/dev/mem opened.
Memory mapped at address 0xffff93b7f000.
Read at address  0x04A50028 (0xffff93b7f028): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A5002C # DSS_VID1_BA_1
/dev/mem opened.
Memory mapped at address 0xffff9c3bd000.
Read at address  0x04A5002C (0xffff9c3bd02c): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A50030 # DSS_VID1_BA_UV_0
/dev/mem opened.
Memory mapped at address 0xffffa41e8000.
Read at address  0x04A50030 (0xffffa41e8030): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A50034 # DSS_VID1_BA_UV_1
/dev/mem opened.
Memory mapped at address 0xffffb2b35000.
Read at address  0x04A50034 (0xffffb2b35034): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# 
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A60028 # DSS_VID2_BA_0
/dev/mem opened.
Memory mapped at address 0xffff8e714000.
Read at address  0x04A60028 (0xffff8e714028): 0xB8001000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A6002C # DSS_VID2_BA_1
/dev/mem opened.
Memory mapped at address 0xffff9514f000.
Read at address  0x04A6002C (0xffff9514f02c): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A60030 # DSS_VID2_BA_UV_0
/dev/mem opened.
Memory mapped at address 0xffff876e4000.
Read at address  0x04A60030 (0xffff876e4030): 0xB8055600
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A60034 # DSS_VID2_BA_UV_1
/dev/mem opened.
Memory mapped at address 0xffff8a04a000.
Read at address  0x04A60034 (0xffff8a04a034): 0x00000000

Hi Yuriv,

Below highlighted values are the issues. in case of interlaced frames, BA_1 registers should also have been set for the odd fields, but since they are set 0x0, you are seeing incorrect flickering output. If possible, can you please halt R5F core using CCS + JTAG and then set the same value as BA_0 in BA_1 and see it helps in getting correct output?

root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A60028 # DSS_VID2_BA_0
/dev/mem opened.
Memory mapped at address 0xffff8e714000.
Read at address 0x04A60028 (0xffff8e714028): 0xB8001000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A6002C # DSS_VID2_BA_1
/dev/mem opened.
Memory mapped at address 0xffff9514f000.
Read at address 0x04A6002C (0xffff9514f02c): 0x00000000
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A60030 # DSS_VID2_BA_UV_0
/dev/mem opened.
Memory mapped at address 0xffff876e4000.
Read at address 0x04A60030 (0xffff876e4030): 0xB8055600
root@j721s2-evm:/opt/edgeai-gst-apps# devmem2 0x04A60034 # DSS_VID2_BA_UV_1
/dev/mem opened.
Memory mapped at address 0xffff8a04a000.
Read at address 0x04A60034 (0xffff8a04a034): 0x00000000

Regards,

Brijesh