TDA4VP-Q1: Inquiry about ECC configuration in the LPDDR4

Mohamed Elsharnoy

Part Number: TDA4VP-Q1

Tool/software:

Dear TI team,

We would like to know if the ECC of the LPDDR4 in TDA4V Mid Plus SoC can be enabled only in the R5F of the MCU domain and disabled in the complete main domain.

Thanks and Best Regards.

over 1 year ago

0 Neehar Sawant over 1 year ago

TI__Mastermind 19160 points

Hi,

I have assigned your query to the appropriate engineer. Thank you for your patience.

Thanks,

Neehar

0 Kevin S over 1 year ago in reply to Neehar Sawant

TI__Mastermind 38170 points

Hi ,

The DDRSS ECC logic can be enabled for specific address regions (up to 3) of the LPDDR4 memory. See registers DDRSS_ECC_Rn_STR_ADDR_REG and DDRSS_ECC_Rn_END_ADDR_REG.

Thus, you would need to know which address region of the LPDDR4 memory that the R5F of the MCU domain has access to.

Regards,
Kevin

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TDA4VP-Q1: Inquiry about ECC configuration in the LPDDR4