AM6442: Should I add series resistance for GPMC?

Hello 

Thank you for the query.

The picture is not clear.

Please rpvide a clearer picture.

Regards,

Sreenivasa

Please see the follwing picture

In asynchronous Mode GPMC_CLK frequency =133.33 MHz.  DATA and Address may change once in every CS# period.

Hello 

Thank you for the updated picture.

Help me understand the signals you are considering the series resistors.

The max operating frequency may be a concern when the bus is interfaced to multiple devices and there could be layout challenges.

Regards,

Sreenivasa

The series resistors should be add? Is that better for SI?

Hello 

? ?? said:

The series resistors should be add? Is that better for SI?

Could help.

Start with 0R.

Performing simulations would be recommended.

Regards,

Sreenivasa

OK,add on every output signal close to SOC side?

Hello, 

Mat be at the T joint for each device.

Regards,

Sreenivasa

Is that putting on this position? 

Hello,

Thank you.

The recommendation is to shift the resistor after the T joint and add 2 resistors for signals that are shared and a single resistor for signals that are connected directly.

Regards,

Sreenivasa

For T joint,put two RES for each device like this after joint and close to joint.;

For directly connection,put one RES close to source device.

Have I understood correctly?Thanks.

hello 

The suggestion would be to provide series resistor after the T joint for both input.

The T joint should be balanced.

The placement can be at the start of the joint if no simulations are performed. or can be placed based on the simulation results.

Regards,

Sreenivasa

Sorry,I'm confused.Could you please help to mark the QTY and position for the resistor,thanks.

Hello 

Please refer below 

For signals that does not have a T, add series resistor near to the source.

Regards,

Sreenivasa

Thank you for the reply.

For Address is clear,but for DATA signal,it's bi-direction,how to place the resistor?Thanks.

Hello 

Thank you.

The resistor will still be after the T Joint.

Place the resistor closer to the device that could see higher impedance mismatch.

This would require simulation or placing at the center between the SOC and the attached device.

Regards,

Sreenivasa

Hi Expert,

For DATA(bi-direction signal),There contains following signal flow,is that the T joint resistor are avaliable for all signal flow?Thanks.

Hello,

Thank you. 

? ?? said:

For DATA(bi-direction signal),There contains following signal flow,is that the T joint resistor are avaliable for all signal flow?Thanks.

Please eloborate.

One of the devices is selected at a time. This is a general approach. Specific approach includes analysis/simulation.

Regards,

Sreenivasa

I'm sorry.I didn't understand your reply.Could you please help to explanation again.Thanks.

Hello 

I would expect you to use 2 resistors any time there is a T.

The location of the resistor could be different for address, control and data.

The location depends on the design and analysis will be required.

Regards,

Sreenivasa

Thanks.

One more question related to GPMC is the A[0] is MSB or LSB?

Hello 

Please refer to the below section for the supported interfaces.

12.3.3.4.13.2.1 Supported Memories or Devices

Regards,

Sreenivasa

I found that,it seems that LSB is from A[0]

Does the GPMC support this NVRAM.datasheet attached,thanks for your patient.

nvram_MC90NP04M33B48E(S)CH_H_grade.pdf

Hello 

? ?? said:

I found that,it seems that LSB is from A[0]

Noted.

? ?? said:

Does the GPMC support this NVRAM.datasheet attached,thanks for your patient.

We do not make part recommendations.

Regards,

Sreenivasa