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TDA4VM: SBL Boot time measurement

Part Number: TDA4VM

Tool/software:

1. Hardware : TDA4 (TI EVM) GP EVM 

2. SDK: 0902

3.BOOT_MODE : SBL(OSPI) 

   filename:sbl_ospi_img_mcu1_0_release.tiimage

   filesize: 328KB 

4.BOOT_APP(MCU1_0):    

   filename:vx_app_rtos_linux_mcu1_0.appimage
   filesize: 263KB

5. POST bypass( MCU8_BOOTPIN : 1 MCU9_BOOTPIN : 1)

My requirement: The target can send CAN messages within 75ms after power-on, and the CAN messages are sent in BOOT_APP(MCU1_0)

I don't know why the measured data is so different from the official data.

The official data for measuring SBL are as follows

The SBL data I measured are as follows:

Measurement methods:

1.

2.

3.

4.

5....

  • Hi,

    I don't know why the measured data is so different from the official data.

    I'll look into this and get back to you.

    Regards,

    Karthik

  • Hi,

    The official data for measuring SBL are as follows

    We can able to get correct value our side.

                                                                                                                             
                                                                                                                             
    Time elapsed since start of SBL:     20491us                                                                             
    fxn:boot_perf_test_main cycles:  20491608                                                                                
                                                                                                                             
    Attempting board config ...BOARD_INIT_PLL_MAIN ...passed
    BOARD_INIT_MODULE_CLOCK_MAIN...passed
    BOARD_INIT_DDR...passed
    
    Analyzing run results .... 
    Now Try disabling the following one by one in sbl_component.mk to reduce a little more boot time.
    SBL_ENABLE_PLL (big impact to boot time), SBL_ENABLE_DDR (must be disabled if SBL_ENABLE_PLL is disable), SBL_ENABLE_CLOCKS(least imapct).
    Please remember to assess impact of removing PLL init, DDR init (does your app need DDR?) and clock init (does your app use PHYs??) on your app. 
    As a last resort, enable (uncomment) SBL_SKIP_BRD_CFG_PM
    Once enabled, all SBL UART logs will be garbled. Remember to call Sciclient_boardCfgPm from the app to get Uart_printf to work.
                                                                                              +-----------------------------+
    Profiling info ....                                                                       |                             |
    MCU @ 1000000000Hz.                                                                       |  Cannot open /dev/ttyUSB1!  |
    cycles per usec  = 1000                                                                   |                             |
      fxn:                            main  line: 262       cycle:    507523        timestamp:+-----------------------------+
      fxn:               SBL_SciClientInit  line: 387       cycle:    543276        timestamp:       543us
      fxn:               SBL_SciClientInit  line: 401       cycle:   8812527        timestamp:      8812us
      fxn:               SBL_SciClientInit  line: 416       cycle:  12870445        timestamp:     12870us
      fxn:               SBL_SciClientInit  line: 433       cycle:  16034303        timestamp:     16034us
      fxn:               SBL_SciClientInit  line: 439       cycle:  18042855        timestamp:     18042us
    **fxn:         SBL_SciclientBoardCfgPm  line: 239       cycle:       102        timestamp:         0us
      fxn:               SBL_SciClientInit  line: 445       cycle:    122612        timestamp:       122us
      fxn:               SBL_SciClientInit  line: 453       cycle:   5625692        timestamp:      5625us
      fxn:                            main  line: 347       cycle:   6383833        timestamp:      6383us
      fxn:                            main  line: 362       cycle:   9201989        timestamp:      9201us
      fxn:                            main  line: 388       cycle:  10541725        timestamp:     10541us
      fxn:               SBL_OSPIBootImage  line: 639       cycle:  11578740        timestamp:     11578us
      fxn:               SBL_OSPIBootImage  line: 647       cycle:  13857136        timestamp:     13857us
      fxn:        SBL_VerifyMulticoreImage  line: 344       cycle:  17191036        timestamp:     17191us
      fxn:                            main  line: 478       cycle:  19788833        timestamp:     19788us
      fxn:                            main  line: 509       cycle:  19788997        timestamp:     19788us
    
     NOTE : Below numbers will be corrupted if SBL_ADD_PROFILE_POINT is added anywhere 
    
               ------- SBL Boot Performance Info overview -------  
    
    SBL : SBL_SciClientInit: ReadSysfwImage                 : 8.269ms
    Load/Start SYSFW                                        : 4.058ms
    Sciclient_init                                          : 3.164ms
    Board Config                                            : 2.008ms
    PM Config                                               : 0.122ms
    Security Config                                         : 5.503ms
    RM Config                                               : 0.758ms
    SBL: Board_init (pinmux)                                : 2.818ms
    SBL: Board_init (PLL)                                   : 1.340ms
    SBL: Board_init (CLOCKS)                                : 1.037ms
    SBL: OSPI init                                          : 2.279ms
    OSPI PHY tuning time                                    : 3.334ms
    SBL: Parsing appimage and copy to MCU SRAM & Jump to App: 2.597ms
    Misc                                                    : 0.036ms
    Time taken to boot CAN application from SBL main : 37.323ms 
    Boot Performance test has passed
    

    I don't know why the measured data is so different from the official data.

    Please refer this procedure to run sbl boot time measurement  and let us know if this helps.

    ******************************Boot Performance test procedure************************
    step 1:
    
    Build sbl_boot_perf_cust_img_mcu1_0_release.tiimage by using the following command.
    
        make BOARD=<board_name> sbl_boot_perf_cust_img  -sj
        you can find the image in <pdk install path>/pdk/packages/ti/boot/sbl/binary/<board_name>/cust/bin/
        
    
    step 2:
    
    Build sbl_baremetal_boot_perf_<board_name>_mcu1_0TestApp_release.appimage by using the following command
    
        make BOARD=<board_name> CORE=mcu1_0 sbl_boot_perf_test -sj
        you can find the image in <pdk install path>/pdk/packages/ti/boot/sbl/example/k3MulticoreApp/binary/<soc_name>/
    
    step 3:
    
    Change the boot switch settings to UART bootmode.
       
    step 4:
    
    Flash uart flash programmer (below commands are suitable for linux PC)
    
    sudo <path to uniflash tool>/uniflash_8.0.0/dslite.sh --mode processors -c /dev/ttyUSB* -f <path to uniflash tool>/uniflash_8.0.0/processors/FlashWriter/<board_name>/uart_<board_name>_flash_programmer_release.tiimage -i 0
    
    example:
     sudo ./dslite.sh --mode processors -c /dev/ttyUSB1 -f  <path to uniflash tool>/uniflash_8.7.0/processors/FlashWriter/j721e_evm/uart_j721e_evm_flash_programmer_release.tiimage -i 0
     
    step 5:
    
    Flash sbl_boot_perf_cust_img_mcu1_0_release.tiimage at 0x0
    
    sudo <path to uniflash tool>/uniflash_8.0.0/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk install path>/pdk/packages/ti/boot/sbl/binary/<board_name>/cust/bin/sbl_boot_perf_cust_img_mcu1_0_release.tiimage -d 3 -o 0
     
     example:
    sudo ./dslite.sh --mode processors -c /dev/ttyUSB1 -f <pdk>/packages/ti/boot/sbl/binary/j721e_evm/cust/bin/sbl_boot_perf_cust_img_mcu1_0_release.tiimage -d 3 -o 0
    
    
    step 6:
    
    Flash tifs.bin at 0x80000
    
        for j721e : sudo <path to uniflash tool>/uniflash_8.0.0/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk install path>/pdk/packages/ti/drv/sciclient/soc/V1/tifs.bin -d 3 -o 80000
     
    example:
    sudo ./dslite.sh --mode processors -c /dev/ttyUSB1 -f <pdk>/packages/ti/drv/sciclient/soc/V1/tifs.bin -d 3 -o 0x80000
        
    step 7:
    
    Flash sbl_baremetal_boot_perf_<board_name>_mcu1_0TestApp_release.appimage at 0x100000
    
        sudo  <path to uniflash tool>/uniflash_8.0.0/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk install path>/pdk/packages/ti/boot/sbl/example/k3MulticoreApp/binary/<SOC>/sbl_baremetal_boot_perf_test_<board_name>_mcu1_0TestApp_release.appimage -d 3 -o 100000
        
    example:
    sudo ./dslite.sh --mode processors -c /dev/ttyUSB1 -f <pdk>/packages/ti/boot/sbl/example/k3MulticoreApp/binary/j721e/sbl_baremetal_boot_perf_j721e_evm_mcu1_0TestApp_release.appimage -d 3 -o 0x100000
        
    step 8:
    
    Flash NOR spi pattern
    
        for j721e : sudo <path to uniflash tool>/uniflash_8.0.0/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk install path>/pdk/packages/ti/board/src/flash/nor/ospi/nor_spi_patterns.bin -d 3 -o 3FE0000
        
     example:   
     sudo ./dslite.sh --mode processors -c /dev/ttyUSB1 -f <pdk>/packages/ti/board/src/flash/nor/ospi/nor_spi_patterns.bin -d 3 -o 3FE0000
            
     
     step 9:
     
    /dev/ttyUSB* will be the second instance of MCU uart.
    
    
    step 10:
    
    Change the boot switch settings to OSPI boot.
    
    step 11:
    
    Power ON the board
    
    step 12:
    If you get some logs and All tests passed at the end on MCU uart then you can mark this test as passed.
    
    
    step 13:
    PASS string : Boot Performance test has passed
    
        
        
        
        
        

    Regards,

    Karthik

  • Thank you very much, I will test it according to your steps.

  • I compiled according to the steps you gave, and then used uboot to burn Norflash, but the test failed. Is there anything I did wrong?

    build:
    cp /autox_project/tda4/sbl_test_0902/PSDK_RTOS_0902/pdk_jacinto_09_02_00_30/packages/ti/boot/sbl/example/k3MulticoreApp/binary/j721e/sbl_baremetal_boot_perf_j721e_evm_mcu1_0TestApp_release.appimage /media/weilunmai/BOOT/perf_ap
    cp /autox_project/tda4/sbl_test_0902/PSDK_RTOS_0902/pdk_jacinto_09_02_00_30/packages/ti/boot/sbl/binary/j721e_evm/cust/bin/sbl_boot_perf_cust_img_mcu1_0_release.tiimage /media/weilunmai/BOOT/cust_tiboot3.bin
    
    
    write norflash:
    => fatload mmc 1 ${loadaddr} cust_tiboot3.bin 
    319975 bytes read in 43 ms (7.1 MiB/s)
    => sf update ${loadaddr} 0x0 0x${filesize}
    device 0 offset 0x0, size 0x4e1e7
    131072 bytes written, 188903 bytes skipped in 0.265s, speed 1222591 B/s
    => fatload mmc 1 ${loadaddr} perf_app        
    181436 bytes read in 40 ms (4.3 MiB/s)
    => sf update ${loadaddr} 0x100000 0x${filesize}
    device 0 offset 0x100000, size 0x2c4bc
    0 bytes written, 181436 bytes skipped in 0.4s, speed 26541494 B/s
    
    
    boot_log:
    Attempting board config ...BOARD_INIT_PLL_MAIN ...passed
    BOARD_INIT_MODULE_CLOCK_MAIN...passed
    BOARD_INIT_DDR...passed
    
    Analyzing run results .... 
    Boot time is now optimized....
    
    Profiling info ....
    MCU @ 1000000000Hz.
    cycles per usec  = 1000
      fxn:                            main  line: 318       cycle:    510027        timestamp:       510us
      fxn:               SBL_SciClientInit  line: 395       cycle:    545668        timestamp:       545us
      fxn:               SBL_SciClientInit  line: 409       cycle:   8815112        timestamp:      8815us
      fxn:               SBL_SciClientInit  line: 424       cycle:  12873109        timestamp:     12873us
      fxn:               SBL_SciClientInit  line: 441       cycle:  16037277        timestamp:     16037us
      fxn:               SBL_SciClientInit  line: 447       cycle:  18045959        timestamp:     18045us
    **fxn:         SBL_SciclientBoardCfgPm  line: 242       cycle:       106        timestamp:         0us
      fxn:               SBL_SciClientInit  line: 453       cycle:    122889        timestamp:       122us
      fxn:               SBL_SciClientInit  line: 461       cycle:   5625017        timestamp:      5625us
      fxn:                            main  line: 406       cycle:   6384022        timestamp:      6384us
      fxn:               SBL_OSPIBootImage  line: 639       cycle:   9681490        timestamp:      9681us
      fxn:               SBL_OSPIBootImage  line: 647       cycle:  12269440        timestamp:     12269us
      fxn:        SBL_VerifyMulticoreImage  line: 344       cycle:  15585592        timestamp:     15585us
      fxn:                            main  line: 563       cycle:  18176128        timestamp:     18176us
      fxn:                            main  line: 594       cycle:  18176289        timestamp:     18176us
    
     NOTE : Below numbers will be corrupted if SBL_ADD_PROFILE_POINT is added anywhere 
    
               ------- SBL Boot Performance Info overview -------  
    
    SBL : SBL_SciClientInit: ReadSysfwImage                 : 8.270ms
    Load/Start SYSFW                                        : 4.058ms
    Sciclient_init                                          : 3.164ms
    Board Config                                            : 2.008ms
    PM Config                                               : 0.122ms
    Security Config                                         : 5.503ms
    RM Config                                               : 0.759ms
    SBL: Board_init (pinmux)                                : 3.297ms
    SBL: Board_init (PLL)                                   : 2.588ms
    SBL: Board_init (CLOCKS)                                : 3.316ms
    SBL: OSPI init                                          : 2.591ms
    OSPI PHY tuning time                                    : 0.000ms
    SBL: Parsing appimage and copy to MCU SRAM & Jump to App: 4294949.000ms
    Misc                                                    : 0.035ms
    Time taken to boot CAN application from SBL main : 4294984.500ms 
    Boot Performance test has failed
    

  • Hi,

    I compiled according to the steps you gave, and then used uboot to burn Norflash, but the test failed. Is there anything I did wrong?

    It looks like you are using the emmc boot mode. If so, this will take more time than expected. Instead, please use the OSPI boot mode in accordance with the previously described procedure.

    Regards,

    Karthik

  • I just boot into uboot through MMCSD, and then burn the firmware to OSPI instead of using uart mode to burn OSPI, and then switch to OSPI boot after burning.

  • Hi,

    I just boot into uboot through MMCSD, and then burn the firmware to OSPI instead of using uart mode to burn OSPI, and then switch to OSPI boot after burning

    It appears that loading your app's image takes more time.Would you please try my app image and share it yours with me so I can try it on my end as well?

    sbl_baremetal_boot_perf_j721e_evm_mcu1_0TestApp_release.zip

    Regards,

    Karthik.

  • It was my SBL problem, I solved it, thank you.