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DM8168 EVM boot option

Maurizio6434
Intellectual 295 points

I need to better understand how to configure the 4bit  boot option switch of  the eval board.

In the web site:

http://processors.wiki.ti.com/index.php/DM816x_AM389x_PSP_U-Boot#NAND_boot_mode

it's shown this configuration:

NAND boot mode

SW3---->BTM[4:0] ==> 10010   (other pins should be 0 i.e. OFF)

In this case all the 4 bit GPMC related are all 0, but this means:

                  NAND is 8bit

                  Wait is disabled

                  Data and address are not muxed

I would like to understand why the NAND on the board is 16bit while here it's set to 8bit, I expect to have the bus size set to 1 to have a 16bit wide address.

Can somebody point to me any documentation that helps to better understand muxing?

 

  • 0
    TI__Expert 6175 points

    Maurizio,

    The width of the NAND can be determined by querying the NAND - one can initially start off at 8-bit and query the NAND, the NAND would respond with *** width, and then all further communication can be carried out at that width. That is why is is not mandatory to select that bit.

     

    Regards,

    Madan

  • 0 in reply to Madans
    TI__Intellectual 1265 points

    Maurizio,

    In the Uboot and Kernel, we were earlier supporting only 16-bit NAND flash. So we were not using the GPMC buswidth switch to configure anything. The NAND code was written so as to support 16-bit NAND.

    However, in our latest release, we have added support for 8-bit NAND also. In order to support both 8 and 16-bit NAND, we made use of the GPMC buswidth switch. But to maintain backward compatibility with our previous releases (where the switch was set to '0' and we were supporting 16 bit NAND), we have used the '0' value of switch for 16 bit NAND and '1' value for 8-bit NAND. This information is also mentioned exclusively in our release notes.

    Regards,

    Parth