• State
  • Locked Locked
  • Replies 3 replies
  • Subscribers 98 subscribers
  • Views 698 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SPI send with FIFO or DMA

Siheng Huang
Prodigy 20 points
Other Parts Discussed in Thread: OMAP3530

I am porting some software from MPC5200 to OMAP3530. The old hardware (MPC5200) has SPI hardware FIFO of 512 bytes and the software has a SPI packets of size 256 bytes.  So when FIFO is empty, it is big enough to store a whole SPI packet. Now for the OMAP3530, the SPI FIFO is only 32 bytes if shared between TX and RX. Is there a way to send the whole 256 bytes SPI packet data in one transaction? Will DMA do that?

Thanks a lot,

Siheng

  • 0
    TI__Mastermind 28215 points

    Siheng

    Yes, you can use the DMA to fill/empty the SPI FIFO in order to transmit/receive the complete packet.

      Paul

  • 0 in reply to PaulM
    Prodigy 20 points

    Paul, Thanks for the reply. I am new to OMAP 3530. I know that the DMA transfer has set up for size of packet. If I set the packet to be bigger than the SPI FIFO size (say 256 bytes), and start the transaction, will the DMA automatically take care of the transfer without overflowing the TX FIFO? On the other hand, if I use DMA on the RX size, will it automatically take care of the transfer without causing the the RX underflow?

    And what should be relationship between the DMA packet size and the SPI world count, TX almost empty and RX almost full alarm level?

    Thanks again,

    Siheng

  • 0 in reply to Siheng Huang
    TI__Mastermind 28215 points

    Siheng

     Checkout the SDMA chapter of the Technical reference manual, specifically the Addressing Modes subsection. This covers the addressing modes of the DMA and how it it would work for your scenario.

    basically the DMA transfer is a "block" and each block has a number of "frames" and each frame has a number of "elements" (aka words). 

    In your case you would;
    - define the DMA element to be 8-bits which should match the word size in the SPI FIFO.
    - define a frame to have X elements. X should be used as the threashold for the SPI FIFO.
    - define the block to have Y frames.

    X * Y should equal 256!  Therefore one possibility is X=8 and Y=32. Another is X=16, Y=16.

    No one DMA channel is configured to feed the entire 256 byte packet to (or from) the SPI FIFO.

      Paul