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TDA4VH-Q1: J784S4 PI Targets vs customer's result

Tony Tang
Mastermind 27231 points
Part Number: TDA4VH-Q1

Tool/software:

Customer got below PI simulation result:

#1. Margin on 3MHz seems not enough compare to TI provided reference. 

#2. >50MHz exceeds TI provided reference, and can't be reduced with current design.

I saw a similar post, my customer's result looks much better than this one:

 https://e2e.ti.com/e2eprivate/hyundai/hyundai-mobis_-_ep_automotive/f/hyundai-mobis-jacinto-forum/1393099/tda4ve-q1-pi-simulation-result

 Is my customer's PI Okay?

Regarding comments in upper post, I understand the first one is recommend to design with more current margin.

But how to do about #2 in design stage, it is more like test procedure. 

Max use case performance should be evaluated over SoC silicon fabrication process variations using split lot samples, voltage tolerances and full operational temperature range

  • 0
    TI__Expert 5845 points

    1. No additional margin is required for Z vs Freq response if the PI simulation has used the recommended 3-dimensional (3D) extraction for modelling PCB via inductance more accurately. Some PI sim tools use 2D or 2.5D extractions. The 2D & 2.5D Z responses will be more optimistic resulting in lower Z responses vs full 3D extractions.  The note shown below is taken from typical J7/TDA4X PI Sim Reports:

    "TI recommends using PI sim tools with 3-Dimensional (3D) modeling extraction for improved Z value accuracy above 3MHz. Benchmark sims using 2.5D extraction has shown lower Z sim values: 3% less at 3MHz, 10% less at 10MHz & 15% less ZT at 20MHz.  TI uses “Ansys SIwave” simulation tool with legacy PSI 3D extraction capabilities."

    2. >~50MHz the PCB's parasitic inductance begins to dominate the Z response. Most effective way to reduce PCB parasitic inductance is by reducing PCB thickness btw power floods vs Gnd returns.

  • 0 in reply to Bill McCracken
    Prodigy 156 points

    #1 Is TI 's Z value requirement  in 3D condition？

    We are using 2.5D tool, Is that mean  i need to recalculate the Z value: 

    For 3MHz,  I may get  Z*1.03

    For 10MHz,  I may get  Z*1.1

    For 20MHz,  I may get  Z*1.15

    #2 What if i cannot optimize Z value around 50MHz, will my board  work ok?

  • 0 in reply to Sai Wang
    TI__Guru**** 435235 points

    Hi Sai Wang,

    Any further questions on this thread? 

    Regards,

    Brijesh