PROCESSOR-SDK-J7200: OSPI issue in kernel and uboot

Hi Nikhil,

Nikhil k said:

IS25WP016D-JNLE spi

This is something we have not supported in the past. Could you check with flash vendor on U-Boot patches that needed to enable this flash?
Is this an OSPI part or a QSPI part? Also can you point me to the public data sheet?

- Keerthy

Hi Keerthy,

This is quadspi part, same part we have tested with Ti AM62A7 and it is working with quad mode, we have enabled necessary driver support for this.

Find the datasheet URL : https://www.issi.com/WW/pdf/25LP-WP016D.pdf

Regards,

Nikhil K

Hi Nikhil,

Can you share the dip switch settings for qspi mode that you are using? 

https://www.google.com/url?sa=t&source=web&rct=j&opi=89978449&url=https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1025985/faq-tda4vm-how-to-boot-from-qspi&ved=2ahUKEwjrrKOh7pGIAxWIzDgGHQMKJtQQFnoECBsQAQ&usg=AOvVaw1SAv0tdPdhjOE-BEEQGpgr

J721e settings are shown in the above FAQ.

Regards, 

Keerthy 

Dear Keerthy,

Since we are using custom board, we dont have option for QSPI boot, we just want to test qspi flash storage.
find the below attached image demonstrating our test procedure in uboot

Here data we  wrote is "0xAABBCCDD" but data read is "ffffffff", this issue is observed in QSPI mode only, in single I/O and Dual I/O mode data is read properly.

Regards,

Nikhil K

Hi Nikhil,

I will check with team internally and get back to you. 

Best Regards,

Keerthy 

Nikhil,

Could you share the patch that you added to enable the below flash part?

Nikhil k said:

Find the datasheet URL : https://www.issi.com/WW/pdf/25LP-WP016D.pdf

- Keerthy

Dear Keerthy,

Find the uboot changes for the QSPI flash

uboot changes for qspi
------------------------
file: configs/j7200_evm_a72_defconfig
+CONFIG_SPI_FLASH_ISSI=y


file: arch/arm/dts/k3-j7200-som-p0.dtsi

&wkup_pmx0 {

+        mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
+                pinctrl-single,pins = <
+                        J721E_WKUP_IOPAD(0x0, PIN_OUTPUT, 0) /* (B6) MCU_OSPI0_CLK */
+                        J721E_WKUP_IOPAD(0x2c, PIN_OUTPUT, 0) /* (D6) MCU_OSPI0_CSn0 */
+                        J721E_WKUP_IOPAD(0xc, PIN_INPUT, 0) /* (D8) MCU_OSPI0_D0 */  /* IO0 */
+                        J721E_WKUP_IOPAD(0x10, PIN_INPUT, 0) /* (C7) MCU_OSPI0_D1 */ /* IO1 */
+                        J721E_WKUP_IOPAD(0x14, PIN_INPUT, 0) /* (C5) MCU_OSPI0_D2 */ /* IO2 */
+                        J721E_WKUP_IOPAD(0x18, PIN_INPUT, 0) /* (A5) MCU_OSPI0_D3 */ /* IO3 */
+                >;
+        };
};

+&ospi0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
+        status="okay";
+
+        is25wp016d: flash@0 {
+                compatible = "jedec,spi-nor";
+                reg = <0x0>;
+                spi-tx-bus-width = <4>;
+                spi-rx-bus-width = <4>;
+                m25p,fast-read;
+                spi-max-frequency = <30000000>;
+                cdns,tshsl-ns = <60>;
+                cdns,tsd2d-ns = <60>;
+                cdns,tchsh-ns = <60>;
+                cdns,tslch-ns = <60>;
+                cdns,read-delay = <2>;
+                cdns,phy-mode;
+        };
+ };

Nikhil K

Hi Nikhil,

Thanks. I will get this reviewed internally with our SPI experts and get back to you early next week.

cdns,read-delay = <2>; Is this the right value for the QSPI part that you are using?

- Keerthy

Hi Keerthy,

Yes, same settings we have used in AM62A7 CPU.

Regards

Nikhil

Hello Nikhil,

Can you make spi-tx-bus-width = <1>;

Try the same. I checked internally and this is a good starting point to make tx-width 1.

There is no difference between OSPI0 on AM62A and OSPI0 IP on J7200. The same DT node should ideally work.

- Keerthy

Hi Keerthy,

The working settings are
                spi-tx-bus-width = <1>;
                spi-rx-bus-width = <1>;
and

                spi-tx-bus-width = <2>;
                spi-rx-bus-width = <2>;
Correct me if i am wrong, as i understood above modes are single wire and dual wire, but for testing in quad mode we need to specify.
                spi-tx-bus-width = <4>;
                spi-rx-bus-width = <4>;
so this quad mode is not working for us.

Regards,

Nikhil K

Hi Nikhil,

I understand the current issue. We want you to try the below:

spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;

Best Regards,
Keerthy

Hi Keerthy,

I have tried this testcase, but still the same issue

Regards,

Nikhil K

Nikhil,

Okay since we don't have this flash, I am checking with our internal spi expert and sharing debug information here. Could you please try to write 256 bytes. 

can you write in (RX=1, TX=1) , verify write and the switch to RX=4, TX=4 and try reading?

can you write in (RX=4, TX=4) , and then switch to RX=1, TX=1 and try reading?

Regards, 

Keerthy 

Hi Keerthy,

I'm able to read/write with 256bytes, even till minimum of 9bytes i can do read/write



but below 9bytes, not working.

Is there any specific reason for that

Keerthy J said:

can you write in (RX=1, TX=1) , verify write and the switch to RX=4, TX=4 and try reading?

can you write in (RX=4, TX=4) , and then switch to RX=1, TX=1 and try reading?

I have tried this same observation below 9bytes

Regards,

Nikhil K

Nikhil k said:

I'm able to read/write with 256bytes, even till minimum of 9bytes i can do read/write

Thanks NIkhil that is a good clue.

There is a patch to enable STIG mode reads for less than 8 bytes.

https://git.ti.com/cgit/ti-u-boot/ti-u-boot/commit/?h=ti-u-boot-2023.04&id=53f4ef0a4b809e6c147fb8deed03354631b2f564

If your U-Boot has the above patch, could you please revert and check?

- Keerthy

Hi Keerthy,

Seems like these changes worked for me, Kindly review this

Nikhil k said:

2. In kernel one time data read/write is working proper, but once unmounted and mounted file copied to spi device is getting corrupted  but the contents of file is proper, find the attachment of the testcase

Also did you get opportunity to look into this

Regards,

Nikhil K

Nikhil k said:

Seems like these changes worked for me, Kindly review this

These changes look fine. Glad that U-Boot is working as expected.

Nikhil k said:

opportunity

Typically cp works for some particular file systems like ext4. Have you formatted the mtd partition into some file system format?

Best Regards,

Keerthy 

Dear Keerthy,

while mounting the spi to /mnt folder we are using jffs2 filesystem, hence it will be in jfss2 format as i believe, only the file names getting corrupted but the content remain unaltered, this is strange..

Regards,

Nikhil K

Nikhil,

We haven't seen this behavior. Can you check once with the flash vendor?

Regards, 

Keerthy