TDA4VM: Can each SERDES interface be configured with an independent internal clock? If I configured SERDES1 as SGMII and SERDES3 with USB 3.0. Can they run simultaneously?

Hi Xingde,

We currently support in software the configurations listed in the SDK documentation for SERDES here: https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-jacinto7/10_00_00_08/exports/docs/linux/Foundational_Components/Kernel/Kernel_Drivers/SERDES/SERDES.html

Based on this, it looks like we do not have support for single protocol SGMII on the 2 lane SERDES (which are SERDES0 to 3). We instead have support for single protocol SGMII on SERDES4.

Therefore, you can run single protocol USB3.0 on SERDES3, but I would advise using SERDES4 for SGMII. And yes, each SERDES interface should generate or take its own clock.

Regards,

Takuma

Xingde,

We will discuss internally and get back to you on why single SGMII cannot be supported on 2-L SERDES or if you can use the SGMII+PCIe configuration for your test here.

From a h/w perspective, SGMII is supported on 2-L SERDES as well as 4-L SERDES.