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question about how to set the value of PLLM



I use C6678.  The section 2.5.3 of datasheet document  give a Table 2-13 told the relationship of BootMode、Input clock Freq、PLLM、Core Freq。

I've three questions:

1、I change the value of the SW5-SW6(in order to change the BOOTMODE),But the PPLM value doesn't change,why?

2、Does the Input Clock Freq is fixed?(I see the gel file use the Input Clock Freq as 100MHz, doesn't  change when the value of BOOTMODE change)

3、Are there two versions of C6678, one Core Freq is 1G and the other is 1.25G?

  • 1.  The SW5-SW6 setting for PLL do not change the input clock frequency, they identify the clock frequency for the boot code.  This information is used by the boot code to setup the PLL to achieve the proper core clock frequency.

    2.  The input clock is generated by a clock generator on the EVM.  That generator is programmed with a default value.  The default can be change but it requires some software to modify the registers in the clock generator.  Note that the software delivered with the EVM is expecting the default clock value and would have to be modified to support a change to the clock frequency.  What is the reason for the change?

    3.  All the present C6678 devices are 1GHz.  Once 1.25GHz devices are available they will have a 25 at the end of the part number.

  • 1、Does the boot code mean gel file?   The gel file doesn't care the value of the SW5-SW6, it setup the value of PLL use a marco value, never change.

    2、Maybe I want some core run at 800MHz

    3、OK,I understand.