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PROCESSOR-SDK-J721S2: Cannot repeat sequence headers with h264_v4l2m2m hardware encoder

Part Number: PROCESSOR-SDK-J721S2

Tool/software:

Hi,

I'm currently using the "h264_v4l2m2m" hw encoder to encode video in h264 format on TDA4 with the ffmpeg library and stream it using TCP.

The problem I'm facing is that I cannot join the stream in the middle of playback. The player needs to be present when the stream starts to have all the headers for playback.

I have been looking into the output stream and indeed there is no repeating of the SPS/PPS information: this information is only contained in the first frame of the stream.

I currently can't find a way to tell the hw encoder to repeat the SPS/PPS information, I have tried using the following v4l2 controls, without success:

  • V4L2_CID_MPEG_VIDEO_REPEAT_SEQ_HEADER -> this gives me an error since the control does not seem to be available in the wave5 driver.
  • V4L2_CID_MPEG_VIDEO_PREPEND_SPS_AND_PPS_TO_IDR -> this is correctly applied but I don't get more SPS/PPS information in the output stream.

Do you have any idea of how I could add this SPS/PPS information to frames with the hw encoder?

Thanks,

Matthieu

  • Hello Matthieu, 

    What SDK version are you using here? Do you have a constraint to only use V4L2?

    Our Linux SDK CODEC driver supports using GStreamer. The following command will set the IDR header information for each frame:

    • gst-launch-1.0 filesrc location=<inputfile_NV12.yuv> ! rawvideoparse width=1920 height=1080 format=nv12 framerate=30/1 colorimetry=bt601 ! v4l2h264enc extra-controls="enc,prepend_sps_and_pps_to_idr=1,video_gop_size=1" ! filesink location=<outputfile.264>

    BR,
    Sarabesh S.

  • We are using SDK 9.2

    We are using ffmpeg libraries directly from code, and ffmpeg is using a v4l2 wrapper to acces the encoder, so that's why we are trying v4l2 controls right now.

    Do you know if there is an equivalent to the gstreamer extra controls "enc,prepend_sps_and_pps_to_idr=1,video_gop_size=1" syntax in v4l2 control ?

  • Hi Matthieu, 

    Ok thanks for explaining. I tested this by modifying the 9.2 SDK CODEC driver and am able to confirm that IDR frame period was set for each encoded frame. The modifications are simple and can be applied from this patch. Apply with git apply <patch_file>.

    To enable header information the V4L2 controls that need to be set are

    • V4L2_CID_MPEG_VIDEO_PREPEND_SPS_AND_PPS_TO_IDR
    • V4L2_CID_MPEG_VIDEO_GOP_SIZE

    You were not setting the GOP control earlier.

    BR,
    Sarabesh S.

  • Thanks for the quick answer, we will try that and let you know the results.

    Matthieu

  • Sounds good. Just to record notes from the call: 

    It appears setting the V4L2 control values from ffmpeg is not producing the IDR frames. The suggestion is to modify the wave5-vpu-enc.c file with the patch directly. Will be notified of the results and if this resolves.

    BR,
    Sarabesh S.

  • Hardcoding the two values directly inside wave5-vpu-enc.c and recompiling works fine, thanks for your support Sarabesh.

    I'm still trying to make it work without having to hardcode the values in the driver though, ie. by setting the control from ffmpeg.

    I put some logs in the driver and in ffmpeg. I'm correctly sending 1 value to both controls from ffmpeg and they are correctly set in the driver. Though they are immediately put back to 0 afterwards and I can't find why. Would you know if something in the system could set them back to 0 everytime ?

  • Hi Matthieu,

    I am not sure how you are setting those values in ffmpeg- would you be able to share that? To my knowledge once those are set in the V4L2 driver they shouldn't be reset. Is it being reset immediately after setting or is it being reset after an encode/decode process? I will try to explore this internally.

    BR,
    Sarabesh S.