I posted this in the Multicore forum, and it didn't get much traction, so I am re-posting here.
I'm looking for a "how to" on how to share common code run on all cores of a multicore C64x+ or C66 DSP. For example, how to have BIOS code resident in shared memory, which all cores link to, and don't replicate, and have all fast application code resident in L1P? In one of the app notes the -r linker directive is mentioned, but how does that process work in with the XDC build process?
link to old thread: http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/439/t/138828.aspx
Thanks!