SYS/BIOS 6 Static Example on C6A8168 EVM

Zhao Li

Other Parts Discussed in Thread: SYSBIOS

Hi,

I am trying the SYS/BIOS 6 Static example on my C6A8168 EVM board after successfully running the Hello World example. I would expect some System_printf() statements on the Console to indicate the program is running correctly. But for some reason, i could not get it to display anything on the Console. It seems that the program is stuck in function idl0Fxn() because the finishFlag is not changed to TRUE in clk1Fxn().

The zip file of this directory is attached. Can some one please point out what could be the problem?

Thanks,

Zhao

2821.DSP_sysbios_Static_example.zip

over 14 years ago

0 Steven Connell over 14 years ago

TI__Mastermind 45025 points

Hi Zhao,

Can you ensure that the console is set to display CIO?

Thanks,

Steve

0 Zhao Li over 14 years ago in reply to Steven Connell

Expert 1675 points

Hi Steve,

Thanks for the reply. I checked and it is the CIO display. If I modify part of the program (because I suspect that the clk1Fxn() is not reached for some reason) as the following

* ======== idl0Fxn ========

Void idl0Fxn()

{

// if (finishFlag) {

System_printf(

"Calling BIOS_exit from idl0Fxn\n"

);

BIOS_exit(0);

// }

}

Then the Console display is like this:

[C674X_0] Running swi1Fxn

Running swi0Fxn

Running task0Fxn

Running task1Fxn

Calling BIOS_exit from idl0Fxn

This means my display is ok and part of the program is working. But I could not figure out why the clk1Fxn() is not called in the program. I also tried Task and Swi example that came with the CCS V5.1, they don't print out anything either. Only Hello World and Log example work which don't have clock function. I encountered these problems on DSP. On ARM Cotex A8, those functions work fine and I got display in Console as supposed to have.

Thanks,

Zhao

0 Shreyas Prasad85771 over 14 years ago in reply to Zhao Li

Prodigy 20 points

Hi Zhao,

Have you verified that your clock is ticking (and if your timers are ticking)? It seems that the code within finishFlag will only execute if the clock function has executed and set the flag to 'TRUE.' To check whether your clock is ticking you can use ROV (Tools-> ROV) and navigate to the 'Clock' ROV view. If your tick count is consistently '0' then your timers are probably not working.

The timers on C6A8168 must be initialized by a gel script if Linux is not running on the A8. FYI, Timer #3 is used by default on the DSP, so make sure that this timer is initialized if you haven't done this.

Regards,

Shreyas

0 Zhao Li over 14 years ago in reply to Shreyas Prasad85771

Expert 1675 points

Hi Shreyas,

It looks like my clock is not ticking. See attached jpg file. Can you please tell me where to look for Timer #3 configurations? I am using a standard GEL file evm816x.gel (attached) downloaded from Spectrum Digital. Also the program is a standard program that comes with CCSV5. It almost suggests that the hardware may have a problem. Please advise on how to diagnose the timer #3 issue.

Thanks,

Zhao

1663.evm816x.gel.txt

0 Zhao Li over 14 years ago in reply to Shreyas Prasad85771

Expert 1675 points

Hi Shreyas,

I used memory browser to check the Timer #3 configuration at 0x4804 2038 (timer 3 TCLR). It is 0x0. But it would not allow me to change it to 0x3. I don't know why it does not let me to turn it on this way. On the other hand, i was able to change Timer #1 TCLR at 0x4802 E038 from 0x3 to 0x0 and back.

I also played with Task example (mutex.c) and found that it will get the printf functions to the console if i comment out clock get_ticks while loop and the Tsk_sleep(10) function call in Task2(). Both Task and Static examples work fine on A8 core but failed on DSP core.

Please help to resolve this timer issue.

Thanks,

Zhao

0 Alan DeMars over 14 years ago in reply to Zhao Li

TI__Mastermind 30830 points

Zhao,

Try configuring the Clock module to use a different timer.

By default, Timer ID 0 is used, but this selection can be overridden by adding the following lines to your config script:

var Clock = xdc.useModule('ti.sysbios.knl.Clock');

Clock.timerId = 1; /* selects Timer ID 1 for use with the Clock module */

Alan

0 Zhao Li over 14 years ago in reply to Alan DeMars

Expert 1675 points

Hi Alan,

I tried your suggestion. It is not working. When I check the Timer register at 0x4802E038 (Timer 1 TLCR), it is 0x3, the Timer register at 0x48040038(Timer 2 TLCR) is 0x0, the Timer register at 0x48042038 (Timer 3 TLCR) is also 0x0. There is no change for those Timer Control Registers by using "Clock.timerId = 1". Maybe I used wrong addresses for the Timers.

Any other ideas?

Thanks,

Zhao

0 Alan DeMars over 14 years ago in reply to Zhao Li

TI__Mastermind 30830 points

There could be a mismatch between the clock frequency BIOS thinks the timers are being driven at and what they actually are.

We see this problem a lot.

I suspect your timers are being clocked at 32768 Hz but BIOS thinks they're being clocked at 27MHz.

Consequently, the period we set the timers to interrupt at will be EXTREMELY LONG.

If this is true, then adding the following lines to your config script will resolved the problem:

var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer');

Timer.extFreq.lo = 32768;

Timer.extFreq.hi = 0;

Alan

0 Alan DeMars over 14 years ago in reply to Alan DeMars

TI__Mastermind 30830 points

I looked in your GEL file but couldn't find anything related to setting up the timers.

Try adding the following 'enableTimers' function to your GEL file and then invoking it from the CCS 'scripts' menu before running your example.

Alan

#define CM_ALWON_TIMER_1_CLKCTRL    (PRCM_BASE_ADDR + 0x1570)
#define CM_ALWON_TIMER_2_CLKCTRL    (PRCM_BASE_ADDR + 0x1574)
#define CM_ALWON_TIMER_3_CLKCTRL    (PRCM_BASE_ADDR + 0x1578)
#define CM_ALWON_TIMER_4_CLKCTRL    (PRCM_BASE_ADDR + 0x157C)
#define CM_ALWON_TIMER_5_CLKCTRL    (PRCM_BASE_ADDR + 0x1580)
#define CM_ALWON_TIMER_6_CLKCTRL    (PRCM_BASE_ADDR + 0x1584)
#define CM_ALWON_TIMER_7_CLKCTRL    (PRCM_BASE_ADDR + 0x1588)

#define CM_TIMER1_CLKSEL             (PRCM_BASE_ADDR + 0x0390)
#define CM_TIMER2_CLKSEL             (PRCM_BASE_ADDR + 0x0394)
#define CM_TIMER3_CLKSEL             (PRCM_BASE_ADDR + 0x0398)
#define CM_TIMER4_CLKSEL             (PRCM_BASE_ADDR + 0x039C)
#define CM_TIMER5_CLKSEL             (PRCM_BASE_ADDR + 0x03A0)
#define CM_TIMER6_CLKSEL             (PRCM_BASE_ADDR + 0x03A4)
#define CM_TIMER7_CLKSEL             (PRCM_BASE_ADDR + 0x03A8)

hotmenu enableTimers()
{
    GEL_TextOut("\tPRCM for dmtimer Initialization in Progress \n","Output",1,1,1);

    WR_MEM_32(CM_ALWON_L3_SLOW_CLKSTCTRL, 2);

    WR_MEM_32(CM_ALWON_TIMER_1_CLKCTRL,   2);
    WR_MEM_32(CM_TIMER1_CLKSEL,   1); /* Use 32Khz source */
    /* Wait for IDLEST to read 0x0 indicating that the module is fully functional */
    while(((RD_MEM_32(CM_ALWON_TIMER_1_CLKCTRL)&0x30002)>>16)!=0);

    WR_MEM_32(CM_ALWON_TIMER_2_CLKCTRL,   2);
    WR_MEM_32(CM_TIMER2_CLKSEL,   1); /* Use 32Khz source */
    /* Wait for IDLEST to read 0x0 indicating that the module is fully functional */
    while(((RD_MEM_32(CM_ALWON_TIMER_2_CLKCTRL)&0x30002)>>16)!=0);

    WR_MEM_32(CM_ALWON_TIMER_3_CLKCTRL,   2);
    WR_MEM_32(CM_TIMER3_CLKSEL,   1); /* Use 32Khz source */
    /* Wait for IDLEST to read 0x0 indicating that the module is fully functional */
    while(((RD_MEM_32(CM_ALWON_TIMER_3_CLKCTRL)&0x30002)>>16)!=0);

    WR_MEM_32(CM_ALWON_TIMER_4_CLKCTRL,   2);
    WR_MEM_32(CM_TIMER4_CLKSEL,   1); /* Use 32Khz source */
    /* Wait for IDLEST to read 0x0 indicating that the module is fully functional */
    while(((RD_MEM_32(CM_ALWON_TIMER_4_CLKCTRL)&0x30002)>>16)!=0);

    WR_MEM_32(CM_ALWON_TIMER_5_CLKCTRL,   2);
    WR_MEM_32(CM_TIMER5_CLKSEL,   1); /* Use 32Khz source */
    /* Wait for IDLEST to read 0x0 indicating that the module is fully functional */
    while(((RD_MEM_32(CM_ALWON_TIMER_5_CLKCTRL)&0x30002)>>16)!=0);

    WR_MEM_32(CM_ALWON_TIMER_6_CLKCTRL,   2);
    WR_MEM_32(CM_TIMER6_CLKSEL,   1); /* Use 32Khz source */
    /* Wait for IDLEST to read 0x0 indicating that the module is fully functional */
    while(((RD_MEM_32(CM_ALWON_TIMER_6_CLKCTRL)&0x30002)>>16)!=0);

    WR_MEM_32(CM_ALWON_TIMER_7_CLKCTRL,   2);
    WR_MEM_32(CM_TIMER7_CLKSEL,   1); /* Use 32Khz source */
    /* Wait for IDLEST to read 0x0 indicating that the module is fully functional */
    while(((RD_MEM_32(CM_ALWON_TIMER_7_CLKCTRL)&0x30002)>>16)!=0);

    GEL_TextOut("\ttimer Accesses are PASSED \n","Output",1,1,1);
    GEL_TextOut("\ttimer Initialization in Done \n","Output",1,1,1);
}

0 Zhao Li over 14 years ago in reply to Alan DeMars

Expert 1675 points

Hi Alan,

Your script solved my problem!! Now my timer is ticking and all clock related examples are running as supposed to. Thanks a lot.

Can you elaborate on why you select TIMER clock to be external 32KHz clock in your GEL script?

Have you tried the Inter Processor Communication (IPC) message_multicore.c example on C6A8168 EVM or know someone have tried it before? I failed to get any results. I have yet to figure out why it failed. Please let me know if you have any clues on this MessageQ IPC example.

Thanks again,

Zhao

0 Steven Connell over 14 years ago in reply to Zhao Li

TI__Mastermind 45025 points

Zhao,

Zhao Li said:
Have you tried the Inter Processor Communication (IPC) message_multicore.c example on C6A8168 EVM or know someone have tried it before? I failed to get any results. I have yet to figure out why it failed. Please let me know if you have any clues on this MessageQ IPC example.

It sounds like your timer issue has been resolved. If so, can you please open up a new forum question for this? Also, be sure to note your versions of BIOS, IPC, XDC tools you are using in the post.

Thanks,

Steve

0 Alan DeMars over 14 years ago in reply to Steven Connell

TI__Mastermind 30830 points

Zhao,

In answer to you question regarding why we selected the 32.768KHz clock: That is the clock rate BIOS expects the timers to be run at AND that is the clock rate that is selected by the hardware during a reset.

And please mark this post answered if you feel that the clocking issue is now resolved.

Alan

Processors

Processors forum

SYS/BIOS 6 Static Example on C6A8168 EVM