TDA4VM: MCU_SPI0 under Linux

Lukasz Bittner said:

In k3-j721e-mcu-wakeup.dtsi file there is already present following node

mcu_spi0: spi@40300000 {

  compatible = "ti,am654-mcspi", "ti,omap4-mcspi";

  reg = <0x00 0x040300000 0x00 0x400>;

  interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>;

  #address-cells = <1>;

  #size-cells = <0>;

  power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>;

  clocks = <&k3_clks 274 0>;

  status = "disabled";

};

Hello,

have you removed status = "disabled" ?

Regards

Tarun Mukesh

Hi,

here 

Hello,

Lukasz Bittner said:

pinctrl-single,pins = <

    J721E_WKUP_IOPAD(0x90, PIN_INPUT, 0) /* (E27) MCU_SPI0_CLK */

    J721E_WKUP_IOPAD(0xe8, PIN_OUTPUT, 1) /* (H29) WKUP_GPIO0_14.MCU_SPI0_CS2 */

    J721E_WKUP_IOPAD(0x9c, PIN_OUTPUT, 0) /* (E25) WKUP_GPIO0_55.MCU_SPI0_CS0 */

    J721E_WKUP_IOPAD(0x94, PIN_OUTPUT, 0) /* (E24) MCU_SPI0_D0 */

    J721E

Are you using CS0 or CS2 ? 

and also can you change the max frequency ?

Lukasz Bittner said:

&mcu_spi0 {

  status = "okay";

  pinctrl-names = "default";

  pinctrl-0 = <&mcu_spi0_pins_default>;

  spidev@0 {

    compatible="rohm,dh2228fv";

    spi-max-frequency = <100000>;

    reg = <0x0>;

  };

                spi-max-frequency = <24000000>;

Regards

Tarun Mukesh

For now I'm using only CS0

I have found interesting thing. MOSI - master output/slave input - is E24,  called as SPI0_D0. 

E24 is set as output in device tree.  This is the register where this is set:

and the configuration is ok. read from memory 

tx driver is enabled.  I do not know the code for the driver, but I assume that based on this configuration there is generated code that sets correctly the SPI registers - because there is no other command/instructions in device tree to set explicit  the SPI registers. so let's see the register for SPI. 

take a look deeper into this part 

ok, we know that to select if D0 or D1 should be a transmitter we should set these bits properly. So let's read address - for CS0/channel 0

we have: 

we are interested in of bits 16,17,18. these bits are in this octet 01 - 0x20(01)03d8. based on the documentation it means: DPE0 = 1 -> no transmission on line 0. DPE1 = 0 -> transmission on line 1. IS = 0 -> line 0 as receiver. Let's wait, this is incorrect! we have to change this to 0x200603d8, because in this way there will be set: DPE0 = 0 -> line 0 as transmitter, DPE1 = 1 -> line 1 no transmission,  IS = 1 -> line 1 as receiver. Let's do this:  

looks better. Let's try. 

nothing: 

why? let's check register again: 

oh yes, it seems the driver overwrote the change...

Can someone confirm that my understanding is correct?

I know that I can replace MOSI with MISO, and I have tried this for the test. I got the working output: 

but this is not a solution for me, because I'm working on final product. Previous we manged SPI from R5 core, now we want to try to do this from linux, but it seems that under linux it is not possible to change the behavior of D0 and D1. It seems to be the issue in the driver itself. Can Ti update the driver or you know if we are able to do this ourselves?

it seems I'm not the first who has this kind of problem https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1032526/tda4vm-what-s-the-pin-definition-for-spi-miso-mosi

I have looked at the source code because I wanted to try to fix this and found that: 

I have added this to device tree 

and yes, this was that, it works.

Thanks Keerthy.