This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Memory mapped program counter

Hi

I'm writing a launcher which accesses the DSP through shared memory (PCIe, Hyperlink and/or SRIO). The samples provided with MCSDK for at least PCIe and SRIO utilizes a magic address which the DSP polls after reset, which is one way of initializing the application. However I would prefer to be able to control the registers directly. Are the program counter registers of the cores memory mapped and if so at what addresses?

I've tried to look for this in the documentation but have been unable to understand if this is possible and if so at what addresses the registers are mapped.

 

Thanks,

Daniel

  • Hi Daniel,

    the Programm counter is not memory mapped.

    You can find this information in the information in the TMS320C66x DSP CPU and Instruction Set Reference Guide

    http://www.ti.com/litv/pdf/sprugh7

     

    The register is called PCE1 covered in Chapter: 2.8 Control Register File

     

    Kind regards,

    one and zero