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OMAP 35XX Host EHCI USB

I am running an OMAP 35XX with my own OS. I also have implemeted a USB thumb drive in this OS using the OMAP HOST EHCI. I have noted that when I set PLL3 to run at 332MHz I can write to my thumb drive with no problems. If I set PLL3 to run at 266MHz, I can still write to the thumb very slowly. If I try to burst a large amount of data the HOST EHCI becomes unresponsive and further attempts at writing to the tumb drive fail. Is there some spec about PLL3 and PLL4 clock speeds relative to USB Host EHCI? Everything else on the OMAP seems to work fine at this slower PLL3 frequency. 

  • Hi Brad,

    I expect the issue is related to drift with the output of PLL3. The USB EHCI logic uses a 120MHz clock to operate its internal state machines and produces a 60MHz ULPI clock that becomes the clock reference for an external USB PHY. Because of the stringent USB specification for transmit signal rate of +/-500ppm, it is possible to configure the PLL to generate the correct frequency and yet the ULPI clock may have enough long term frequency drift to cause an external USB PHY to generate a USB transmit signal rate outside of the specification.

    Please provide your SYSCLK and divider values you are using with PLL3 and we will see if we can get more optimal divider and multipier numbers.

  • We are using the external 26MHz clock supplied by the PMIC.

    For PLL3 = 332 MHz we have

    M=0xA6, N= 0x0C, FSEL = 0x7,

    For PLL3 = 266MHz we have

    M= 0x85, N = 0x0C, FSEL = 0x07

     

  • Hi Brad,

    Just to be clear - you are only changing the PLL3 settings? If that is the case then I think my previous assement isn't correct. The issue is likely related to a bandwidth issue when you are bursting. When you lower the speed of PLL3 to 266 MHz, are you also taking into account that your DDR can only run at a max of 133 MHz? If not then that combined with the USB host burts will cause your issues.

  • Only changing PLL3. Not sure how I am supposed to do anything about USB host bursts. Is there some way to slow them down?

  • Michael, 

    I always divide PLL3 by two. So, for PLL3=332MHz I run the DDR at 166MHz. For PLL3= 266MHz, I run the DDR at 133MHz.

    Brad