How to do silicon Profiling and Trace with TDMXEVM6678LE?

Mauricio,

Can you please upgrade to CCSv5.0.3 at:

http://processors.wiki.ti.com/index.php/Download_CCS

This installation will include the needed xml files to enable STM, as well as, ETB capabilities.  These capabilities will work with your XDS560v2 mezzanine card and the supplied license files at:

http://processors.wiki.ti.com/index.php/C66x  look under the Keystone EVM Info section.

I'll have one of the experts respond directly to your trace questions, but it should be supported.

Regards,

Travis

Hi, 

  I'm having the same problem here.  I've tried three different versions of CCS to no avail. Neither the trace analyzer nor the profiler work with either an XDS100 or XDS560 emulator.  Searching through the C6000 forum this seems to be a pervasive problem.

-Brant

Hi Steve,

As per you suggestion, I installed CCS_5.0.3.00028 and bios_mcsdk_02_00_03_15.

I am using the CCSv5.0-EVM-C6678.lic license file downloaded from CCv5 download site.

(I am running on a Windows XP SP2 machine).

Here are my findings,

1) In Tools->Profile->Setup_Profile_Data_Collection I am still getting a 

"There is no activity available for the selected debug session"

2) Trace Analyzer:

In Tools->Trace_Analyzer->Open_Trace_Connection_In_new_View I am still getting a

"Blackhawk XDS560v2-USB Mezzanine Emulator_0  is not traceable"  

3) Trace Control:

There is a slight improvement, I can now see a the setup dialog box, however, when selecting for ETB or 560v2 receivers I get the following errors

"Channel error: Trace Channel Error: ETB device definitions cannot be loaded. Device not supported."

"Channel error: Trace Channel Error: transmitter failure : this version of the software only supports STM trace"

Please advice what steps to follow.

Thanks

Mauricio

I've also run into this issue. I'm porting some of our algorithms to the C6678 and stuck until I can use the profiler.

- Chris

Can someone here point me to wherever the documentation on the "Silicon Profiling" feature that you are reading is? 

Here's a bit of information on trace.  

• There are two different types of Trace.  One is called XDS560 Trace, and the other is called System Trace. The Mezzanine Emulator that comes with the EVMs supports System Trace.  Any emulators in the XDS560v2 family currently support only System Trace. 
• As of this writing, only the Blackhawk USB560 with a Blackhawk XDS560T Pod support XDS560 Trace.  The XDs560v2Pro is in development now, and it will support XDS560 Trace. 

I suspect that these profiling modes depend on XDS560 Trace, and are expecting an XDS560 Trace capable emulator.  But I want to check the documentation that you are referring to in trying to use this to get a better idea of what the hardware needed for this profiling is.

You  actually do have the ability to do a bit of XDS560 Trace with the mezzanine emulator, but the trace data is captured into a very small on-chip buffer (called ETB), rather than to the much larger buffer implemented on the XDS560T emulator Pod.  But I suspect that the default "Enable Silicon Profiling" might be hard wired to use the XDS560T buffer since there may not be enough memory in the ETB to get enough data for a realistic profile.

Regards,

Dan

Hi Dan,

I am not reading any specific documentation that mentions “silicon profiling”, I am just trying to get profiling information while running on the actual DSP.

I am able get profiling information while running in the simulator (Tools->Profile->Setup_Profile_Data_Collection) but this fails while running/connected on the EVM (I get a "There is no activity available for the selected debug session"). I then experimented with the menu options Tools->Trace_Analyzer and Tools->Trace_Control but ran into the problems described in my previous posts.

The documentation I’ve been reading is,

http://processors.wiki.ti.com/index.php/Statistical_Profiling

http://software-dl.ti.com/dsps/dsps_public_sw/sdo_ccstudio/CCSv4/Demos/TraceFuncProfiling.htm

http://processors.wiki.ti.com/index.php/Using_System_Trace_(STM)

http://processors.wiki.ti.com/index.php/Debugging_With_Trace

In general; I need to optimize my code to fit within the available CPU cycles. Could you provide step-by-step instructions on how to collect function profiling information while running code on the EVM?  

Thanks

Mauricio

Mauricio,

Most of those documents that you are reading are relevant.  But, since you don't have an XDS560T pod, any XDS560 Trace data needs to be captured within the Embedded trace Buffer.  The statistical profiling, TraceFuncProfiling, and Debugging With Trace articles all are based on XDS560 Trace.  This is severley limiting on the amount of data that can be captured.  The Statistical Profiling is potentially still an option, but just keep in mind, this only gives a very high level view of which functions consume the most cycles.  This is a starting point that will let you focus on optimizing in the correct places. 

See: http://processors.wiki.ti.com/index.php/Embedded_Trace_Buffer

"Profiling" is a very broad topic.  And when you refer to "optimizing YOUR code", I am not sure how much that entails.  Is your code an entire application?  Is it a library function that needs to complete within a specified period of time?  Is it a single function?  If it's the entire application, are you running an OS like DSP/Bios?  

There are many approaches that you can take.  There is a free running counter that you can instrument your code to read and report cycle counts.  There are Advanced Event Triggering counters that can be configured in a watermark code to log the best or worst case cycle consumption in multiple iterations of your code. If you're using Bios, it has some instrumentation built in as to the CPU load being used.  

Regards,
Dan

Hi Dan,

You mentioned that the Blackhawk XDS560v2Pro is in development and will support XDS560 Trace, any idea when it will be available?

Thanks,

HR

HR,

It's currently in Beta. As of now, the RTM is scheduled for 1Q12. 

Regards,
Dan

Dan,

OK, Thanks,

HR

Dan,

What are the Trace Jtag capabilities different between the 20-pin header with EMU0-5 and the 60-pin header with EMU0-18,

Thanks,

HR

If you have EMU 0-5, I believe that you can do System Trace (STM).  Any type of PC/Data Trace/Event (traditionally known as XDS560Trace) can only be done through the 60 pin header.  

Hi Dan,

As mentioned in spru655g, the 60 pin support System trace & Core trace (probably it is the XDS560T) while the 20-pin support System trace, where can I find the feature list differences between the System & core trace,

Thanks,

HR

The best place to start is the Embedded Processors Wiki

http://processors.wiki.ti.com/index.php/XDS560_Trace

http://processors.wiki.ti.com/index.php/XDS560v2_System_Trace

As you can imagine, the amount of data that you get through STM (4-pins) is much different than what you can get with Core Trace (10+ pins)

Here's a brief summary

• Core Trace (This is single core focused.  There is no consideration for other cores.  this is available for the C64x, Some C64x+ , C674x, and C66x devices)  
  • Log Complete Program Execution (i.e. capture every PC that was executed, along with the number of cycles necessary for each)
  • Log Data Accesses (Read/Write Accesses) to a memory location.  Capture of data values written/read also. (Note: This is very bandwidth limited.  You can't just trace all accesses to all memory locations.  You can imagine how much data this would generate.  Typically this is done with a memory location, and sometimes enabled/disabled based on context.   Also note that these trace the activity on the CPU bus, which means register reads/writes can't be traced, nor can DMA accesses, etc.)
  • Event trace (This is essentailly a PC trace log, but you can choose a set of events that can be marked with the instruction where they occurred.
• System Trace (This is System Level Focused.  There's no instruction level visibility here.  This is available only on the C66x in the C6000 family.)
  • System Printf function - Allows insertion of printf like functions in code that will write out to the STM port.  These functions consume many fewer cycles than a standard printf, and don't suffer from the non-realtime effects of a standard printf.  Each piece of data printed gets a system level time stamp, so you can see these in the output according to when they occurred in the system
  • CP Tracer - CP Tracer modules that are connected to many different pieces of each core.  The CP tracer allows monitoring of data throughput at various peripherals.  

Regards,

Dan

Dan,

Great ! Thanks,

HR

Dan,

Your note above on the system vs core trace was very useful.

We tried using the ETB for core level profiling of our algorithms but due to the 4KB buffer size limitation did not find it useful for generating any realistic profile data.

You mention we can only generate core trace on C6678 using Blackhawk USB560 along with the Blackhawk XDS560T pod.  The Blackhawk website states that this product has been discontinued (http://www.blackhawk-dsp.com/products/USB560T.aspx). 

Is there any other JTAG available today that can be used for generating core level tracing on the C6678?

Regards,

Krishna

Krishna,

As of today, no, there isn't another tool.  However, we have a new emulator called the XDS560v2 Pro that is to go into Beta within the next few months.  This emulator will support both XDS560 COre trace and System trace.

Regards,
Dan

Dan,

Thank you for the confirmation and update on XDS560v2 Pro.

Regards,

Krishna

System Analyzer + compiler function entry/exit hook provides a way to do function profiling on hardware. This is software instrumentation based so does have minimal CPU overhead. Information on this is available in the FAQ section of the System Analyzer page: http://processors.wiki.ti.com/index.php?title=Multicore_System_Analyzer.

Note this is only support on CCS5.1.

Regards,

Imtaz.