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DMVA2 - AEMIF Pin Configuration

Hi,

In my board desing using the DMVA2, all 23 possible AEMIF address lines are initially being wired as address lines only (no GIO usage) after the device comes out of reset.

Datasheet section 3.7.5.1 (pg 69) has the following note,

"Note

 

: Pins EM_A[15:20] are available by programming the PinMux4 register in software after boot, but

must be pulled down externally so that valid voltage levels are provided on the full set of address pins

during boot time. EM_A[15:20] come out of reset as GPIO pins per the PinMux4 register."

I do not see this implementation in the evaluation board design and would like to understand in more detail this requirement.

 

Regards,

 

Elvis

 

 

  • I couldn't figure out what datasheet or evaluation board design you were referring to, but in general, this is basically saying that at boot time, you cannot guarantee the output state of those pins, so if you want to use them to interface to an external memory chip at boot, you have to provide pull down resistors to pull those high address lines to zero, allowing you to read the boot code that is typically located at the lowest address on your external memory device.  After you boot and configure those lines as emif addresses, you will then be able to overdrive the pulldown resistors to set whatever address is needed.  The datasheet should have a recommendation for pull down values in there somewhere.

  • Hi Elvis,

     

    I am not sure how you plan to configure EM_A[15:20] as EMIF address pins at boot time. Note boot time configuration is depfined be AECFG pins and as per Table 3-14, this is not valid boot configuration. So, the note says EM_A[15:20] will always be set as GPIO at boot time. However, one the device is booted, you can change it to EMIF address pins by configuring PINMUX4 register appropriately.

     

    Prateek