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TDA4VM: OTP (eFuse) and MAC addresses

Libor Krejca
Prodigy 120 points
Part Number: TDA4VM

Tool/software:

Dear TI support,

I believe Jacinto processors uses also OTP (eFuse) storage for MAC addresses, is it correct? If yes, then I’d need a tool and instruction (manual) for programming / burning eFuse, would be possible to have it from you? I don’t plan to store a keys in OTP, so I don’t need a keywriter (security functions won’t be used), I just need to add MAC addresses to OTP.

Are following processor variants “High security” versions or “General purpose” versions?
TDA4VM88TGBALFR
DRA829JMTGBALFR

If I update only MAC addresses then is it still possible to burn keys later? I’m not sure if I can program just part of OTP space (program OTP in multiple steps) or only whole OTP space can be programmed (program whole OTP in one step).

Thanks!

Best regards

Libor

  • 0
    TI__Mastermind 35122 points

    Hi Libor,

    Libor Krejca said:
    Are following processor variants “High security” versions or “General purpose” versions?
    TDA4VM88TGBALFR
    DRA829JMTGBALFR

    The device datasheet https://www.ti.com/lit/gpn/tda4vm  Chapter 9.1.2 explains this clearly.

    As per the data sheets, both devices are “General purpose” device types.

    Libor Krejca said:
    If I update only MAC addresses then is it still possible to burn keys later?

    Since these are GP, there is no need to burn the keys.

    Regarding your first question about the MAC address, can you tell which CPSW instance you are trying to use? If it is CPSW2G, then the MAC address is available as part of the CTRL_MMR registers(please check the Device TRM).

    Thanks.

  • 0 in reply to Praveen Rao
    TI__Mastermind 35122 points

    Hi Libor,

    If the query regarding the MAC address is for the CPSW9g, please note that there is no EFUSE on the device that can be burnt for this. Instead, you must use a board EEPROM to store the MAC address for each of the MAC ports.

    We hope this clarifies.

    Thanks.

  • 0 in reply to Praveen Rao
    Prodigy 120 points

    Hi Praveen,

    we have 2 ports on our product, 1 is connected to CPSW2G (MCU_RGMII1) and second port is from CPSW9G. So I understood we could add MAC to eFuse for first port only, but I'm not sure what your comment to CTRL_MMR registers means for us, I think these registers are not eFuse (OTP space). Anyway, please let me know how we could burn MAC address for CPSW2G to eFuse. Thanks a lot!

    Best regards

    Libor

  • 0 in reply to Libor Krejca
    TI__Mastermind 35122 points

    Hi Libor,

    Libor Krejca said:
    So I understood we could add MAC to eFuse for first port only, but I'm not sure what your comment to CTRL_MMR registers means for us, I think these registers are not eFuse (OTP space).

    The CTRL_MMR register is like standard memory-mapped registers available on the SOC. It can be read like any other system register. For details, I suggest reading Chapter 5 of the TRM ( https://www.ti.com/lit/zip/spruil1).

    As noted earlier, we cannot add or use eFuse on the GP devices.

    Thanks.

  • 0 in reply to Praveen Rao
    Prodigy 120 points

    Hi Praveen,

    I'm confused, do you say there is no eFuse for MAC address for CPSW2G? But Ethernet boot description in TRM includes table 4-63 with Ethernet boot parameters and the default value for MAC address is "From E-fuse". I don't understand how Ethernet boot could work if there is no eFuse for MAC address, I guess MAC is not factory preprogrammed by TI, is it?

    Thanks!

    Best regards

    Libor

  • +1 in reply to Libor Krejca
    TI__Mastermind 35122 points
    Libor Krejca said:
    I'm confused, do you say there is no eFuse for MAC address for CPSW2G?

    OK, understood, you are referring to this:

    Howerver, Here, the e-fuse means the Memory-mapped register. The TRM documented this. (See Chapter 5.1.2.3.1.6). There is no eFuse for MAC address for CPSW2G.  This memory-mapped register value is going to be unique for each device that is shipped.

    Thanks.