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TDA4AL-Q1: [SCALA3] consistent bit flipping in CSI2 data observed in DDR

Hossam Nabil
Prodigy 170 points
Part Number: TDA4AL-Q1

Tool/software:

Hello TI Experts,

We are facing  a strange issue when dumping the memory received through CSI2 

we are experiencing bit flipping in data in both 8.6 and 9.1 SDK the bit flipping place is the same in multiple sensors but different places with each SD ! 

data sent by FPGA were observed  using chip scope and the sent data is correct and no crc error is received within mipi driver !

we are suspecting a problem with DMA can you help detect what could be the problem and can we dump the memory  before it is transmitted to DDRwith DMA

Thank you 

  • 0
    TI__Guru**** 427915 points

    Hi Hossam,

    Are you sure that the DDR is working? Have you run some DDR test to confirm its working? 

    DMA typically does not change the content of the data, so its unlikely that bit flip happened due to DMA. Lets first check if DDR is working fine. 

    Regards,

    Brijesh 

  • 0 in reply to Brijesh Jadav
    Prodigy 170 points

    Hello Brejish,

    what do you mean DDR is working ? we are reading from ddr and we ran bandwidth test in an issue related to a byte shift and we raise the priority of csi2 on the PSIL bus 

    also we changed the gFrms address and the same bitflipping happens at the same place in the scan

    we also check for CRC errors and we can't find any 

    can you share these DDR tests and if you have any idea if we can check the values before using the DMA  can you share it with me ?

    Thank you,

  • 0 in reply to Hossam Nabil
    TI__Guru**** 427915 points

    Hello Hossam,

    CSIRX does not really change the contents of the buffer and since you are not seeing any CRC error, i am just wondering if DDR is working fine. Have you run some DDR test to confirm working of DDR? Can you please do write->read test on this section of the DDR and see if it is consistently working fine? 

    Regards,

    Brijesh