Tool/software:
Hi All,
I'm trying to turn on PCIE in AM6442 as a RC. but I'm getting the following error while booting. Is there anything I need to change in device tree? Or is this a normal behavior of driver?
Kernel Boot Debug:
[ 10.553633] j721e-pcie f102000.pcie: PCI host bridge to bus 0000:00
[ 10.560107] pci_bus 0000:00: root bus resource [bus 00-ff]
[ 10.565678] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] (bus address [0x68001000-0x68010fff])
[ 10.575226] pci_bus 0000:00: root bus resource [mem 0x68011000-0x6fffffff]
[ 10.582203] pci 0000:00:00.0: [104c:b010] type 01 class 0x060400
[ 10.588259] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0xfffffffff 64bit pref]
[ 10.595687] pci 0000:00:00.0: supports D1
[ 10.599776] pci 0000:00:00.0: PME# supported from D0 D1 D3hot
[ 10.609356] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[ 10.618063] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
[ 10.624940] pci 0000:00:00.0: BAR 0: no space for [mem size 0x1000000000 64bit pref]
[ 10.632823] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x1000000000 64bit pref]
[ 10.641005] pci 0000:00:00.0: PCI bridge to [bus 01]
[ 10.646421] pcieport 0000:00:00.0: of_irq_parse_pci: failed with rc=-22
[ 10.653830] pcieport 0000:00:00.0: PME: Signaling with IRQ 525
[ 10.660564] pcieport 0000:00:00.0: AER: enabled with IRQ 525
Here is device-tree
pcie0_rc: pcie@f102000 {
compatible = "ti,am64-pcie-host", "ti,j721e-pcie-host";
reg = <0x00 0x0f102000 0x00 0x1000>,
<0x00 0x0f100000 0x00 0x400>,
<0x00 0x0d000000 0x00 0x00800000>,
<0x00 0x68000000 0x00 0x00001000>;
reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
interrupt-names = "link_state";
interrupts = <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>;
device_type = "pci";
ti,syscon-pcie-ctrl = <&main_conf 0x4070>;
max-link-speed = <2>;
num-lanes = <1>;
power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 114 0>, <&serdes0 CDNS_TORRENT_REFCLK_DRIVER>;
clock-names = "fck", "pcie_refclk";
#address-cells = <3>;
#size-cells = <2>;
bus-range = <0x0 0xff>;
cdns,no-bar-match-nbits = <64>;
vendor-id = <0x104c>;
device-id = <0xb010>;
msi-map = <0x0 &gic_its 0x0 0x10000>;
ranges = <0x01000000 0x00 0x68001000 0x00 0x68001000 0x00 0x0010000>,
<0x02000000 0x00 0x68011000 0x00 0x68011000 0x00 0x7fef000>;
dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x00000010 0x0>;
};
&serdes_ln_ctrl {
idle-states = <AM64_SERDES0_LANE0_PCIE0>;
};
&serdes0 {
status = "okay";
serdes0_pcie_link: phy@0 {
reg = <0>;
cdns,num-lanes = <1>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_PCIE>;
resets = <&serdes_wiz0 1>;
};
};
&pcie0_rc {
phys = <&serdes0_pcie_link>;
reset-gpios = <&exp1 5 GPIO_ACTIVE_HIGH>;
phy-names = "pcie-phy";
num-lanes = <1>;
status = "okay";
};
&pcie0_ep {
phys = <&serdes0_pcie_link>;
phy-names = "pcie-phy";
num-lanes = <1>;
status = "disabled";
};
