Tool/software:
Hello Team,
We are working to utilize the VID & VIDL pipeline update from MCU R5 and A5 Linux cores. Do we have any sample configuration?
Currently we ensured that with DSS configuration from MCU R5 able to drive the VIDL pipeline (without Linux implementation) and similarly on A5 to drive the VID pipeline (without MCU R5 implementation). When we try to enable VIDL & VID, we see unexpected observation like either of the pipeline is displayed. This is also not consistent.
Can you please support?
Regards
Karthik R
