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[FAQ] SK-AM64B: Why the Ethernet phy use the same clock buffer?

Moon Wang
Intellectual 1285 points
Part Number: SK-AM64B

Tool/software:

Hi Team,

I found in the schematic of EVM, we only use one piece of LMK1C1103PWR to buffer clock signal to 2 pieces of Ethernet PHY. Does it necessary to use one clock buffer? Can the different Ethernet PHY use different clock signal?

BR,

Moon

  • 0
    TI__Guru**** 175614 points

    Hello Moon, 

    Thank you for the query.

    In the SK, the 3 output from the buffer connect to the below 

    SoC_CLKIN 

    CPSW_RGMII1_ETH1_CLK 
    CPSW_RGMII2_ETH2_CLK 

    Help we understand how the SOC clock is connected.

    Regards,

    Sreenivasa

  • +1 in reply to Kallikuppa Sreenivasa
    TI__Guru 61955 points

    A single clock source topology was implemented on the EVM to support industrial applications that needed the Ethernet PHYs to operate at the exact same frequency as the AM64x device, without the small PPM error that would be introduced when using multiple clock sources. This may not be a concern for your application. If not, you can provide a separate clock source to the Ethernet PHY(s). However, you need to make sure each clock source is operating within the valid operating range of the respective devices. For example, the AM64x device requires a reference clock that has a maximum frequency error of 50PPM when using RMII or RGMII. The 50PPM error must include the initial accuracy of the clock source combined with any deviation due to temperature changes and aging.

    Regards,
    Paul

  • 0 in reply to peaves
    TI__Intellectual 1285 points

    Thanks a lot for your reply.

  • 0 in reply to Moon Wang
    TI__Guru**** 175614 points

    Hello Moon Wang,

    Thank you for the note.

    Regards,

    Sreenivasa