• State
  • Locked Locked
  • Replies 5 replies
  • Subscribers 99 subscribers
  • Views 300 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TDA4VH-Q1: The question of pagesize change in SDK0902

?? ?
Prodigy 50 points
Part Number: TDA4VH-Q1


Tool/software:

Hi, team:

When testing PCIe services, we noticed that the pagesize of SDK0902 is 4kB while it was 64kB in SDK0805. And it caused some problems while running pci endpoint tests.

We would like to know the reasons behind that modification. And what would be affected if we change it back to 64kB.

Thank you.

  • 0
    TI__Mastermind 39860 points

    Hi,

    Can you please let me know how are you checking the pagesize?

    Regards,
    Tanmay

  • 0 in reply to Tanmay Patil
    Prodigy 50 points

    we found it in /build/.config file after compile. 

    This is the .config file in SDK0902:

    And this is the .config file in SDK0805:

  • 0 in reply to ?? ?
    TI__Guru 52743 points

    Hi,

    This change affects Linux kernel as a whole and not just PCIe.

    For reasoning, it is for compatibility and granularity. For example, existing 32-bit user applications assume 4K page mapping, and small 256 byte function now loads only 4K pages rather than 64K pages.

    Additionally, there are ecosystems like debian that uses 4K pages. Although, there are other flavors of Linux like Red Hat and Centos that uses 64K page kernel and disallow 32-bit applications.

    On the other hand, 64K pages should theoretically increase performance, reduce memory management overhead, and reduce HW cost.

    Regards,

    Takuma

  • 0 in reply to Takuma Fujiwara
    Prodigy 50 points

    Hi, Takuma

    We noticed that the pagesize of SDK0902 is 4kB with Linux kernel version 6.1,  and it was 64kB in SDK0805 with Linux kernel version 5.1. Is the page size the default setting of the kernel, or is it intentionally modified by your team to fit specific application? 

    e2e.ti.com/.../tda4vh-q1-how-to-modify-pcie-shared-memory-size-to-1gb

    In this case, when using 4kB pagesize, 1GB shared memory can not be correctly allocated. It returned the wrong BAR address. After we changed it back to 64kB, that problem was solved. We wonder if the change will affact other applications and cause serious problems. Thank you.

    Regards,

    mingjian.shang

  • 0 in reply to ?? ?
    TI__Guru 52743 points

    Hi Mingjian,

    The change was intentional, but not for a specific application that is part of the TI SDK. We work with the Beagle community who makes boards using TI SoCs that use debian, which takes 4K pages rather than 64K page size.

    Regards,

    Takuma