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TDA4AL-Q1: Ethernet driver would be error in QNX

Namic Chang
Prodigy 250 points
Part Number: TDA4AL-Q1

Tool/software:

Hi,

Below are the SDK version we using:

RTOS: ti-processor-sdk-rtos-j721s2-evm-08_06_01_03

QNX: ti-processor-sdk-qnx_j721s2_08_06_00_07

We found that the ethernet(cpsw2g)  cannot work.

The status was shown active but I cannot ping out or in.

I tried to use ifconfig command to down, it got error:

May 30 01:48:23.804 io_pkt_v4_hc.262158 slog      0  rxReadyQ count = 0
May 30 01:48:23.804 io_pkt_v4_hc.262158 slog      0  freePktInfoQ count = 128
May 30 01:48:23.804 io_pkt_v4_hc.262158 slog      0  Cpsw_ioctlInternal: Invalid dflt flow: 1
May 30 01:48:23.804 io_pkt_v4_hc.262158 slog      0  EnetIf_unregisterDefaultRxFlow:1063 Error: UNREGISTER_RX_DEFAULT_FLOW failed : -3
May 30 01:48:23.804 io_pkt_v4_hc.262158 slog      0  Assertion @ Line: 1487 in /mnt/ssd/tda4/ti-rtos-sdk-j721s2-8.x/psdkqa/qnx/devnp/cpsw2g/../src/enetlld_if_utils.c: status == ENET_SOK : failed !!!
May 30 01:48:23.804 io_pkt_v4_hc.262158 slog      0  CpswAle_ioctl: Failed to remove MAC addr: -14
May 30 01:48:23.804 io_pkt_v4_hc.262158 slog      0  EnetIf_delAddrEntry:1327 Error: failed CPSW_ALE_IOCTL_REMOVE_ADDR: -14
May 30 01:48:23.804 io_pkt_v4_hc.262158 slog      0  Assertion @ Line: 1330 in /mnt/ssd/tda4/ti-rtos-sdk-j721s2-8.x/psdkqa/qnx/devnp/cpsw2g/../src/enetlld_if_utils.c: status == ENET_SOK : failed !!!
May 30 01:48:23.804 io_pkt_v4_hc.262158 slog      0  Assertion @ Line: 1492 in /mnt/ssd/tda4/ti-rtos-sdk-j721s2-8.x/psdkqa/qnx/devnp/cpsw2g/../src/enetlld_if_utils.c: status == ENET_SOK : failed !!!
May 30 01:48:23.804 io_pkt_v4_hc.262158 slog      0  EnetIf_freeMac:1005 Error: IOCTL_FREE_MAC_ADDR failed : -1
May 30 01:48:23.804 io_pkt_v4_hc.262158 slog      0  Assertion @ Line: 1498 in /mnt/ssd/tda4/ti-rtos-sdk-j721s2-8.x/psdkqa/qnx/devnp/cpsw2g/../src/enetlld_if_utils.c: status == ENET_SOK : failed !!!
May 30 01:48:23.805 io_pkt_v4_hc.262158 slog      0  Cpsw_handleLinkDown: Port 1: Link down
May 30 01:48:23.805 io_pkt_v4_hc.262158 slog      0  EnetPhy_close: PHY 10: disable
May 30 01:48:24.069 io_pkt_v4_hc.262158 slog     56  [UDMA] Calling Udma_resmgr_close
May 30 01:48:24.069 io_pkt_v4_hc.262158 slog     56  [UDMA] Closing resmgr fd=8!!!
May 30 01:48:24.069 io_pkt_v4_hc.262158 slog      0  EnetIf_isr_thread: thread exit pulse received
May 30 01:48:24.069 io_pkt_v4_hc.262158 slog      0  EnetIf_isr_thread: thread exit pulse received
May 30 01:48:24.069 io_pkt_v4_hc.262158 slog      0  EnetIf_isr_thread: thread exit pulse received
May 30 01:48:24.080 io_pkt_v4_hc.262158 slog      0  cpsw deinit done

Could you please help to check this error ?

Thanks.

Best regards,

Namic Chang

  • 0
    TI__Mastermind 48033 points

    Hello Namic,

    The log shared does not capture the original error.

    Please share the complete QNX boot log. Also, please let us know the steps followed to start the CPSW2G ethernet driver.

    Along with slog, provide the output of the following commands: " pidin ar " and "ifconfig -v."

    Thanks.

  • 0 in reply to Praveen Rao
    Prodigy 250 points

    Hi, Praveen:

    The output of command "ifconfig -v" was shown as below:

    ifconfig: getifaddrs: Address family not supported by protocol family

    And it cannot find the command of "pidgin ar".

    The slog:

    Jan 01 00:00:00.023                       random.5                  low*     0  qcrypto: loading configuration file '/etc/qcrypto.conf' [qcrypto_common.c(190)]
Jan 01 00:00:00.024                    random.5..0                 slog*   700  Random is using the Fortuna PRNG
Jan 01 00:00:00.029                       random.5                  low      0  qcrypto: 'openssl' plugin loaded [qcrypto_plugins.c(354)]
Jan 01 00:00:00.029                    random.5..0                 slog    700  Selecting timer as an entropy source
Jan 01 00:00:00.030                    random.5..0                 slog    700  Registered path names
Jan 01 00:00:00.030                    random.5..0                 slog    700  random: starting resmgr
Jan 01 00:00:00.030                    random.5..0                 slog    700  random: Daemonizing the process
Jan 01 00:00:00.046             devb_sdmmc_am65x.9                 slog*  1800  devb-sdmmc-am65x 1.00A (Oct  8 2024 10:59:41)
Jan 01 00:00:00.046             devb_sdmmc_am65x.9                 slog      0  libcam.so (Sep  3 2021 11:57:38) bver 7010004
Jan 01 00:00:00.047             devb_sdmmc_am65x.9                 slog   1800  sdio_cd:  insertion path 0, cd state 0x1
Jan 01 00:00:00.049            devb_sdmmc_am65x.10                 slog*  1800  devb-sdmmc-am65x 1.00A (Oct  8 2024 10:59:41)
Jan 01 00:00:00.049            devb_sdmmc_am65x.10                 slog      0  libcam.so (Sep  3 2021 11:57:38) bver 7010004
Jan 01 00:00:00.134             devb_sdmmc_am65x.9                 slog   1800  MMC CID:
Jan 01 00:00:00.134             devb_sdmmc_am65x.9                 slog   1800    MID 0x45, OID 0x0, PNM DG4016
Jan 01 00:00:00.134             devb_sdmmc_am65x.9                 slog   1800    PRV 0x1, PSN 0x4426ec2e, MDT 1-2024
Jan 01 00:00:00.134             devb_sdmmc_am65x.9                 slog   1800  MMC CSD:
Jan 01 00:00:00.134             devb_sdmmc_am65x.9                 slog   1800    CSD_STRUCTURE 3, SPEC_VERS 4, CCC 0x8f5
Jan 01 00:00:00.134             devb_sdmmc_am65x.9                 slog   1800    TAAC 15, NSAC 0, TRAN_SPEED 50
Jan 01 00:00:00.134             devb_sdmmc_am65x.9                 slog   1800    C_SIZE 4095, C_SIZE_MULT 7
Jan 01 00:00:00.134             devb_sdmmc_am65x.9                 slog   1800    READ_BL_LEN 9, WRITE_BL_LEN 9
Jan 01 00:00:00.134             devb_sdmmc_am65x.9                 slog   1800    ERASE GRP_SIZE 31, GRP_MULT 31, SIZE 0
Jan 01 00:00:00.135             devb_sdmmc_am65x.9                 slog   1800    blksz 512, sectors 2097152, dtr 25000000
Jan 01 00:00:00.135             devb_sdmmc_am65x.9                 slog   1800  MMC EXT CSD:
Jan 01 00:00:00.135             devb_sdmmc_am65x.9                 slog   1800    DEVICE_TYPE 0x57, EXT_CSD_REV 8
Jan 01 00:00:00.135             devb_sdmmc_am65x.9                 slog   1800    SEC_COUNT 30777344, dtr 200000000
Jan 01 00:00:00.135             devb_sdmmc_am65x.9                 slog   1800    HC_ERASE_GRP_SIZE 1, HC_WP_GRP_SIZE 16
Jan 01 00:00:00.135             devb_sdmmc_am65x.9                 slog   1800    STROBE 0x1, BKOPS_EN 0x2
Jan 01 00:00:00.135             devb_sdmmc_am65x.9                 slog   1800    Driver type: 0x0
Jan 01 00:00:00.135             devb_sdmmc_am65x.9                 slog   1800  CFG:  Timing HS200, DTR 200000000, Bus Width 8 bit
Jan 01 00:00:00.135             devb_sdmmc_am65x.9                 slog    100  cam-disk.so (Sep  3 2021 11:57:42)
Jan 01 00:00:00.282               tisci_mgr.208909                 slog*   130  TI SCI ResMgr for SOC J721S2 (version=PSDKQNX_08_06_00, date=Tue Oct 8 10:58:34 CST 2024)
Jan 01 00:00:00.283               tisci_mgr.208909                 slog    130   SYSFW Firmware Version 8.6.3--1-g2249f (Chill Capybara
Jan 01 00:00:00.283               tisci_mgr.208909                 slog    130   SYSFW Firmware revision 0x8
Jan 01 00:00:00.283               tisci_mgr.208909                 slog    130   SYSFW ABI revision 3.1
Jan 01 00:00:00.308          shmemallocator.233487                 slog*   129  TI Shared memory Allocator for SOC J721S2 (version=PSDKQNX_08_06_00, date=Tue Oct 8 10:58:34 CST 2024)
Jan 01 00:00:00.308          shmemallocator.233487                 slog    129  initSHM:Block[0] @ 0xb8000000 has free-mem = 0x20000000 - 512 M
Jan 01 00:00:00.308          shmemallocator.233487                 slog    129  initSHM:Block[1] @ 0xe6000000 has free-mem = 0x2000000 - 32 M
Jan 01 00:00:00.346               tiipc_mgr.237584                 slog*   133  TI IPC ResMgr for SOC J721S2 (version=PSDKQNX_08_06_00, date=Tue Oct 8 10:58:34 CST 2024)
Jan 01 00:00:00.346               tiipc_mgr.237584                 slog    133  tiipc-mgr: Starting TI IPC Resmgr
Jan 01 00:00:00.346               tiipc_mgr.237584                 slog    133  tiipc-mgr: Using VRING base address: 0xa8000000, size:0x1c00000
Jan 01 00:00:00.380               tiipc_mgr.237584                 slog    133  [IPC]
Jan 01 00:00:00.380               tiipc_mgr.237584                 slog    133  Mailbox_plugInterrupt: interrupt Number 489, arg 0xA1CA80C8
Jan 01 00:00:00.413               tiipc_mgr.237584                 slog    133  [IPC]
Jan 01 00:00:00.413               tiipc_mgr.237584                 slog    133  Mailbox_plugInterrupt: interrupt Number 490, arg 0xA1CA8268
Jan 01 00:00:00.447               tiipc_mgr.237584                 slog    133  [IPC]
Jan 01 00:00:00.447               tiipc_mgr.237584                 slog    133  Mailbox_plugInterrupt: interrupt Number 491, arg 0xA1CA8408
Jan 01 00:00:00.480               tiipc_mgr.237584                 slog    133  [IPC]
Jan 01 00:00:00.480               tiipc_mgr.237584                 slog    133  Mailbox_plugInterrupt: interrupt Number 492, arg 0xA1CA85A8
Jan 01 00:00:00.490              tiudma_mgr.249868                 slog*   131  TI UDMA ResMgr for SOC J721S2 (version=PSDKQNX_08_06_00, date=Tue Oct 8 10:58:34 CST 2024)
Jan 01 00:00:00.693                   iopkt.262158          main_buffer*     0  tcpip starting
Jan 01 00:00:00.694                   iopkt.262158          main_buffer      0  smmu support is disabled
Jan 01 00:00:00.695                   iopkt.262158          main_buffer      0  initializing IPsec...
Jan 01 00:00:00.695                   iopkt.262158          main_buffer      0   done
Jan 01 00:00:00.695                   iopkt.262158          main_buffer      0  IPsec: Initialized Security Association Processing.
Jan 01 00:00:00.704                   iopkt.262158          main_buffer      0  lsm-pf-v4.so (null)
Jan 01 00:00:00.720                   iopkt.262158          main_buffer      0  devnp-cpsw2g-main.so mac-to-mac=1,speed=100,ptp=1
Jan 01 00:00:00.721                   iopkt.262158          main_buffer      0  an0
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog*     0  cpsw_entry:546 Entry -->
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog      0  cpsw_attach:718 Entry -->
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog      0  cpsw_parse_options:222 mac_to_mac -->1
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog      0  cpsw_parse_options:235 speed -->100
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog      0  cpsw_parse_options:210 PTP -->1
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog      0  Enable RGMII delay, regData = 0x12
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog      0  Success - write to MAIN_ENET_CTRL - 0x12
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog      0  Success - write to MAIN CPSW_CLKSEL - 0x0
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog      0  Pinmux for 0x7a1e40c0=0x50006 (org=0x40007)
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog      0  Pinmux for 0x7a1e40bc=0x50006 (org=0x40007)
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog      0  Pinmux for 0x7a1e40b8=0x50006 (org=0x50006)
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog      0  Pinmux for 0x7a1e40a0=0x50006 (org=0x50006)
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog      0  Pinmux for 0x7a1e40a4=0x50006 (org=0x50006)
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog      0  Pinmux for 0x7a1e40a8=0x50006 (org=0x50006)
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog      0  Pinmux for 0x7a1e40b0=0x50006 (org=0x50006)
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog      0  Pinmux for 0x7a1e40ac=0x50006 (org=0x50006)
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog      0  Pinmux for 0x7a1e408c=0x50006 (org=0x10006)
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog      0  Pinmux for 0x7a1e4090=0x50006 (org=0x10006)
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog      0  Pinmux for 0x7a1e4094=0x50006 (org=0x10006)
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog      0  Pinmux for 0x7a1e4098=0x50006 (org=0x10006)
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog      0  Pinmux for 0x7a1e40b4=0x50006 (org=0x10006)
Jan 01 00:00:00.721            io_pkt_v4_hc.262158                 slog      0  Pinmux for 0x7a1e409c=0x50006 (org=0x10006)
Jan 01 00:00:00.736                   iopkt.262158          main_buffer      0  devnp-cpsw2g.so speed=100
Jan 01 00:00:00.736                   iopkt.262158          main_buffer      0  am0
Jan 01 00:00:00.736            io_pkt_v4_hc.262158                 slog      0  cpsw_entry:546 Entry -->
Jan 01 00:00:00.736            io_pkt_v4_hc.262158                 slog      0  cpsw_attach:718 Entry -->
Jan 01 00:00:00.736            io_pkt_v4_hc.262158                 slog      0  cpsw_parse_options:235 speed -->100
Jan 01 00:00:00.736            io_pkt_v4_hc.262158                 slog      0  Success - write to MCU_ENET_CTRL - 0x12
Jan 01 00:00:00.736            io_pkt_v4_hc.262158                 slog      0  Success - write to MCU_ENET_CLKSEL - 0xf00
Jan 01 00:00:01.734            io_pkt_v4_hc.262158                 slog      0  Enabling clocks!
Jan 01 00:00:01.736            io_pkt_v4_hc.262158                 slog      0  EnetIf_reduceCoreMacAllocation: Reduced Mac Address Allocation for CoreId:3 From 1 To 0
Jan 01 00:00:01.736            io_pkt_v4_hc.262158                 slog      0  ENET_CPSW_2G on MAIN NAVSS
Jan 01 00:00:01.737                      console.2                  out*     0  [294934] Jan 01 00:00:01 cron: started
Jan 01 00:00:01.743            io_pkt_v4_hc.262158                 slog     56  [UDMA] Calling Udma_resmgr_open
Jan 01 00:00:01.743            io_pkt_v4_hc.262158                 slog     56  [UDMA] Opening resmgr!!!
Jan 01 00:00:01.743            io_pkt_v4_hc.262158                 slog     56  [UDMA] Opened resmgr fd=6!!!
Jan 01 00:00:01.743            io_pkt_v4_hc.262158                 slog     56  [UDMA] eventHandle->vintrNum = 35!!!
Jan 01 00:00:01.743            io_pkt_v4_hc.262158                 slog     56  [UDMA] eventHandle->irIntrNum = 11!!!
Jan 01 00:00:01.743            io_pkt_v4_hc.262158                 slog     56  [UDMA] eventHandle->coreIntrNum = 75!!!
Jan 01 00:00:01.750         pmic_presetting.303131                 slog*     0  Board_ID = 0xc
Jan 01 00:00:01.755            io_pkt_v4_hc.262158                 slog      0  EnetIf_registerIntr2: tx isr 75 thread priority set to 21
Jan 01 00:00:01.755            io_pkt_v4_hc.262158                 slog      0  EnetIf_CreateISRThread: InterruptAttachEvent succeed irq/75 coid/1073741850 event/b
Jan 01 00:00:01.755            io_pkt_v4_hc.262158                 slog      0  Enet_open: main.cpsw2g: features: 0x00000002
Jan 01 00:00:01.755            io_pkt_v4_hc.262158                 slog      0  Enet_open: main.cpsw2g: errata  : 0x00000000
Jan 01 00:00:01.756            io_pkt_v4_hc.262158                 slog      0  Mdio_open: MDIO manual mode enabled
Jan 01 00:00:01.756            io_pkt_v4_hc.262158                 slog      0  cpsw_alloc:299: Alloc successfull; Virt: 0x23831ab000, Phys: 0x97b180000
Jan 01 00:00:01.756            io_pkt_v4_hc.262158                 slog      0  EnetUdma_memMgrInit: addr=0x23831ab000 is  aligned
Jan 01 00:00:01.759            io_pkt_v4_hc.262158                 slog      0  EnetIf_registerIntr: some unknown cpsw isr thread priority set to 21
Jan 01 00:00:01.759            io_pkt_v4_hc.262158                 slog      0  EnetIf_CreateISRThread: InterruptAttachEvent succeed irq/51 coid/1073741854 event/c
Jan 01 00:00:01.759            io_pkt_v4_hc.262158                 slog      0  EnetIf_registerIntr: some unknown cpsw isr thread priority set to 21
Jan 01 00:00:01.759            io_pkt_v4_hc.262158                 slog      0  EnetIf_CreateISRThread: InterruptAttachEvent succeed irq/53 coid/1073741856 event/d
Jan 01 00:00:01.761            io_pkt_v4_hc.262158                 slog      0  cpsw_alloc:299: Alloc successfull; Virt: 0x2383247000, Phys: 0x97b194000
Jan 01 00:00:01.761            io_pkt_v4_hc.262158                 slog      0  EnetIfMem_init: addr=0x2383247000 is  aligned
Jan 01 00:00:01.761            io_pkt_v4_hc.262158                 slog      0  EnetIfMem_init: addr=0x2383247000, size=0x221000, gMem=0x2383247000, gMemBufPhys=0x97b194000
Jan 01 00:00:01.761            io_pkt_v4_hc.262158                 slog      0  EnetIfMem_init: gDmaDescMemArray=0x2383247000, size=0x200000
Jan 01 00:00:01.761            io_pkt_v4_hc.262158                 slog      0  EnetIfMem_init: gRingMemArray=0x2383447000, size=0x21000
Jan 01 00:00:01.761            io_pkt_v4_hc.262158                 slog      0  EnetIfMem_init: gDmaDescMemArrayBasePhys=0x97b194000, gDmaDescMemArrayBase=0x2383247000
Jan 01 00:00:01.763            io_pkt_v4_hc.262158                 slog      0  initQs() freePktInfoQ initialized with 256 pkts
Jan 01 00:00:01.765         pmic_presetting.303131                 slog      0  Bind I2C0 Driver
Jan 01 00:00:01.765         pmic_presetting.303131                 slog      0  Prepare to Clear PMIC A/B/C Interrupts notification
Jan 01 00:00:01.766            io_pkt_v4_hc.262158                 slog     56  [UDMA] eventHandle->globalEvent = 34!!!
Jan 01 00:00:01.766            io_pkt_v4_hc.262158                 slog     56  [UDMA] eventHandle->vintrNum = 36!!!
Jan 01 00:00:01.766            io_pkt_v4_hc.262158                 slog     56  [UDMA] eventHandle->vintrBitNum = 0!!!
Jan 01 00:00:01.766            io_pkt_v4_hc.262158                 slog     56  [UDMA] eventHandle->irIntrNum = 12!!!
Jan 01 00:00:01.766            io_pkt_v4_hc.262158                 slog     56  [UDMA] eventHandle->coreIntrNum = 76!!!
Jan 01 00:00:01.770         pmic_presetting.303131                 slog      0  Done
Jan 01 00:00:01.770         pmic_presetting.303131                 slog      0  Checking PMIC A settings...
Jan 01 00:00:01.777         pmic_presetting.303131                 slog      0  LDO2 OV/UV threshold error, reset to 5pct. ret=0x3f
Jan 01 00:00:01.782         pmic_presetting.303131                 slog      0
Jan 01 00:00:01.782         pmic_presetting.303131                 slog      0  Checking PMIC B settings...
Jan 01 00:00:01.782         pmic_presetting.303131                 slog      0  board_id=12
Jan 01 00:00:01.782            io_pkt_v4_hc.262158                 slog      0  EnetIf_registerIntr2: rx isr 76 thread priority set to 21
Jan 01 00:00:01.782            io_pkt_v4_hc.262158                 slog      0  EnetIf_registerIntr2: RX InterruptAttachEvent succeed irq/76 coid/1073741857 event/f
Jan 01 00:00:01.783            io_pkt_v4_hc.262158                 slog      0  Host MAC address:
Jan 01 00:00:01.783            io_pkt_v4_hc.262158                 slog      0  70:ff:76:1d:92:c1
Jan 01 00:00:01.783            io_pkt_v4_hc.262158                 slog      0  EnetIf_Init: 834 Info EnetIf_Init AleBcastEntry status = 0
Jan 01 00:00:01.785         pmic_presetting.303131                 slog      0  BULK2 VOUT register is not 1.2V, reset to 1.2V
Jan 01 00:00:01.786         pmic_presetting.303131                 slog      0  BULK2 OV/UV threshold error, reset to 5pct. ret=0x3f
Jan 01 00:00:01.797         pmic_presetting.303131                 slog      0  LDO2 OV/UV threshold error, reset to 5pct. ret=0x3f
Jan 01 00:00:01.801         pmic_presetting.303131                 slog      0
Jan 01 00:00:01.801         pmic_presetting.303131                 slog      0  Checking PMIC C settings...
Jan 01 00:00:01.803         pmic_presetting.303131                 slog      0
Jan 01 00:00:01.815              fotad_tda4.356379                 slog*     0  TDA4 OTA daemon started.
Jan 01 00:00:05.875            io_pkt_v4_hc.262158                 slog      0  EnetIf_PtpInit:562 PTP
Jan 01 00:00:05.875            io_pkt_v4_hc.262158                 slog      0  EnetIf_PtpInit:582 CPSW_CPTS_IOCTL_REGISTER_STACK is sucessful
Jan 01 00:00:05.875            io_pkt_v4_hc.262158                 slog      0  cpsw_init:1070 Phy is linked
Jan 01 00:00:05.875            io_pkt_v4_hc.262158                 slog      0  cpsw_filter: Clear IFF_ALLMULTI
Jan 01 00:00:05.875            io_pkt_v4_hc.262158                 slog      0  cpsw_filter: Adding Multicast MAC Addr -> 01:00:5e:00:00:01
Jan 01 00:00:05.876            io_pkt_v4_hc.262158                 slog      0  EnetIf_reduceCoreMacAllocation: Reduced Mac Address Allocation for CoreId:4 From 1 To 0
Jan 01 00:00:05.876            io_pkt_v4_hc.262158                 slog      0  EnetIf_reduceCoreMacAllocation: Reduced Mac Address Allocation for CoreId:1 From 1 To 0
Jan 01 00:00:05.876            io_pkt_v4_hc.262158                 slog      0  ENET_CPSW_2G on MCU NAVSS
Jan 01 00:00:05.880            io_pkt_v4_hc.262158                 slog     56  [UDMA] Calling Udma_resmgr_open
Jan 01 00:00:05.881            io_pkt_v4_hc.262158                 slog     56  [UDMA] Opening resmgr!!!
Jan 01 00:00:05.881            io_pkt_v4_hc.262158                 slog     56  [UDMA] Opened resmgr fd=8!!!
Jan 01 00:00:05.881            io_pkt_v4_hc.262158                 slog     56  [UDMA] eventHandle->vintrNum = 37!!!
Jan 01 00:00:05.881            io_pkt_v4_hc.262158                 slog     56  [UDMA] eventHandle->irIntrNum = 13!!!
Jan 01 00:00:05.881            io_pkt_v4_hc.262158                 slog     56  [UDMA] eventHandle->coreIntrNum = 77!!!
Jan 01 00:00:05.891            io_pkt_v4_hc.262158                 slog      0  EnetIf_registerIntr2: tx isr 77 thread priority set to 21
Jan 01 00:00:05.891            io_pkt_v4_hc.262158                 slog      0  EnetIf_CreateISRThread: InterruptAttachEvent succeed irq/77 coid/1073741859 event/10
Jan 01 00:00:05.891            io_pkt_v4_hc.262158                 slog      0  Enet_open: cpsw2g: features: 0x00000002
Jan 01 00:00:05.891            io_pkt_v4_hc.262158                 slog      0  Enet_open: cpsw2g: errata  : 0x00000000
Jan 01 00:00:05.891            io_pkt_v4_hc.262158                 slog      0  Mdio_open: MDIO manual mode enabled
Jan 01 00:00:05.892            io_pkt_v4_hc.262158                 slog      0  cpsw_alloc:299: Alloc successfull; Virt: 0x238c46b000, Phys: 0x97b3f6000
Jan 01 00:00:05.892            io_pkt_v4_hc.262158                 slog      0  EnetUdma_memMgrInit: addr=0x238c46b000 is  aligned
Jan 01 00:00:05.894            io_pkt_v4_hc.262158                 slog      0  EnetIf_registerIntr: cpsw stat isr thread priority set to 21
Jan 01 00:00:05.894            io_pkt_v4_hc.262158                 slog      0  EnetIf_CreateISRThread: InterruptAttachEvent succeed irq/888 coid/1073741863 event/11
Jan 01 00:00:05.894            io_pkt_v4_hc.262158                 slog      0  EnetIf_registerIntr: cpsw cpts isr thread priority set to 22
Jan 01 00:00:05.894            io_pkt_v4_hc.262158                 slog      0  EnetIf_CreateISRThread: InterruptAttachEvent succeed irq/890 coid/1073741865 event/12
Jan 01 00:00:05.894            io_pkt_v4_hc.262158                 slog      0  SetPhyConfig: got phy address = 10
Jan 01 00:00:06.026            io_pkt_v4_hc.262158                 slog      0  EnetPhy_setNextState: PHY 10: INIT -> FINDING (20 ticks)
Jan 01 00:00:06.026            io_pkt_v4_hc.262158                 slog      0  EnetPhy_setNextState: PHY 10: FINDING -> FOUND (0 ticks)
Jan 01 00:00:06.422            io_pkt_v4_hc.262158                 slog      0  EnetPhy_bindDriver: PHY 10: OUI:080028 Model:27 Ver:01 <-> 'dp83tc812'
Jan 01 00:00:06.422            io_pkt_v4_hc.262158                 slog      0  Dp83tc812_isPhyDevSupported : PHY OUI = 0x80028
Jan 01 00:00:06.422            io_pkt_v4_hc.262158                 slog      0  Dp83tc812_isPhyDevSupported : PHY MODEL = 0x0027
Jan 01 00:00:06.422            io_pkt_v4_hc.262158                 slog      0  Dp83tc812_isPhyDevSupported : PHY REVISION = 0x0001
Jan 01 00:00:06.422            io_pkt_v4_hc.262158                 slog      0  Dp83tc812_isMacModeSupported: mii = 0x0003
Jan 01 00:00:06.422            io_pkt_v4_hc.262158                 slog      0  EnetPhy_bindDriver: PHY 10: OUI:080028 Model:27 Ver:01 <-> 'dp83tc812' : OK
Jan 01 00:00:06.422            io_pkt_v4_hc.262158                 slog      0  EnetPhy_open: PHY 10: open
Jan 01 00:00:06.423            io_pkt_v4_hc.262158                 slog      0  cpsw_alloc:299: Alloc successfull; Virt: 0x238c4e7000, Phys: 0x97b40a000
Jan 01 00:00:06.423            io_pkt_v4_hc.262158                 slog      0  EnetIfMem_init: addr=0x238c4e7000 is  aligned
Jan 01 00:00:06.423            io_pkt_v4_hc.262158                 slog      0  EnetIfMem_init: addr=0x238c4e7000, size=0x221000, gMem=0x238c4e7000, gMemBufPhys=0x97b40a000
Jan 01 00:00:06.423            io_pkt_v4_hc.262158                 slog      0  EnetIfMem_init: gDmaDescMemArray=0x238c4e7000, size=0x200000
Jan 01 00:00:06.423            io_pkt_v4_hc.262158                 slog      0  EnetIfMem_init: gRingMemArray=0x238c6e7000, size=0x21000
Jan 01 00:00:06.423            io_pkt_v4_hc.262158                 slog      0  EnetIfMem_init: gDmaDescMemArrayBasePhys=0x97b40a000, gDmaDescMemArrayBase=0x238c4e7000
Jan 01 00:00:06.425            io_pkt_v4_hc.262158                 slog      0  initQs() freePktInfoQ initialized with 256 pkts
Jan 01 00:00:06.428            io_pkt_v4_hc.262158                 slog     56  [UDMA] eventHandle->globalEvent = 35!!!
Jan 01 00:00:06.428            io_pkt_v4_hc.262158                 slog     56  [UDMA] eventHandle->vintrNum = 38!!!
Jan 01 00:00:06.428            io_pkt_v4_hc.262158                 slog     56  [UDMA] eventHandle->vintrBitNum = 1!!!
Jan 01 00:00:06.428            io_pkt_v4_hc.262158                 slog     56  [UDMA] eventHandle->irIntrNum = 14!!!
Jan 01 00:00:06.428            io_pkt_v4_hc.262158                 slog     56  [UDMA] eventHandle->coreIntrNum = 78!!!
Jan 01 00:00:06.442            io_pkt_v4_hc.262158                 slog      0  EnetIf_registerIntr2: rx isr 78 thread priority set to 21
Jan 01 00:00:06.442            io_pkt_v4_hc.262158                 slog      0  EnetIf_registerIntr2: RX InterruptAttachEvent succeed irq/78 coid/1073741866 event/13
Jan 01 00:00:06.442            io_pkt_v4_hc.262158                 slog      0  Host MAC address:
Jan 01 00:00:06.442            io_pkt_v4_hc.262158                 slog      0  28:b5:e8:cc:1c:21
Jan 01 00:00:06.443            io_pkt_v4_hc.262158                 slog      0  EnetIf_Init: 834 Info EnetIf_Init AleBcastEntry status = 0
Jan 01 00:00:07.895            io_pkt_v4_hc.262158                 slog      0  PHY 10 is alive
Jan 01 00:00:09.823             fotad_tc397.364572                 slog*     0  TC397 OTA Daemon Started.
Jan 01 00:00:09.834         rollback_daemon.372765                 slog*     0  Rollback Daemon Started.
Jan 01 00:00:09.834         rollback_daemon.372765                 slog      0  Rollback Daemon Exited.
Jan 01 00:00:10.636            io_pkt_v4_hc.262158                 slog      0  Dp83tc812_reset: PHY 10: global soft-reset
Jan 01 00:00:11.956            io_pkt_v4_hc.262158                 slog      0  IsMaster is 0x0
Jan 01 00:00:13.144            io_pkt_v4_hc.262158                 slog      0  EnetPhy_setNextState: PHY 10: FOUND -> RESET_WAIT (10 ticks)
Jan 01 00:00:13.377            io_pkt_v4_hc.262158                 slog      0  Dp83tc812_isResetComplete: PHY 10: global soft-reset is complete
Jan 01 00:00:13.377            io_pkt_v4_hc.262158                 slog      0  EnetPhy_setNextState: PHY 10: RESET_WAIT -> ENABLE (0 ticks)
Jan 01 00:00:13.478            io_pkt_v4_hc.262158                 slog      0  EnetPhy_enableState: PHY 10: enable
Jan 01 00:00:13.742            io_pkt_v4_hc.262158                 slog      0  Dp83tc812_restart: PHY 10: soft-restart
Jan 01 00:00:14.006            io_pkt_v4_hc.262158                 slog      0  Dp83tc812_setMiiMode: PHY 10: MII mode: 3
Jan 01 00:00:14.798            io_pkt_v4_hc.262158                 slog      0  Dp83tc812_setClkDelay: PHY 10: set delay 0 ps TX, 0 ps RX
Jan 01 00:00:16.382            io_pkt_v4_hc.262158                 slog      0  Dp83tc812_setTxFifoDepth: PHY 10: set FIFO depth 5
Jan 01 00:00:16.646            io_pkt_v4_hc.262158                 slog      0  Dp83tc812_setLedMode: PHY 10: set LED0 = mode0, LED1 = mode0, LED2 = mode1, LED3 = mode0
Jan 01 00:00:16.778            io_pkt_v4_hc.262158                 slog      0  EnetPhy_enableState: PHY 10: req caps: FD100
Jan 01 00:00:16.910            io_pkt_v4_hc.262158                 slog      0  EnetPhy_enableState: PHY 10: PHY caps: FD100 HD100
Jan 01 00:00:16.910            io_pkt_v4_hc.262158                 slog      0  EnetPhy_enableState: PHY 10: MAC caps: FD1000 FD100 HD100 FD10 HD10
Jan 01 00:00:16.910            io_pkt_v4_hc.262158                 slog      0  EnetPhy_enableState: PHY 10: refined caps: FD100
Jan 01 00:00:17.042            io_pkt_v4_hc.262158                 slog      0  EnetPhy_enableState: PHY 10: PHY is not NWAY-capable
Jan 01 00:00:17.042            io_pkt_v4_hc.262158                 slog      0  EnetPhy_enableState: PHY 10: falling back to manual mode
Jan 01 00:00:17.042            io_pkt_v4_hc.262158                 slog      0  EnetPhy_enableState: PHY 10: new link caps: FD100
Jan 01 00:00:17.042            io_pkt_v4_hc.262158                 slog      0  EnetPhy_enableState: PHY 10: manual setup
Jan 01 00:00:17.306            io_pkt_v4_hc.262158                 slog      0  EnetPhy_setupManual: PHY 10: requested mode: 100 Mbps full-duplex
Jan 01 00:00:17.306            io_pkt_v4_hc.262158                 slog      0  EnetPhy_setNextState: PHY 10: ENABLE -> LINK_WAIT (50 ticks)
Jan 01 00:00:17.539            io_pkt_v4_hc.262158                 slog      0  EnetPhy_setNextState: PHY 10: LINK_WAIT -> LINKED (0 ticks)
Jan 01 00:00:17.539            io_pkt_v4_hc.262158                 slog      0  Cpsw_isPortLinkUp: Port 1: Sublayer 1 doesn't support link status
Jan 01 00:00:17.539            io_pkt_v4_hc.262158                 slog      0  Cpsw_handleLinkUp: Port 1: Link up: 100-Mbps Full-Duplex
Jan 01 00:00:17.539            io_pkt_v4_hc.262158                 slog      0  cpsw_init:1070 Phy is linked
Jan 01 00:00:17.539            io_pkt_v4_hc.262158                 slog      0  cpsw_filter: Clear IFF_ALLMULTI
Jan 01 00:00:17.539            io_pkt_v4_hc.262158                 slog      0  cpsw_filter: Adding Multicast MAC Addr -> 01:00:5e:00:00:01
Jan 01 00:00:17.543            io_pkt_v4_hc.262158                 slog      0  cpsw_filter: Clear IFF_ALLMULTI
Jan 01 00:00:17.543            io_pkt_v4_hc.262158                 slog      0  cpsw_filter: Adding Multicast MAC Addr -> 01:80:c2:00:00:0e
Jan 01 00:00:17.543            io_pkt_v4_hc.262158                 slog      0  cpsw_filter: Adding Multicast MAC Addr -> 01:00:5e:00:00:01
Jan 01 00:00:17.550                   iopkt.262158          main_buffer      0  pfioctl: active_fib=0: cmd = 0xffffffffc0104451, error = 309
Jan 01 00:00:17.551                   iopkt.262158          main_buffer      0  pfioctl: active_fib=0: cmd = 0xffffffffc0104452, error = 309
May 27 04:11:20.074                       dumper.4                 slog*     0  run fault pid 262158 tid 5 signal 10 code 3 ip 0x54207477fc proc/boot/io-pkt-v4-hc
May 27 04:11:20.074                       dumper.4                 slog      0  pid 262158 core file created at /tmp/io-pkt-v4-hc.core

    The command of start CPSW2G:

    io-pkt-v4-hc -p pf-v4 -d cpsw2g-main mac-to-mac=1,speed=100,ptp=1 -d cpsw2g speed=100

    When I re-enabled the network and configured the IP address (ifconfig an0 192.168.6.90), it showed below message:

    May 27 04:59:06.103           io_pkt_v4_hc.1146894                 slog      0  Enabling clocks!
May 27 04:59:06.105           io_pkt_v4_hc.1146894                 slog      0  EnetIf_reduceCoreMacAllocation: Reduced Mac Address Allocation for CoreId:3 From 1 To 0
May 27 04:59:06.105           io_pkt_v4_hc.1146894                 slog      0  ENET_CPSW_2G on MAIN NAVSS
May 27 04:59:06.110           io_pkt_v4_hc.1146894                 slog     56  [UDMA] Calling Udma_resmgr_open
May 27 04:59:06.110           io_pkt_v4_hc.1146894                 slog     56  [UDMA] Opening resmgr!!!
May 27 04:59:06.111           io_pkt_v4_hc.1146894                 slog     56  [UDMA] Opened resmgr fd=6!!!
May 27 04:59:06.111           io_pkt_v4_hc.1146894                 slog     56  [UDMA] eventHandle->vintrNum = 40!!!
May 27 04:59:06.111           io_pkt_v4_hc.1146894                 slog     56  [UDMA] eventHandle->irIntrNum = 16!!!
May 27 04:59:06.111           io_pkt_v4_hc.1146894                 slog     56  [UDMA] eventHandle->coreIntrNum = 80!!!
May 27 04:59:06.122           io_pkt_v4_hc.1146894                 slog      0  EnetIf_registerIntr2: tx isr 80 thread priority set to 21
May 27 04:59:06.123           io_pkt_v4_hc.1146894                 slog      0  EnetIf_CreateISRThread: InterruptAttachEvent succeed irq/80 coid/1073741850 event/b
May 27 04:59:06.123           io_pkt_v4_hc.1146894                 slog      0  Enet_open: main.cpsw2g: features: 0x00000002
May 27 04:59:06.123           io_pkt_v4_hc.1146894                 slog      0  Enet_open: main.cpsw2g: errata  : 0x00000000
May 27 04:59:06.123           io_pkt_v4_hc.1146894                 slog      0  Mdio_open: MDIO manual mode enabled
May 27 04:59:06.124           io_pkt_v4_hc.1146894                 slog      0  cpsw_alloc:299: Alloc successfull; Virt: 0x4db8732000, Phys: 0x97b180000
May 27 04:59:06.124           io_pkt_v4_hc.1146894                 slog      0  EnetUdma_memMgrInit: addr=0x4db8732000 is  aligned
May 27 04:59:06.125               tisci_mgr.208909                 slog    130  Error: ti_sci_msg_xfer (257): sciclient service call failed on ACK
May 27 04:59:06.125           io_pkt_v4_hc.1146894                 slog     56  [UDMA] [Error] RM PSI Pairing failed!!!
May 27 04:59:06.125           io_pkt_v4_hc.1146894                 slog     56  [UDMA] [Error] UDMA channel paring failed!!
May 27 04:59:06.125           io_pkt_v4_hc.1146894                 slog      0  EnetUdma_openRxCh: [Enet UDMA] UDMA RX Channel open failed: 0xffffffff
May 27 04:59:06.125           io_pkt_v4_hc.1146894                 slog      0  EnetHostPortDma_open: Failed to open Enet DMA RX channel: -1
May 27 04:59:06.125           io_pkt_v4_hc.1146894                 slog      0  Cpsw_openInternal: CPSW: Failed to open CPSW DMA
May 27 04:59:06.125           io_pkt_v4_hc.1146894                 slog      0  Cpsw_closeInternal:
May 27 04:59:06.125           io_pkt_v4_hc.1146894                 slog      0
Assertion @ Line: 930 in src/per/cpsw.c: hCpsw->hRxRsvdFlow != NULL : failed !!!
May 27 04:59:06.125           io_pkt_v4_hc.1146894                 slog      0  Cpsw_closeInternal:
May 27 04:59:06.125           io_pkt_v4_hc.1146894                 slog      0
Assertion @ Line: 932 in src/per/cpsw.c: status == ENET_SOK : failed !!!
May 27 04:59:06.125           io_pkt_v4_hc.1146894                 slog      0  EnetMod_ioctl: main.cpsw2g.rm: Module is not open
May 27 04:59:06.125           io_pkt_v4_hc.1146894                 slog      0  Cpsw_closeInternal:
May 27 04:59:06.125           io_pkt_v4_hc.1146894                 slog      0
Assertion @ Line: 940 in src/per/cpsw.c: status == ENET_SOK : failed !!!
May 27 04:59:06.125           io_pkt_v4_hc.1146894                 slog      0  Cpsw_closeInternal:
May 27 04:59:06.125           io_pkt_v4_hc.1146894                 slog      0
Assertion @ Line: 942 in src/per/cpsw.c: hCpsw->hDma != NULL : failed !!!
May 27 04:59:06.126                       dumper.4                 slog      0  run fault pid 1146894 tid 2 signal 6 code 0 ip 0x1c894e7420 proc/boot/io-pkt-v4-hc
May 27 04:59:06.127                       dumper.4                 slog      0  pid 1146894 core file created at /tmp/io-pkt-v4-hc.core

    Thanks.

    Best regards,

    Namic Chang

  • 0 in reply to Namic Chang
    TI__Mastermind 48033 points

    Hi Namic,

    Namic Chang said:
    And it cannot find the command of "pidgin ar".

    There was a typo in my previous command, which I have corrected now. It is "pidin ar"

    Namic Chang said:

    The command of start CPSW2G:

    Fullscreen
    1
    io-pkt-v4-hc -p pf-v4 -d cpsw2g-main mac-to-mac=1,speed=100,ptp=1 -d cpsw2g speed=100
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    When I re-enabled the network and configured the IP address (ifconfig an0 192.168.6.90), it showed below message:

    We see you are using cpsw2g-main. Are you trying to enable the CPSW2G instance on the Main domain, or are you planning to use the MCU domain CPSW2G? Also, you are trying to use mac-to-mac=1. Can you explain?

    Also, we can't use the two -d option in the same command line. Just try using one and share the logs.

    Thanks.

  • 0 in reply to Praveen Rao
    Prodigy 250 points

    Hi, Praveen:

    We used  both the cpsw2g-main and cpsw2g.

    For cpsw2g-main, the hardware design is fixed-link and we got the configuration from below question:

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1275240/tda4al-q1-tda4al-how-to-configure-the-rgmii-of-cpsw2g-main-for-external-eth-switch-in-qnx

    If we can't use the two "-d" option on io-pkt-v4-hc to enable two network interface, how can we do ?

    Thanks.

  • 0 in reply to Namic Chang
    TI__Mastermind 48033 points

    Hi Namic,

    Namic Chang said:
    If we can't use the two "-d" option on io-pkt-v4-hc to enable two network interface, how can we do ?

    At least we have been unable to get two "-d" options working. But we have found a way to start each driver instance separately as below:

    > io-pkt-v6-hc

    > mount -T io-pkt  devnp-cpsw2g.son -o speed=100

    > if_up -p am0

    > mount -T io-pkt devnp-cpsw2g-main.so -o mac-to-mac=1,speed=100,ptp=1

    > if_up -p an0

    Note that if you get an error saying the .so file was not found, specify the full path to the location where the .so file is present on the filesystem. Please try this and let us know.

    Thanks.

  • 0 in reply to Praveen Rao
    Prodigy 250 points

    Hi, Praveen:

    Thanks for your example code.

    I modified as below and it can load cpsw2g-main and cpsw2g with passing correct parameters:

    io-pkt-v6-hc

mount -T io-pkt -o mac-to-mac=1,speed=100,ptp=1 devnp-cpsw2g-main.so
if_up -p an0

mount -T io-pkt -o speed=100 devnp-cpsw2g.so
if_up -p am0

    And we need to enable IP filter services, so I add below code:

    mount -T io-pkt lsm-pf-v6.so

    Could you please help to confirm whether it is right or not ?

    Thanks.

  • 0 in reply to Namic Chang
    TI__Mastermind 48033 points
    Namic Chang said:
    And we need to enable IP filter services, so I add below code:

    We suggest you check with Blackberry QNX on how to use the IP filter services, as they own this network stack feature.

    Thanks.

  • 0 in reply to Praveen Rao
    Prodigy 250 points

    Hi, Praveen:

    I used below commands to enable network driver and run iperf3 to test.

    io-pkt-v4-hc

mount -T io-pkt -o mac-to-mac=1,speed=100,ptp=1 devnp-cpsw2g-main.so
if_up -p an0

mount -T io-pkt -o speed=100 devnp-cpsw2g.so
if_up -p am0

    After running iperf3 for a while, it occurred the same crash of io-pkt-v4-hc.

    TDCU4@QNX:/# iperf3 -c 192.168.18.18 -t 3600
Connecting to host 192.168.18.18, port 5201
[  5] local 192.168.18.19 port 65534 connected to 192.168.18.18 port 5201
[ ID] Interval           Transfer     Bitrate
[  5]   0.00-1.00   sec  11.2 MBytes  94.0 Mbits/sec
[  5]   1.00-2.00   sec  9.75 MBytes  81.8 Mbits/sec
[  5]   2.00-3.00   sec  11.2 MBytes  94.0 Mbits/sec
[  5]   3.00-4.00   sec  9.75 MBytes  81.8 Mbits/sec
.........
[  5] 2379.00-2380.00 sec  9.68 MBytes  81.2 Mbits/sec
[  5] 2380.00-2381.00 sec  11.2 MBytes  94.1 Mbits/sec
[  5] 2381.00-2382.00 sec  9.75 MBytes  81.8 Mbits/sec
[  5] 2382.00-2383.00 sec  11.2 MBytes  94.1 Mbits/sec
[  5] 2383.00-2384.00 sec  9.76 MBytes  81.9 Mbits/sec
[  5] 2384.00-2385.00 sec  11.2 MBytes  94.1 Mbits/sec
iperf3: error - unable to write to stream socket: No such device or address
TDCU4@QNX:/#
Process 270350 (io-pkt-v4-hc) terminated SIGBUS code=3 fltno=6 ip=00000020e886f7fc(/proc/boot/libc.so.5@pthread_mutex_unlock+0x0000000000000044) mapaddr=00000000000367fc.

    The slog:

    Jan 01 00:00:00.023                       random.5                  low*     0  qcrypto: loading configuration file '/etc/qcrypto.conf' [qcrypto_common.c(190)]
Jan 01 00:00:00.023                    random.5..0                 slog*   700  Random is using the Fortuna PRNG
Jan 01 00:00:00.029                       random.5                  low      0  qcrypto: 'openssl' plugin loaded [qcrypto_plugins.c(354)]
Jan 01 00:00:00.029                    random.5..0                 slog    700  Selecting timer as an entropy source
Jan 01 00:00:00.030                    random.5..0                 slog    700  Registered path names
Jan 01 00:00:00.030                    random.5..0                 slog    700  random: starting resmgr
Jan 01 00:00:00.030                    random.5..0                 slog    700  random: Daemonizing the process
Jan 01 00:00:00.046             devb_sdmmc_am65x.9                 slog*  1800  devb-sdmmc-am65x 1.00A (Nov  4 2024 02:46:55)
Jan 01 00:00:00.046             devb_sdmmc_am65x.9                 slog      0  libcam.so (Sep  3 2021 11:57:38) bver 7010004
Jan 01 00:00:00.047             devb_sdmmc_am65x.9                 slog   1800  sdio_cd:  insertion path 0, cd state 0x1
Jan 01 00:00:00.049            devb_sdmmc_am65x.10                 slog*  1800  devb-sdmmc-am65x 1.00A (Nov  4 2024 02:46:55)
Jan 01 00:00:00.049            devb_sdmmc_am65x.10                 slog      0  libcam.so (Sep  3 2021 11:57:38) bver 7010004
Jan 01 00:00:00.132             devb_sdmmc_am65x.9                 slog   1800  MMC CID:
Jan 01 00:00:00.132             devb_sdmmc_am65x.9                 slog   1800    MID 0x45, OID 0x0, PNM DG4016
Jan 01 00:00:00.132             devb_sdmmc_am65x.9                 slog   1800    PRV 0x1, PSN 0x4426ec2e, MDT 1-2024
Jan 01 00:00:00.132             devb_sdmmc_am65x.9                 slog   1800  MMC CSD:
Jan 01 00:00:00.132             devb_sdmmc_am65x.9                 slog   1800    CSD_STRUCTURE 3, SPEC_VERS 4, CCC 0x8f5
Jan 01 00:00:00.132             devb_sdmmc_am65x.9                 slog   1800    TAAC 15, NSAC 0, TRAN_SPEED 50
Jan 01 00:00:00.132             devb_sdmmc_am65x.9                 slog   1800    C_SIZE 4095, C_SIZE_MULT 7
Jan 01 00:00:00.132             devb_sdmmc_am65x.9                 slog   1800    READ_BL_LEN 9, WRITE_BL_LEN 9
Jan 01 00:00:00.132             devb_sdmmc_am65x.9                 slog   1800    ERASE GRP_SIZE 31, GRP_MULT 31, SIZE 0
Jan 01 00:00:00.132             devb_sdmmc_am65x.9                 slog   1800    blksz 512, sectors 2097152, dtr 25000000
Jan 01 00:00:00.132             devb_sdmmc_am65x.9                 slog   1800  MMC EXT CSD:
Jan 01 00:00:00.132             devb_sdmmc_am65x.9                 slog   1800    DEVICE_TYPE 0x57, EXT_CSD_REV 8
Jan 01 00:00:00.132             devb_sdmmc_am65x.9                 slog   1800    SEC_COUNT 30777344, dtr 200000000
Jan 01 00:00:00.132             devb_sdmmc_am65x.9                 slog   1800    HC_ERASE_GRP_SIZE 1, HC_WP_GRP_SIZE 16
Jan 01 00:00:00.132             devb_sdmmc_am65x.9                 slog   1800    STROBE 0x1, BKOPS_EN 0x2
Jan 01 00:00:00.132             devb_sdmmc_am65x.9                 slog   1800    Driver type: 0x0
Jan 01 00:00:00.132             devb_sdmmc_am65x.9                 slog   1800  CFG:  Timing HS200, DTR 200000000, Bus Width 8 bit

Jan 01 00:00:00.132             devb_sdmmc_am65x.9                 slog    100  cam-disk.so (Sep  3 2021 11:57:42)
Jan 01 00:00:00.270               tisci_mgr.208909                 slog*   130  TI SCI ResMgr for SOC J721S2 (version=PSDKQNX_08_06_00, date=Mon Nov 4 02:46:10 UTC 2024)
Jan 01 00:00:00.271               tisci_mgr.208909                 slog    130   SYSFW Firmware Version 8.6.3--1-g2249f (Chill Capybara
Jan 01 00:00:00.271               tisci_mgr.208909                 slog    130   SYSFW Firmware revision 0x8
Jan 01 00:00:00.271               tisci_mgr.208909                 slog    130   SYSFW ABI revision 3.1
Jan 01 00:00:00.307          shmemallocator.233487                 slog*   129  TI Shared memory Allocator for SOC J721S2 (version=PSDKQNX_08_06_00, date=Mon Nov 4 02:46:10 UTC 2024)
Jan 01 00:00:00.307          shmemallocator.233487                 slog    129  initSHM:Block[0] @ 0xb8000000 has free-mem = 0x20000000 - 512 M
Jan 01 00:00:00.307          shmemallocator.233487                 slog    129  initSHM:Block[1] @ 0xe6000000 has free-mem = 0x2000000 - 32 M
Jan 01 00:00:00.359               tiipc_mgr.237584                 slog*   133  TI IPC ResMgr for SOC J721S2 (version=PSDKQNX_08_06_00, date=Mon Nov 4 02:46:10 UTC 2024)
Jan 01 00:00:00.359               tiipc_mgr.237584                 slog    133  tiipc-mgr: Starting TI IPC Resmgr
Jan 01 00:00:00.359               tiipc_mgr.237584                 slog    133  tiipc-mgr: Using VRING base address: 0xa8000000, size:0x1c00000
Jan 01 00:00:00.394               tiipc_mgr.237584                 slog    133  [IPC]
Jan 01 00:00:00.394               tiipc_mgr.237584                 slog    133  Mailbox_plugInterrupt: interrupt Number 489, arg 0x2E8AC0C8

Jan 01 00:00:00.428               tiipc_mgr.237584                 slog    133  [IPC]
Jan 01 00:00:00.428               tiipc_mgr.237584                 slog    133  Mailbox_plugInterrupt: interrupt Number 490, arg 0x2E8AC268

Jan 01 00:00:00.462               tiipc_mgr.237584                 slog    133  [IPC]
Jan 01 00:00:00.462               tiipc_mgr.237584                 slog    133  Mailbox_plugInterrupt: interrupt Number 491, arg 0x2E8AC408

Jan 01 00:00:00.496               tiipc_mgr.237584                 slog    133  [IPC]
Jan 01 00:00:00.496               tiipc_mgr.237584                 slog    133  Mailbox_plugInterrupt: interrupt Number 492, arg 0x2E8AC5A8

Jan 01 00:00:00.506              tiudma_mgr.249868                 slog*   131  TI UDMA ResMgr for SOC J721S2 (version=PSDKQNX_08_06_00, date=Mon Nov 4 02:46:10 UTC 2024)
Jan 01 00:00:01.141                   iopkt.270350          main_buffer*     0  tcpip starting
Jan 01 00:00:01.142                   iopkt.270350          main_buffer      0  smmu support is disabled
Jan 01 00:00:01.143                   iopkt.270350          main_buffer      0  initializing IPsec...
Jan 01 00:00:01.143                   iopkt.270350          main_buffer      0   done

Jan 01 00:00:01.143                   iopkt.270350          main_buffer      0  IPsec: Initialized Security Association Processing.

Jan 01 00:00:01.164                   iopkt.270350          main_buffer      0  devnp-cpsw2g-main.so mac-to-mac=1,speed=100,ptp=1
Jan 01 00:00:01.164                   iopkt.270350          main_buffer      0  an0

Jan 01 00:00:01.164            io_pkt_v4_hc.270350                 slog*     0  cpsw_entry:546 Entry -->
Jan 01 00:00:01.164            io_pkt_v4_hc.270350                 slog      0  cpsw_attach:718 Entry -->
Jan 01 00:00:01.164            io_pkt_v4_hc.270350                 slog      0  cpsw_parse_options:222 mac_to_mac -->1
Jan 01 00:00:01.164            io_pkt_v4_hc.270350                 slog      0  cpsw_parse_options:235 speed -->100
Jan 01 00:00:01.164            io_pkt_v4_hc.270350                 slog      0  cpsw_parse_options:210 PTP -->1
Jan 01 00:00:01.165            io_pkt_v4_hc.270350                 slog      0  Enable RGMII delay, regData = 0x12
Jan 01 00:00:01.165            io_pkt_v4_hc.270350                 slog      0  Success - write to MAIN_ENET_CTRL - 0x12
Jan 01 00:00:01.165            io_pkt_v4_hc.270350                 slog      0  Success - write to MAIN CPSW_CLKSEL - 0x0
Jan 01 00:00:01.165            io_pkt_v4_hc.270350                 slog      0  Pinmux for 0x172960c0=0x50006 (org=0x40007)
Jan 01 00:00:01.165            io_pkt_v4_hc.270350                 slog      0  Pinmux for 0x172960bc=0x50006 (org=0x40007)
Jan 01 00:00:01.165            io_pkt_v4_hc.270350                 slog      0  Pinmux for 0x172960b8=0x50006 (org=0x50006)
Jan 01 00:00:01.165            io_pkt_v4_hc.270350                 slog      0  Pinmux for 0x172960a0=0x50006 (org=0x50006)
Jan 01 00:00:01.165            io_pkt_v4_hc.270350                 slog      0  Pinmux for 0x172960a4=0x50006 (org=0x50006)
Jan 01 00:00:01.165            io_pkt_v4_hc.270350                 slog      0  Pinmux for 0x172960a8=0x50006 (org=0x50006)
Jan 01 00:00:01.165            io_pkt_v4_hc.270350                 slog      0  Pinmux for 0x172960b0=0x50006 (org=0x50006)
Jan 01 00:00:01.165            io_pkt_v4_hc.270350                 slog      0  Pinmux for 0x172960ac=0x50006 (org=0x50006)
Jan 01 00:00:01.165            io_pkt_v4_hc.270350                 slog      0  Pinmux for 0x1729608c=0x50006 (org=0x10006)
Jan 01 00:00:01.165            io_pkt_v4_hc.270350                 slog      0  Pinmux for 0x17296090=0x50006 (org=0x10006)
Jan 01 00:00:01.165            io_pkt_v4_hc.270350                 slog      0  Pinmux for 0x17296094=0x50006 (org=0x10006)
Jan 01 00:00:01.165            io_pkt_v4_hc.270350                 slog      0  Pinmux for 0x17296098=0x50006 (org=0x10006)
Jan 01 00:00:01.165            io_pkt_v4_hc.270350                 slog      0  Pinmux for 0x172960b4=0x50006 (org=0x10006)
Jan 01 00:00:01.165            io_pkt_v4_hc.270350                 slog      0  Pinmux for 0x1729609c=0x50006 (org=0x10006)
Jan 01 00:00:01.191                   iopkt.270350          main_buffer      0  devnp-cpsw2g.so speed=100
Jan 01 00:00:01.191                   iopkt.270350          main_buffer      0  am0

Jan 01 00:00:01.191            io_pkt_v4_hc.270350                 slog      0  cpsw_entry:546 Entry -->
Jan 01 00:00:01.191            io_pkt_v4_hc.270350                 slog      0  cpsw_attach:718 Entry -->
Jan 01 00:00:01.191            io_pkt_v4_hc.270350                 slog      0  cpsw_parse_options:235 speed -->100
Jan 01 00:00:01.191            io_pkt_v4_hc.270350                 slog      0  Success - write to MCU_ENET_CTRL - 0x12
Jan 01 00:00:01.191            io_pkt_v4_hc.270350                 slog      0  Success - write to MCU_ENET_CLKSEL - 0xf00
Jan 01 00:00:01.220            io_pkt_v4_hc.270350                 slog      0  Enabling clocks!

Jan 01 00:00:01.221            io_pkt_v4_hc.270350                 slog      0  EnetIf_reduceCoreMacAllocation: Reduced Mac Address Allocation for CoreId:3 From 1 To 0
Jan 01 00:00:01.221            io_pkt_v4_hc.270350                 slog      0  ENET_CPSW_2G on MAIN NAVSS
Jan 01 00:00:01.222                      console.2                  out*     0  [327702] Jan 01 00:00:01 cron: started
Jan 01 00:00:01.226            io_pkt_v4_hc.270350                 slog     56  [UDMA] Calling Udma_resmgr_open
Jan 01 00:00:01.226            io_pkt_v4_hc.270350                 slog     56  [UDMA] Opening resmgr!!!
Jan 01 00:00:01.227            io_pkt_v4_hc.270350                 slog     56  [UDMA] Opened resmgr fd=6!!!
Jan 01 00:00:01.227            io_pkt_v4_hc.270350                 slog     56  [UDMA] eventHandle->vintrNum = 35!!!

Jan 01 00:00:01.227            io_pkt_v4_hc.270350                 slog     56  [UDMA] eventHandle->irIntrNum = 11!!!

Jan 01 00:00:01.227            io_pkt_v4_hc.270350                 slog     56  [UDMA] eventHandle->coreIntrNum = 75!!!

Jan 01 00:00:01.229         pmic_presetting.327705                 slog*     0  Board_ID = 0xc

Jan 01 00:00:01.239            io_pkt_v4_hc.270350                 slog      0  EnetIf_registerIntr2: tx isr 75 thread priority set to 21

Jan 01 00:00:01.239            io_pkt_v4_hc.270350                 slog      0  EnetIf_CreateISRThread: InterruptAttachEvent succeed irq/75 coid/1073741849 event/c

Jan 01 00:00:01.239            io_pkt_v4_hc.270350                 slog      0  Enet_open: main.cpsw2g: features: 0x00000002

Jan 01 00:00:01.239            io_pkt_v4_hc.270350                 slog      0  Enet_open: main.cpsw2g: errata  : 0x00000000

Jan 01 00:00:01.239            io_pkt_v4_hc.270350                 slog      0  Mdio_open: MDIO manual mode enabled

Jan 01 00:00:01.240            io_pkt_v4_hc.270350                 slog      0  cpsw_alloc:299: Alloc successfull; Virt: 0x582025d000, Phys: 0x97b180000
Jan 01 00:00:01.240            io_pkt_v4_hc.270350                 slog      0  EnetUdma_memMgrInit: addr=0x582025d000 is  aligned
Jan 01 00:00:01.240         pmic_presetting.327705                 slog      0  Bind I2C0 Driver

Jan 01 00:00:01.240         pmic_presetting.327705                 slog      0  Prepare to Clear PMIC A/B/C Interrupts notification

Jan 01 00:00:01.242            io_pkt_v4_hc.270350                 slog      0  EnetIf_registerIntr: some unknown cpsw isr thread priority set to 21

Jan 01 00:00:01.242            io_pkt_v4_hc.270350                 slog      0  EnetIf_CreateISRThread: InterruptAttachEvent succeed irq/51 coid/1073741853 event/d

Jan 01 00:00:01.242            io_pkt_v4_hc.270350                 slog      0  EnetIf_registerIntr: some unknown cpsw isr thread priority set to 21

Jan 01 00:00:01.242            io_pkt_v4_hc.270350                 slog      0  EnetIf_CreateISRThread: InterruptAttachEvent succeed irq/53 coid/1073741855 event/e

Jan 01 00:00:01.243            io_pkt_v4_hc.270350                 slog      0  cpsw_alloc:299: Alloc successfull; Virt: 0x58202f9000, Phys: 0x97b194000
Jan 01 00:00:01.243            io_pkt_v4_hc.270350                 slog      0  EnetIfMem_init: addr=0x58202f9000 is  aligned
Jan 01 00:00:01.243            io_pkt_v4_hc.270350                 slog      0  EnetIfMem_init: addr=0x58202f9000, size=0x221000, gMem=0x58202f9000, gMemBufPhys=0x97b194000
Jan 01 00:00:01.243            io_pkt_v4_hc.270350                 slog      0  EnetIfMem_init: gDmaDescMemArray=0x58202f9000, size=0x200000
Jan 01 00:00:01.243            io_pkt_v4_hc.270350                 slog      0  EnetIfMem_init: gRingMemArray=0x58204f9000, size=0x21000
Jan 01 00:00:01.244            io_pkt_v4_hc.270350                 slog      0  EnetIfMem_init: gDmaDescMemArrayBasePhys=0x97b194000, gDmaDescMemArrayBase=0x58202f9000
Jan 01 00:00:01.244         pmic_presetting.327705                 slog      0  Done

Jan 01 00:00:01.244         pmic_presetting.327705                 slog      0  Checking PMIC A settings...

Jan 01 00:00:01.246            io_pkt_v4_hc.270350                 slog      0  initQs() freePktInfoQ initialized with 256 pkts
Jan 01 00:00:01.248            io_pkt_v4_hc.270350                 slog     56  [UDMA] eventHandle->globalEvent = 34!!!

Jan 01 00:00:01.248            io_pkt_v4_hc.270350                 slog     56  [UDMA] eventHandle->vintrNum = 36!!!

Jan 01 00:00:01.248            io_pkt_v4_hc.270350                 slog     56  [UDMA] eventHandle->vintrBitNum = 0!!!

Jan 01 00:00:01.249            io_pkt_v4_hc.270350                 slog     56  [UDMA] eventHandle->irIntrNum = 12!!!

Jan 01 00:00:01.249            io_pkt_v4_hc.270350                 slog     56  [UDMA] eventHandle->coreIntrNum = 76!!!

Jan 01 00:00:01.251         pmic_presetting.327705                 slog      0  LDO2 OV/UV threshold error, reset to 5pct. ret=0x3f

Jan 01 00:00:01.256         pmic_presetting.327705                 slog      0

Jan 01 00:00:01.256         pmic_presetting.327705                 slog      0  Checking PMIC B settings...

Jan 01 00:00:01.256         pmic_presetting.327705                 slog      0  board_id=12

Jan 01 00:00:01.259         pmic_presetting.327705                 slog      0  BULK2 VOUT register is not 1.2V, reset to 1.2V

Jan 01 00:00:01.261         pmic_presetting.327705                 slog      0  BULK2 OV/UV threshold error, reset to 5pct. ret=0x3f

Jan 01 00:00:01.264            io_pkt_v4_hc.270350                 slog      0  EnetIf_registerIntr2: rx isr 76 thread priority set to 21

Jan 01 00:00:01.264            io_pkt_v4_hc.270350                 slog      0  EnetIf_registerIntr2: RX InterruptAttachEvent succeed irq/76 coid/1073741856 event/f

Jan 01 00:00:01.264            io_pkt_v4_hc.270350                 slog      0  Host MAC address:
Jan 01 00:00:01.264            io_pkt_v4_hc.270350                 slog      0  70:ff:76:1d:92:c1
Jan 01 00:00:01.265            io_pkt_v4_hc.270350                 slog      0  EnetIf_Init: 834 Info EnetIf_Init AleBcastEntry status = 0

Jan 01 00:00:01.271         pmic_presetting.327705                 slog      0  LDO2 OV/UV threshold error, reset to 5pct. ret=0x3f

Jan 01 00:00:01.275         pmic_presetting.327705                 slog      0

Jan 01 00:00:01.275         pmic_presetting.327705                 slog      0  Checking PMIC C settings...

Jan 01 00:00:01.278         pmic_presetting.327705                 slog      0

Jan 01 00:00:05.357            io_pkt_v4_hc.270350                 slog      0  EnetIf_PtpInit:562 PTP
Jan 01 00:00:05.357            io_pkt_v4_hc.270350                 slog      0  EnetIf_PtpInit:582 CPSW_CPTS_IOCTL_REGISTER_STACK is sucessful
Jan 01 00:00:05.357            io_pkt_v4_hc.270350                 slog      0  cpsw_init:1070 Phy is linked
Jan 01 00:00:05.357            io_pkt_v4_hc.270350                 slog      0  cpsw_filter: Clear IFF_ALLMULTI
Jan 01 00:00:05.357            io_pkt_v4_hc.270350                 slog      0  cpsw_filter: Adding Multicast MAC Addr -> 01:00:5e:00:00:01
Jan 01 00:00:05.357            io_pkt_v4_hc.270350                 slog      0  EnetIf_reduceCoreMacAllocation: Reduced Mac Address Allocation for CoreId:4 From 1 To 0
Jan 01 00:00:05.357            io_pkt_v4_hc.270350                 slog      0  EnetIf_reduceCoreMacAllocation: Reduced Mac Address Allocation for CoreId:1 From 1 To 0
Jan 01 00:00:05.357            io_pkt_v4_hc.270350                 slog      0  ENET_CPSW_2G on MCU NAVSS
Jan 01 00:00:05.360            io_pkt_v4_hc.270350                 slog     56  [UDMA] Calling Udma_resmgr_open
Jan 01 00:00:05.360            io_pkt_v4_hc.270350                 slog     56  [UDMA] Opening resmgr!!!
Jan 01 00:00:05.360            io_pkt_v4_hc.270350                 slog     56  [UDMA] Opened resmgr fd=8!!!
Jan 01 00:00:05.361            io_pkt_v4_hc.270350                 slog     56  [UDMA] eventHandle->vintrNum = 37!!!

Jan 01 00:00:05.361            io_pkt_v4_hc.270350                 slog     56  [UDMA] eventHandle->irIntrNum = 13!!!

Jan 01 00:00:05.361            io_pkt_v4_hc.270350                 slog     56  [UDMA] eventHandle->coreIntrNum = 77!!!

Jan 01 00:00:05.368            io_pkt_v4_hc.270350                 slog      0  EnetIf_registerIntr2: tx isr 77 thread priority set to 21

Jan 01 00:00:05.368            io_pkt_v4_hc.270350                 slog      0  EnetIf_CreateISRThread: InterruptAttachEvent succeed irq/77 coid/1073741858 event/10

Jan 01 00:00:05.368            io_pkt_v4_hc.270350                 slog      0  Enet_open: cpsw2g: features: 0x00000002

Jan 01 00:00:05.368            io_pkt_v4_hc.270350                 slog      0  Enet_open: cpsw2g: errata  : 0x00000000

Jan 01 00:00:05.368            io_pkt_v4_hc.270350                 slog      0  Mdio_open: MDIO manual mode enabled

Jan 01 00:00:05.369            io_pkt_v4_hc.270350                 slog      0  cpsw_alloc:299: Alloc successfull; Virt: 0x582951d000, Phys: 0x97b3f6000
Jan 01 00:00:05.369            io_pkt_v4_hc.270350                 slog      0  EnetUdma_memMgrInit: addr=0x582951d000 is  aligned
Jan 01 00:00:05.371            io_pkt_v4_hc.270350                 slog      0  EnetIf_registerIntr: cpsw stat isr thread priority set to 21

Jan 01 00:00:05.371            io_pkt_v4_hc.270350                 slog      0  EnetIf_CreateISRThread: InterruptAttachEvent succeed irq/888 coid/1073741862 event/11

Jan 01 00:00:05.371            io_pkt_v4_hc.270350                 slog      0  EnetIf_registerIntr: cpsw cpts isr thread priority set to 22

Jan 01 00:00:05.371            io_pkt_v4_hc.270350                 slog      0  EnetIf_CreateISRThread: InterruptAttachEvent succeed irq/890 coid/1073741864 event/12

Jan 01 00:00:05.371            io_pkt_v4_hc.270350                 slog      0  SetPhyConfig: got phy address = 10

Jan 01 00:00:05.503            io_pkt_v4_hc.270350                 slog      0  EnetPhy_setNextState: PHY 10: INIT -> FINDING (20 ticks)

Jan 01 00:00:05.503            io_pkt_v4_hc.270350                 slog      0  EnetPhy_setNextState: PHY 10: FINDING -> FOUND (0 ticks)

Jan 01 00:00:05.899            io_pkt_v4_hc.270350                 slog      0  EnetPhy_bindDriver: PHY 10: OUI:080028 Model:27 Ver:01 <-> 'dp83tc812'

Jan 01 00:00:05.899            io_pkt_v4_hc.270350                 slog      0  Dp83tc812_isPhyDevSupported : PHY OUI = 0x80028

Jan 01 00:00:05.899            io_pkt_v4_hc.270350                 slog      0  Dp83tc812_isPhyDevSupported : PHY MODEL = 0x0027

Jan 01 00:00:05.899            io_pkt_v4_hc.270350                 slog      0  Dp83tc812_isPhyDevSupported : PHY REVISION = 0x0001

Jan 01 00:00:05.899            io_pkt_v4_hc.270350                 slog      0  Dp83tc812_isMacModeSupported: mii = 0x0003

Jan 01 00:00:05.899            io_pkt_v4_hc.270350                 slog      0  EnetPhy_bindDriver: PHY 10: OUI:080028 Model:27 Ver:01 <-> 'dp83tc812' : OK

Jan 01 00:00:05.899            io_pkt_v4_hc.270350                 slog      0  EnetPhy_open: PHY 10: open

Jan 01 00:00:05.900            io_pkt_v4_hc.270350                 slog      0  cpsw_alloc:299: Alloc successfull; Virt: 0x5829599000, Phys: 0x97b40a000
Jan 01 00:00:05.900            io_pkt_v4_hc.270350                 slog      0  EnetIfMem_init: addr=0x5829599000 is  aligned
Jan 01 00:00:05.900            io_pkt_v4_hc.270350                 slog      0  EnetIfMem_init: addr=0x5829599000, size=0x221000, gMem=0x5829599000, gMemBufPhys=0x97b40a000
Jan 01 00:00:05.900            io_pkt_v4_hc.270350                 slog      0  EnetIfMem_init: gDmaDescMemArray=0x5829599000, size=0x200000
Jan 01 00:00:05.900            io_pkt_v4_hc.270350                 slog      0  EnetIfMem_init: gRingMemArray=0x5829799000, size=0x21000
Jan 01 00:00:05.900            io_pkt_v4_hc.270350                 slog      0  EnetIfMem_init: gDmaDescMemArrayBasePhys=0x97b40a000, gDmaDescMemArrayBase=0x5829599000
Jan 01 00:00:05.903            io_pkt_v4_hc.270350                 slog      0  initQs() freePktInfoQ initialized with 256 pkts
Jan 01 00:00:05.905            io_pkt_v4_hc.270350                 slog     56  [UDMA] eventHandle->globalEvent = 35!!!

Jan 01 00:00:05.905            io_pkt_v4_hc.270350                 slog     56  [UDMA] eventHandle->vintrNum = 38!!!

Jan 01 00:00:05.905            io_pkt_v4_hc.270350                 slog     56  [UDMA] eventHandle->vintrBitNum = 1!!!

Jan 01 00:00:05.905            io_pkt_v4_hc.270350                 slog     56  [UDMA] eventHandle->irIntrNum = 14!!!

Jan 01 00:00:05.905            io_pkt_v4_hc.270350                 slog     56  [UDMA] eventHandle->coreIntrNum = 78!!!

Jan 01 00:00:05.919            io_pkt_v4_hc.270350                 slog      0  EnetIf_registerIntr2: rx isr 78 thread priority set to 21

Jan 01 00:00:05.919            io_pkt_v4_hc.270350                 slog      0  EnetIf_registerIntr2: RX InterruptAttachEvent succeed irq/78 coid/1073741865 event/13

Jan 01 00:00:05.919            io_pkt_v4_hc.270350                 slog      0  Host MAC address:
Jan 01 00:00:05.919            io_pkt_v4_hc.270350                 slog      0  28:b5:e8:cc:1c:21
Jan 01 00:00:05.920            io_pkt_v4_hc.270350                 slog      0  EnetIf_Init: 834 Info EnetIf_Init AleBcastEntry status = 0

Jan 01 00:00:07.372            io_pkt_v4_hc.270350                 slog      0  PHY 10 is alive
Jan 01 00:00:10.113            io_pkt_v4_hc.270350                 slog      0  Dp83tc812_reset: PHY 10: global soft-reset

Jan 01 00:00:11.433            io_pkt_v4_hc.270350                 slog      0  IsMaster is 0x0

Jan 01 00:00:12.621            io_pkt_v4_hc.270350                 slog      0  EnetPhy_setNextState: PHY 10: FOUND -> RESET_WAIT (10 ticks)

Jan 01 00:00:12.854            io_pkt_v4_hc.270350                 slog      0  Dp83tc812_isResetComplete: PHY 10: global soft-reset is complete

Jan 01 00:00:12.854            io_pkt_v4_hc.270350                 slog      0  EnetPhy_setNextState: PHY 10: RESET_WAIT -> ENABLE (0 ticks)

Jan 01 00:00:12.955            io_pkt_v4_hc.270350                 slog      0  EnetPhy_enableState: PHY 10: enable

Jan 01 00:00:13.219            io_pkt_v4_hc.270350                 slog      0  Dp83tc812_restart: PHY 10: soft-restart

Jan 01 00:00:13.483            io_pkt_v4_hc.270350                 slog      0  Dp83tc812_setMiiMode: PHY 10: MII mode: 3

Jan 01 00:00:14.275            io_pkt_v4_hc.270350                 slog      0  Dp83tc812_setClkDelay: PHY 10: set delay 0 ps TX, 0 ps RX

Jan 01 00:00:15.859            io_pkt_v4_hc.270350                 slog      0  Dp83tc812_setTxFifoDepth: PHY 10: set FIFO depth 5

Jan 01 00:00:16.123            io_pkt_v4_hc.270350                 slog      0  Dp83tc812_setLedMode: PHY 10: set LED0 = mode0, LED1 = mode0, LED2 = mode1, LED3 = mode0

Jan 01 00:00:16.255            io_pkt_v4_hc.270350                 slog      0  EnetPhy_enableState: PHY 10: req caps: FD100

Jan 01 00:00:16.387            io_pkt_v4_hc.270350                 slog      0  EnetPhy_enableState: PHY 10: PHY caps: FD100 HD100

Jan 01 00:00:16.387            io_pkt_v4_hc.270350                 slog      0  EnetPhy_enableState: PHY 10: MAC caps: FD1000 FD100 HD100 FD10 HD10

Jan 01 00:00:16.387            io_pkt_v4_hc.270350                 slog      0  EnetPhy_enableState: PHY 10: refined caps: FD100

Jan 01 00:00:16.519            io_pkt_v4_hc.270350                 slog      0  EnetPhy_enableState: PHY 10: PHY is not NWAY-capable

Jan 01 00:00:16.519            io_pkt_v4_hc.270350                 slog      0  EnetPhy_enableState: PHY 10: falling back to manual mode

Jan 01 00:00:16.519            io_pkt_v4_hc.270350                 slog      0  EnetPhy_enableState: PHY 10: new link caps: FD100

Jan 01 00:00:16.519            io_pkt_v4_hc.270350                 slog      0  EnetPhy_enableState: PHY 10: manual setup

Jan 01 00:00:16.783            io_pkt_v4_hc.270350                 slog      0  EnetPhy_setupManual: PHY 10: requested mode: 100 Mbps full-duplex

Jan 01 00:00:16.783            io_pkt_v4_hc.270350                 slog      0  EnetPhy_setNextState: PHY 10: ENABLE -> LINK_WAIT (50 ticks)

Jan 01 00:00:17.016            io_pkt_v4_hc.270350                 slog      0  EnetPhy_setNextState: PHY 10: LINK_WAIT -> LINKED (0 ticks)

Jan 01 00:00:17.016            io_pkt_v4_hc.270350                 slog      0  Cpsw_isPortLinkUp: Port 1: Sublayer 1 doesn't support link status

Jan 01 00:00:17.016            io_pkt_v4_hc.270350                 slog      0  Cpsw_handleLinkUp: Port 1: Link up: 100-Mbps Full-Duplex

Jan 01 00:00:17.016            io_pkt_v4_hc.270350                 slog      0  cpsw_init:1070 Phy is linked
Jan 01 00:00:17.016            io_pkt_v4_hc.270350                 slog      0  cpsw_filter: Clear IFF_ALLMULTI
Jan 01 00:00:17.016            io_pkt_v4_hc.270350                 slog      0  cpsw_filter: Adding Multicast MAC Addr -> 01:00:5e:00:00:01
Jan 01 00:00:17.032            io_pkt_v4_hc.270350                 slog      0  cpsw_filter: Clear IFF_ALLMULTI
Jan 01 00:00:17.032            io_pkt_v4_hc.270350                 slog      0  cpsw_filter: Adding Multicast MAC Addr -> 01:80:c2:00:00:0e
Jan 01 00:00:17.032            io_pkt_v4_hc.270350                 slog      0  cpsw_filter: Adding Multicast MAC Addr -> 01:00:5e:00:00:01
May 27 02:51:46.886                       dumper.4                 slog*     0  run fault pid 270350 tid 4 signal 10 code 3 ip 0x20e886f7fc proc/boot/io-pkt-v4-hc
May 27 02:51:46.886                       dumper.4                 slog      0  pid 270350 core file created at /tmp/io-pkt-v4-hc.core

    The output of "pidin ar":

    TDCU4@QNX:/# pidin ar
     pid Arguments
       1 procnto-smp-instr -v
       2 slogger2
       3 pipe
       4 dumper -d /tmp
       5 random -t
       6 devc-seromap -e -F 0x02890000,281
       7 i2c-omap35xx -p0x2010000 -i233 -d
       8 i2c-omap35xx -p0x2030000 -i235 -d
       9 devb-sdmmc-am65x blk cache=1m sdio addr=0x4f80000,irq=35,timing=~hs400,emmc,bs=sscfg=0x8000 disk name=emmc
      10 devb-sdmmc-am65x blk cache=1m sdio addr=0x04fb0000,irq=36,bs=sscfg=0x8000:ldo=0x600000^52:pwrdev=/dev/i2c1 cam pnp disk name=sd
  122891 ksh /proc/boot/.console_ti.sh
  208909 tisci-mgr
  233487 shmemallocator
  237584 tiipc-mgr
  249868 tiudma-mgr
  319506 /usr/sbin/sshd
  323601 devc-pty -n 32
  327702 cron -s -d /ti_fs/spool/cron
  356375 i2c-omap35xx -p 0x42120000 -i 928 -d
  368665 ksh ksh
  483342 pidin ar

    The output of "ifconfig -v":

    TDCU4@QNX:/# ifconfig -v
ifconfig: getifaddrs: Address family not supported by protocol family

     

    Thanks.

  • 0 in reply to Namic Chang
    TI__Mastermind 48033 points

    Can you try this on the latest 10.0 SDK, as multiple fixes have been made in past releases for running ethernet drivers concurrently?

    Thanks.

  • 0 in reply to Praveen Rao
    Prodigy 250 points

    Hi, Praveen:

    For SDK 10.0, it suggested to use QNX 8.0 and we don't plan to upgrade the SDK/QNX version at present.

    Is it possible to compare and merge the differences between 8.6 and 10.0 for network drivers?

    Thanks.

  • 0 in reply to Namic Chang
    TI__Mastermind 48033 points

    Hi Namic,

    Please note that the 10.0 release is compatible with QNX SDP 7.1.

    Namic Chang said:
    Is it possible to compare and merge the differences between 8.6 and 10.0 for network drivers?

    Yes, you can do this since we released a complete source package for both releases.

    Thanks.