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AM625: Using 1.4GHz OPP with TPS6521903

Part Number: AM625

Tool/software:

We have a customer with an AM62x design that is utilizing the TPS6521903 PMIC.  This PMIC defaults the VDD_CORE voltage (from Buck 1) to 0.75V.

The customer is interested in testing the 1.4 GHz OPP on the AM62x platform, which requires 0.85 VDD.

We looked at swapping the TPS6521903 PMIC with the TPS6521904 PMIC (which defaults the buck to 0.85V), but it is not compatible with their board as the output of the LDO2 is changed from 0.85V to 1.8V.

We are asking to see if this approach is acceptable:

In either uBoot or the SPL, command the PMIC to bump the core voltage up to 0.85V prior to loading the kernel and enabling the 1.4 GHz OPP.  The core voltage would not be dynamically adjusted, it would be left at 0.85V for the duration of operation.

Is there any issue with this approach?  Does TI have an alternative solution outside of changing the design to use a different PMIC?

  • Hello MIchael

    I discussed your use-case with the design folks and following is what I got back 

    Design timing closure or reliability analysis has not been done with the assumption of DVFS or DVS. Voltage scaling  call for additional margins and considerations in design closure that are not part of the scope for this product family.  Since we have not used this condition in design closure , we cannot guarantee long term reliable operations for something that is not within our recommended operating conditions for the SOC

    So unfortunately we cannot endorse or support the way you currently have this implemented. On alternative approach, I will need to defer to my hardware colleagues

    Regards

    Mukul