Using SPI1 and/or SPI2 as slave with TI814x

Rene,

Is it possible to know which EVM are you referring to? Please provide the link where you are referring the documents.

If you are specific about the DM8148 platform, then it has McSPI in it. The McSPI supports multiple channels for a given instance. For example, McSPI instance 0 i.e McSPI0 has four channels available. But this property of supporting multiple channel is only applicable for master mode.

In slave mode, it supports only one channle i.e by defauls it will be channel '0'. So all the McSPI instance (0,1,2 ..) supports slave mode only on channel '0'.

Hope this answers your question.

Regards,

Sandeep K 

Dear Sandeep,

Yes, I'm referring to EVM for DM8148.

I was mixing up channels and instances. I mistakenly assumed that instance 2 uses channel 2. (Nevertheless it seems that the effect of using channel 2 and channel 0 for instance 2 is the same)...

Best regards,
Rene

Dear Sandeep,

I succeeded building the example, but having quite a lot of problems getting the data in. Is there an example for using an SPI bus as slave. Currently I do not really care what operation mode is used (polled/dma/interrupt - an example for each would be the best of course).

I can see the clocking of the SPI master on the pins, but the stream_write function does not return, but hangs in timeout in the function mcspiPolledModeTransfer.

This is how I use the stream_write function:

dataparam.bufLen = 9;

dataparam.inBuffer = &loopRead[0];

dataparam.outBuffer = NULL;

Stream_write(spiHandle, &dataparam, size, 100000, &eb);

I'm using pspdrivers_02_20_01_00, bios_6_32_03_43, ipc_1_23_04_36, edma3_lld_02_11_02_04.

CCS version should not matter, but FYI I'm using 5.1 M7.

Did you successfully test SPI1 or SPI2 as slave with the given setup?

Thanks and best regards,

Rene

Hi,

Now I got the example to work in slave mode. I've not been digging further in to find the error, but it seems as if the MCSPI_SYST register is not set correctly (at least for SPI2): master/slave is not selected nor is the data direction set correctly (value set by API: 0x0, but should be sth like 0xD00), I additionally had to set MCSPI_MODULCTRL to 0x6 to ignore SPIEN, but this is platform specific for me.

Can you confirm the error in the API (pspdrivers_02_20_01_00)? Is there already a fix available?

Regards,

Rene

Rene,

The McSPI system test mode is not supported in the driver.

If you refer to the release note, it clearly says that the slave mode is not tested in this release.

You can try McSPI slave mode in DMA mode of operation, since we have tested it in this mode and driver was working without any modifications. But interrupt mode, it needs some more modiifcations which will be released in future.

Example spi slave configuration is given below,

/* Channel parameter in the  source file*/

enable the FIFO; 

/* In the .cfg file*/

/* configure the SPI parameters  */

var mcspiPrms = new Mcspi.Params();
mcspiPrms.instNum    = 1;
mcspiPrms.opMode     = Mcspi.OpMode_DMAINTERRUPT;
mcspiPrms.hwiNumber  = 7;
mcspiPrms.enableCache= true;
mcspiPrms.edma3EventQueue = 0;

mcspiPrms.spiHWCfgData.masterOrSlave           = Mcspi.CommMode_SLAVE;  
mcspiPrms.spiHWCfgData.singleOrMultiChEnable        = Mcspi.SINGLE_CHANNEL;  
mcspiPrms.spiHWCfgData.pinOpModes           = Mcspi.PinOpMode_4PIN;
mcspiPrms.spiHWCfgData.fifoRxTrigLvl                         = 1;
mcspiPrms.spiHWCfgData.fifoTxTrigLvl                         = 1;

mcspiPrms.spiHWCfgData.configChfmt[0].charLength             = Mcspi.LEN_8BIT;
mcspiPrms.spiHWCfgData.configChfmt[0].multiWordAccessEnable  = false;
mcspiPrms.spiHWCfgData.configChfmt[0].spiChipSelectEnablePol = false;
mcspiPrms.spiHWCfgData.configChfmt[0].clockMode              = Mcspi.mode0;
mcspiPrms.spiHWCfgData.configChfmt[0].clockRatioExtension    = 0;
mcspiPrms.spiHWCfgData.configChfmt[0].spiWordInitDelay       = Mcspi.NO_DELAY;
mcspiPrms.spiHWCfgData.configChfmt[0].trasmitReceiveMode     = Mcspi.Both_RxTx;
mcspiPrms.spiHWCfgData.configChfmt[0].granularityEnable      = false;
mcspiPrms.spiHWCfgData.configChfmt[0].busFreq                = 0;
mcspiPrms.spiHWCfgData.configChfmt[0].spienHighPolarity      = false;
mcspiPrms.spiHWCfgData.configChfmt[0].slaveModeChipSelect    = Mcspi.SPIEN_0;
/* The dat0 and dat1 has to be set appropriately according to the EVM connection */
mcspiPrms.spiHWCfgData.configChfmt[0].spiDat0Dir             = Mcspi.OUT;
mcspiPrms.spiHWCfgData.configChfmt[0].spiDat1Dir             = Mcspi.IN;

Let me know your comments on this.

Thanks and Regards,

Sandeep K

Hi Sandeep,

DMA mode is absolutely OK for me.

You are correct about the fact that it compiles without modification for SPI1.

But if I use the above code and change
mcspiPrms.instNum    = 1;
to
mcspiPrms.instNum    = 2;
I get the following error message on the console:

[CortexA8] EDMA driver initialization PASS.
[CortexA8] ti.psp.mcspi.Mcspi: line 933: Bad args
[CortexA8] xdc.runtime.Error.raise: terminating execution

What might be wrong here?

Do I understand your statement about the MCSPI_SYST register correctly? This register should only have an effect, if bit3 of MCSPI_MODULCTRL is set to '1'? Can you please check this for SPI2?

Furthermore: is there sample code for sending and receiving simultaneously? The problem is that I do not know in advance how many bytes will be received from the master. How can this be handled?

Thanks and best regards,

René

Rene,

Rene Wittmann said:

But if I use the above code and change
mcspiPrms.instNum    = 1;
to
mcspiPrms.instNum    = 2;
I get the following error message on the console:

[CortexA8] EDMA driver initialization PASS.
[CortexA8] ti.psp.mcspi.Mcspi: line 933: Bad args
[CortexA8] xdc.runtime.Error.raise: terminating execution

What might be wrong here?

I am not sure about this error, since it looks like the error is while closing the mcspi channel, but not during the I/O. And also there is no Error_raise() on the line 933. It would be better if you share the code snippet of the mcspi.c file where the error has occured.

And also, Are you opening the multiple instances/channels of spi in the same application?

Rene Wittmann said:

Do I understand your statement about the MCSPI_SYST register correctly? This register should only have an effect, if bit3 of MCSPI_MODULCTRL is set to '1'? Can you please check this for SPI2?

Yes, bit 3 of MCSPI_MODULCTRL has to be set to '1' to enable the system test mode

Rene Wittmann said:

Furthermore: is there sample code for sending and receiving simultaneously? The problem is that I do not know in advance how many bytes will be received from the master. How can this be handled?

There are no application to simulate the variable length communication between the master and slave. To handle the variable length message, you might have to send a fixed length header from the master to slave containing the length of the next data from the master.

Regards,

Sandeep K

Hi Sandeep,

You are correct that there is no such message in the file McSpi.c, but the message is in the file McSpi_edma.c:

Int32 Mcspi_localEdmaChannelRequest(Mcspi_Object *instHandle,
                                    Mcspi_ChanObj *chanHandle,
                                    Error_Block *eb)
{
    Int32 status = DriverTypes_COMPLETED;

    Assert_isTrue((NULL != instHandle), Mcspi_A_badParameter);

    /* channel request for edma Rx and Tx                                    */
    if (Mcspi_OpMode_DMAINTERRUPT == instHandle->opMode)
    {
        /* request for RX DMA channels                                       */
        instHandle->dmaChanAllocated = TRUE;

        /* request the required channels                                     */
        status = EDMA3_DRV_requestChannel((chanHandle->hEdma),
                                          &(chanHandle->rxDmaEventNumber),
                                          &(chanHandle->rxDmaEventNumber),
                                          (EDMA3_RM_EventQueue)instHandle->edma3EventQueue,
                                          &Mcspi_localCallbackReceive,
                                          instHandle);

        if (DriverTypes_COMPLETED != status)
        {
            instHandle->dmaChanAllocated = FALSE;
            Error_raise(eb, DriverTypes_EBADARGS, 0, 0);
            System_printf("\nSPI Test: EDMA Request failed");
        }

So it might be a problem with my EDMA3 LLD package, right? I'm using edma3_lld_02_11_02_04.

What version of EDMA package are you using? Can you execute the example without problem? If yes, can you provide your EDMA package?

Best regards,

Rene

Rene,

You wont get the error message in the mcspi.c file, but Error_raise() will get the already defined error messages from the mcspi.xdc file and prints it on the console. So what you have to do is to see what is there in you mcspi.c file at line number 933.

But, i could not see "Bad args" string in the mcspi.xdc file. So we need to find out from where this message being displayed.

Regards,

Sandeep K 

Hi Sandeep,

I packed the mcspi-directory, deleted the lib and the package directories and attached the zip-file to this post. 8666.mcspi.zip

Sorry, for not including the line numbers in my previous post. The error line is out of the file McSpi_edma.c, not McSpi.c!

I would assume that "Bad args" is defined somewhere else (maybe xdctools?).

What about my EDMA assumption? What version do you use?

Best regards,

René

Rene,

If you refer to the sox.xs file in the PSP, you can find the SPI2 - Channel '0' DMA events as 80(Rx) and 79(Tx). The events above the 63, comes under the cross bar event. To enable these events, the EDMA package needs to be modified. This is why the EDMA3_DRV_requestChannel() is failing for you.

Let me get the answer for this or get someone to answer this query.

BTW, you can use the EDMA package which has been refered in the release note or userguide.

Thanks and Regards,

Sandeep K

Hi Sandeep,

It would be great if you could get an answer for this.

I'm using the EDMA package which is refered in the user guide (at least the version number is correct (02.10.3.04)), but I cannot tell what the "_customized" suffix should mean...

Thanks and best regards,
Rene