• State TI Thinks Resolved
  • Replies 8 replies
  • Answers 2 answers
  • Subscribers 102 subscribers
  • Views 203 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

DRA821U: GPIO Configuration issue

Madhusankar SP
Prodigy 20 points
Part Number: DRA821U

Tool/software:

I am working on a DRA821U base custom board. Am observing some issue while configuring the GPIO pins. Am trying to toggle two(GPIO0 56 and GPIO0 58) GPIOs from main domain, GPIO58 works fine but am unable to toggle the GPIO0 56. Same procedure is used to configure both GPIOs. Please let me know if anything else to be taken care during configuration and why this behaviour is observed?

MAIN_GPIO0_56---Not able to toggle 
MAIN_GPIO0_58---Working

 

Following are the DTS settings for both of the pins.

 


main_pmx0 {

U3_pins_default: U3-pins-default {
pinctrl-single,pins = <
J721E_IOPAD(0xdc, PIN_OUTPUT, 7) /* (U3) */
>;
};

eth_reset_pins_default: gpio0-default-pins {
pinctrl-single,pins = <
J721E_IOPAD(0xd4, PIN_OUTPUT_PULLUP, 7) /* (V3) I2C0_SCL.GPIO0_56 */
>;
};

};

&main_gpio0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&eth_reset_pins_default &U3_pins_default >;

};

SDK : Linux SDK_09.02

  • 0
    TI__Expert 8230 points

    Hi,

    I have assigned your thread to the expert engineer, thank you for your patience.

    Thanks,

    Neehar

  • 0 in reply to Neehar Sawant
    TI__Guru*** 145810 points

    Hi,

    GPIO at the pinmux should always be defined as PIN_INPUT.

    Please try defining them as PIN_INPUT.

    Best regards,

    Keerthy 

  • 0 in reply to Keerthy J
    Prodigy 20 points

    We are using the V3 (MAIN_GPIO0_56) as output so am configuring as OUPUT at the pinmux .Since the pin is OUTPUT pin ,may I know why it should configured as INPUT at the pinmux?

    Best regards,
    Madhusankar

  • 0 in reply to Madhusankar SP
    TI__Guru*** 145810 points

    Hi,

    There are 2 layers. Pinmux & GPIO.

    1. At the Pinmux layer the pin needs to be configured as PIN_INPUT. RX_ACTIVE bit aka bit18 of the PINMUX register needs to be set for the GPIO state to physically toggle. This should fix the issue you are facing.
      So PIN_OUTPUT --> PIN_INPUT.
    2. At the GPIO layer you can program the actual state, you want it to be output then you program the GPIO registers to be in output mode.

    - Keerthy

  • 0 in reply to Keerthy J
    Prodigy 20 points

    Hi,

    Is this applicable only for this particular pin V3 (MAIN_GPIO0_56) or for all the pins. Because with the following dts settings is worked for U3(MAIN_GPIO0_58) we confirmed by checking the voltages


    U3_pins_default: U3-pins-default {
    pinctrl-single,pins = <
    J721E_IOPAD(0xdc, PIN_OUTPUT, 7) /* (U3) */
    >;
    };

    Best regards,

    Madhusankar

  • 0 in reply to Madhusankar SP
    TI__Guru*** 145810 points

    Hi Madhusankar,

    Can you dump both of the PINMUX register values for working and non-working GPIOs?

    - Keerthy

  • 0 in reply to Keerthy J
    Prodigy 20 points

    Hi,

    Please find the register readings of both working and non-working pin in both cases

    U3-pin details (Working one)
    =============================
    MAIN_GPIO0_58
    padconfig register : 0x0011C0DC


    V3-pin details
    ===================
    MAIN_GPIO0_56
    padconfig register : 0x0011C0D4

    PIN_INPUT
    ===============
    [2024-10-09 15:33:32] root@j7200-evm:~# devmem2 0x0011C0DC
    [2024-10-09 15:33:47] /dev/mem opened.
    [2024-10-09 15:33:47] Memory mapped at address 0xffff92b97000.
    [2024-10-09 15:33:47] Read at address  0x0011C0DC (0xffff92b970dc): 0x00050007
    [2024-10-09 15:33:47] root@j7200-evm:~#
    [2024-10-09 15:33:52] root@j7200-evm:~# devmem2 0x0011C0D4
    [2024-10-09 15:33:53] /dev/mem opened.
    [2024-10-09 15:33:53] Memory mapped at address 0xffffaa8b3000.
    [2024-10-09 15:33:53] Read at address  0x0011C0D4 (0xffffaa8b30d4): 0x00040007
    [2024-10-09 15:33:53] root@j7200-evm:~#

    PIN_OUTPUT
    ===================
    [2024-10-09 15:41:07] root@j7200-evm:~#
    [2024-10-09 15:41:07] root@j7200-evm:~# devmem2 0x0011C0DC
    [2024-10-09 15:41:09] /dev/mem opened.
    [2024-10-09 15:41:09] Memory mapped at address 0xffff907b1000.
    [2024-10-09 15:41:09] Read at address  0x0011C0DC (0xffff907b10dc): 0x00010007
    [2024-10-09 15:41:09] root@j7200-evm:~#
    [2024-10-09 15:41:10] root@j7200-evm:~#
    [2024-10-09 15:41:15] root@j7200-evm:~# devmem2 0x0011C0D4
    [2024-10-09 15:41:16] /dev/mem opened.
    [2024-10-09 15:41:16] Memory mapped at address 0xffff9be11000.
    [2024-10-09 15:41:16] Read at address  0x0011C0D4 (0xffff9be110d4): 0x00000007
    [2024-10-09 15:41:16] root@j7200-evm:~#


    Regards,
    Madhusankar

  • 0 in reply to Madhusankar SP
    TI__Guru*** 145810 points
    Madhusankar SP said:
    PIN_INPUT
    ===============
    [2024-10-09 15:33:32] root@j7200-evm:~# devmem2 0x0011C0DC
    [2024-10-09 15:33:47] /dev/mem opened.
    [2024-10-09 15:33:47] Memory mapped at address 0xffff92b97000.
    [2024-10-09 15:33:47] Read at address  0x0011C0DC (0xffff92b970dc): 0x00050007
    [2024-10-09 15:33:47] root@j7200-evm:~#
    [2024-10-09 15:33:52] root@j7200-evm:~# devmem2 0x0011C0D4
    [2024-10-09 15:33:53] /dev/mem opened.
    [2024-10-09 15:33:53] Memory mapped at address 0xffffaa8b3000.
    [2024-10-09 15:33:53] Read at address  0x0011C0D4 (0xffffaa8b30d4): 0x00040007
    [2024-10-09 15:33:53] root@j7200-evm:~#

    For using a pad as GPIO please use that as PIN_INPUT. Please confirm if with PIN_INPUT both GPIOs are working as expected.

    - Keerthy