AM62P-Q1: DDR_MARGIN_FW: modify DDR parameters using GEL file

Tool/software:

Hello,

we designed a custom board based on AM62P-Q1 and we are trying to use the DDR_MARGIN_FW (at version 1.8.0.1) to tune the DDR configuration.

At the moment we are starting SPL+U-Boot, then stopping inside the U-Boot console to attch using CCS. Is there a way to modify the DDR parameters at this stage, before loading and starting the tool, using a GEL file? If yes, how?

I know that the SPL is already performing the required DDR initailizations, but using a GEL file we would be able to try different parameters without having to re-compile the SPL each time.

Thank you