C6727 SDRAM burst transfer

I have been seeing what seem to me very slow transfers from C6727 to / from SDRAM, and I wonder if anyone has any get-rounds, or if this is unfortunately an inescapable limitation of this processor? I'd be really grateful for any advice or help on this.

We have tried two basic ways round

Essentially, if we use the CPU to programmatically read SDRAM in a loop (or dat_copy, or any other synonym), it goes at ~25% of maximum memory-bandwidth speed. Of course, because the CPU stalls, and the EMIF controller does not know "ahead of time" to request a burst. I expected this, and this is all as per the documentation

What I didn't expect before I checked the documentation, was that the dMAX controller does not trigger SDRAM  burst reads either, when reading a sequential block.. "After the fact" of selecting this processor, it is clearly confirmed in the reference below that transferring 1024 BYTES takes 1191 dMAX clock-cycles. I match the performance in the data-sheet in my measurements on the board. Comparing dMAX = 150 MHz, EMIF = 100 MHz, I am stuck with a throughput that is around 40% of the EMIF bandwidth I expected (one WORD per EMIF clock-cycle) when we selected the processor.The C6727 does not have the EDMA, it has QDMA which is a different engine as far as I can tell, so I think it is unlike the C671x processors.

http://focus.ti.com/lit/ug/spru795d/spru795d.pdf

We have tried all the EMIF and dMAX configurations in the documents listed above, plus what came with Lyrtech evaluation board. 

Or is there are a smart but "obvious" way to configure things to achieve this that is well-known? Or is that simply the limitation of the processor?

Thanks for any suggestions