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C6748 SPI1 FLASH Boot failure on Custom PCB. Boot pins all high.

Dean Hofstetter
Expert 2585 points

We have a custom PCB that has a yield problem.  Around 10% of all the boards we produce, the boards won't boot.  The problem has been identified as an invalid boot mode.  We have the boot pins configured for SPI1 FLASH boot.  On the bad boards, the boot config register is loaded with 0xFF(which is invalid).  It is suppose to be 0x0C for SPI1 boot.  A board that is "good" is always good, and a board that is "bad" is always bad.  Of course we have verified that the pull down/up resistors on the BOOT pins are correct for the bad boards.

We can emulate from the bad boards, so functionally they are good.  We have also verified the power rails, and RESET pulse are good with no glitches.  The C6748 is held in RESET for 250mS after all the power rails stabilize.

Scoping the pins, the bad boards have the following behavior:  1.2V ramps to 100%, while the 1.8V and 3.3V regulators are held OFF.  1.8V ramps next to 95%, which then releases the 3.3V rail to start ramping.  BOOT[0](which needs to be low for SPI1 FLASH boot) is indeed low for the 1.2V and 1.8V power ramps.  As the 3.3V begins to ramp up, as it reaches around 1.2V, the BOOT[0] pin snaps to 1.2V as well.  As the 3.3V rail continues to ramp, so does the BOOT[0] pin.  The BOOT[0] pin stays HIGH for the entire time RESET is held LOW.  Once RESET goes high(and this is where the boot pins are "saved"), the BOOT[0] pin goes LOW(as it should have all along because there is a 20k pull down resistor on the line).  Why the BOOT[0] snapped HIGH during power up is the mystery.

According to the C6748 datasheet and tech manual, everything is correct.  1.2V rail ramps first, followed by the 1.8V rail, and finally the 3.3V rail.  The 3.3V rail never exceeds the 1.8V rails by 2V(which is one of the power on requirements).  The RESET pulse is more than long enough after the rails stabilize.  Pull up/down resistors are stuffed correctly for SPI1 FLASH boot(1k pull ups, 20k pull downs).

I see other people on this forum talking about boot problems, but not specifically with the C6748.  Are there other C6748 users out there that have experienced a similar problem?  If so, did you find a solution?  TI experts, is there anything you find wrong with our power up sequence or other things we should check?

- Dean

  • 0
    TI__Mastermind 27585 points

    Hi Dean,

    What resistor values are you using for the pulldown on BOOT[0]? Can you try a 1k or stronger and see if the problem still occurs?

    Jeff

  • 0 in reply to jc-ti
    Expert 2585 points

    20k pull down resistors, just as the datasheet specifies for pins with internal pull downs.  We tried 1K resistors with no luck.  Using a 1k pull down does get the board into SP1 FLASH boot mode, but it is not an option.  If you look at BOOT[0] on the scope with a 1K pull down, the BOOT[0] pin still attempts to snap HIGH to 3.3V.  However, the 1K pull down doesn't allow it to reach the full 3.3V.  BOOT[0] is somewhere in the grey voltage range, around 2V.  We can't rely on the C6748 DSP always reading 2V as a LOW.

    - Dean

  • 0 in reply to Dean Hofstetter
    TI__Mastermind 27585 points

    We're looking into the issue of why the pullup is enabled internally.

    In the meantime can you try a stronger pulldown? Is that pin used during operation after boot?

    Jeff

  • 0 in reply to jc-ti
    Expert 2585 points

    Can't use a stronger pull down.  The BOOT pins are also part of the LCD data bus(which we use).  Using too strong of a pull down may corrupt the data bits going to the LCD panel.  By the way, the bad boards get the invalid boot no matter if the LCD panel is connected or not.  The LCD display has nothing to do with this boot problem.  With the LCD cable unplugged, the LCD data bus is just routed to a connector.

    - Dean

  • 0 in reply to Dean Hofstetter
    TI__Mastermind 27585 points

    If you leave the board powered up and reapply RESETn, do the pins get pulled up again, or are they pulled down as expected?

    Also can you clarify if the failing boards boot this way every time or some percentage? And the other boards never experience this, right?

    Jeff

  • 0 in reply to jc-ti
    Expert 2585 points

    Unable to see what happens if you reapply RESETn after the board has been powered up for a while.  One problem, is our board doesn't have a push button RESET(however you could "short" the RESETn line to GND with a jumper wire to get the same effect).  The 2nd larger problem, is we don't have the failed boards anymore.  They were sent to Brandon Azbell in Chicago for analysis.  You can contact him directly to run any tests you wish.

    Below is our shop order history.

    PCB rev0, (70) boards built, (7) experience the problem all the time.

    PCB rev1(slightly changed the power sequencing), (10) boards built, (1) experiences the problem only after its been powered up for a while.

    PCB rev2, (20) boards built, (2) experience the problem all the time, (1) experiences the problem only after its been powered up for a while.

    In all PCB revs, if a board has been classified as "good", it has never shown the problem.  Therefore, we have almost exactly a 10% fallout with the boot problem.

    - Dean

  • 0 in reply to Dean Hofstetter
    TI__Mastermind 27585 points

    Thanks. We have the boards in-house now so we can try these experiments ourselves.

    Jeff

  • 0 in reply to jc-ti
    Expert 2585 points

    We did find one more board that has the boot problem, so we tried your "warm" RESET test.  Powered up the board, and it failed because of the invalid BOOT mode(as expected).  Forced the RESET line low, and then released RESET.  The board now powers up fine(got the SPI1 FLASH boot mode).  We were able to "warm" RESET the board a number of times, and it always came out of RESET correctly.

    Therefore, it appears the problem is ONLY related to the 1st power up(while the voltage rails are rising).  Do you have any further updates?

    - Dean

  • 0 in reply to jc-ti
    TI__Mastermind 27585 points

    I was able to reproduce the failure on your boards. With the 20k pulldown on BOOT[0], I would occasionally see it at 1.7V during reset, which means the internal pullups were enabled.

    I tried putting a 1k pulldown on BOOT[0] and in the failing case the voltage never got above 0.17V during reset, which means there is more than enough margin for it to latch as a 0. Is there any more information on why we would see different voltages when using a 1k pulldown? Using 1k resistors for all boot pins would be the solution to your issue from what I can tell.

    Jeff

  • 0 in reply to jc-ti
    Expert 2585 points
    It was a while ago when we tried the stronger pull downs, and I don't have any graphs from that day.  Our HW tech is on vacation this week, so this test might have to wait.  Remember you only have the (4) PCB's, the real units also have an LCD panel attached to the BOOT pins.  We need to verify that whatever pull down resistor we use doesn't cause issues on the LCD data bus.  Maybe the grey voltage range I'm remembering came with the LCD panel connected, and the panel has a loading affect.
     
    We will check it out as soon as we can.  In the mean time, assume the 1K pull downs won't work for us, and continue to look for the root cause.
    By the way, you state that you only see BOOT[0] rise to 1.7V???  The graphs I sent clearly show BOOT[0] rising to 3.3V, during RESET with the 20k pull downs.
    - Dean
  • 0 in reply to Dean Hofstetter
    TI__Mastermind 27585 points

    Dean, the graphs you sent all show BOOT[0] going up to about 1.7V as well. None of the graphs showed it rising to 3.3V according to the V/div scale on the plots. The plots match what I've measured.

    Also a 1k pulldown is stronger than you need. A 4.7k would also keep it well below the threshold and would work to boot properly each time.

    Jeff

  • 0 in reply to jc-ti
    Expert 2585 points

    After further review, it does appear we can use a stronger pull down.  With a 1k pull down, the BOOT pins rise to around 200mV which is well below the maximum voltage for a logic low on the C6748(800mV).  In addition, the LCD data bits appear to be fine with the 1k pull downs.  The remaining "bad" board we have here, now powers up fine with the 1k pull downs.

    We are running another (50) piece pilot run next week.  We'll make sure those boards are loaded with the 1k pull downs, and see how things go.  Assuming this works, TI should add this to the silicon errata document and/or mention it in the C6748 data sheet.

    Thanks for your help.

    - Dean

  • 0 in reply to Dean Hofstetter
    Expert 2585 points

    The 1K pull downs do work.  Last run of boards booted up fine.  TI did confirm that the register that controls the internal pullup/pulldown doesn't get initialized until AFTER power on RESET.  Hopefully they will add it to the errata document.

    - DEan