Part Number: AM3354
Tool/software:
Hello,
I am working on upgrading my platform to processor SDK 09.01 (../configs/processor-sdk/processor-sdk-09.01.00-legacy-config.txt). I am running into an issue with the 'ti-sycs', it will Panic during boot, not always, often when trying to turn on quickly.
This is the panic:
Starting kernel ... [ 0.558155] omap_voltage_late_init: Voltage driver support not added [ 0.992336] debugfs: Directory '49000000.dma' with parent 'dmaengine' already present! [ 1.018738] 8<--- cut here --- [ 1.021834] Unhandled fault: external abort on non-linefetch (0x1008) at 0xe0335010 [ 1.029527] [e0335010] *pgd=81f5b811, *pte=47400653, *ppte=47400453 [ 1.035845] Internal error: : 1008 [#1] PREEMPT ARM [ 1.040747] Modules linked in: [ 1.043818] CPU: 0 PID: 30 Comm: kworker/u2:3 Not tainted 6.1.46-g999 #1 [ 1.050551] Hardware name: Generic AM33XX (Flattened Device Tree) [ 1.056672] Workqueue: events_unbound deferred_probe_work_func [ 1.062558] PC is at sysc_reset+0x124/0x208 [ 1.066766] LR is at sysc_probe+0xf4c/0x150c [ 1.071056] pc : [<c055f3c8>] lr : [<c056061c>] psr: 20000113 [ 1.077348] sp : e0081c00 ip : 00000001 fp : c0d45d98 [ 1.082594] r10: 00000001 r9 : c0d45d98 r8 : 00000000 [ 1.087838] r7 : c1a46580 r6 : e0335010 r5 : 00000015 r4 : c2876b40 [ 1.094392] r3 : e0335010 r2 : 00000014 r1 : 10002900 r0 : e0335000 [ 1.100948] Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none [ 1.108114] Control: 10c5387d Table: 80004019 DAC: 00000051 [ 1.113883] Register r0 information: 0-page vmalloc region starting at 0xe0335000 allocated at devm_ioremap+0x4c/0x8c [ 1.124559] Register r1 information: non-paged memory [ 1.129633] Register r2 information: non-paged memory [ 1.134705] Register r3 information: 0-page vmalloc region starting at 0xe0335000 allocated at devm_ioremap+0x4c/0x8c [ 1.145369] Register r4 information: slab kmalloc-256 start c2876b00 pointer offset 64 size 256 [ 1.154128] Register r5 information: non-paged memory [ 1.159201] Register r6 information: 0-page vmalloc region starting at 0xe0335000 allocated at devm_ioremap+0x4c/0x8c [ 1.169865] Register r7 information: slab task_struct start c1a46580 pointer offset 0 [ 1.177742] Register r8 information: NULL pointer [ 1.182466] Register r9 information: non-slab/vmalloc memory [ 1.188150] Register r10 information: non-paged memory [ 1.193310] Register r11 information: non-slab/vmalloc memory [ 1.199081] Register r12 information: non-paged memory [ 1.204240] Process kworker/u2:3 (pid: 30, stack limit = 0x(ptrval)) [ 1.210624] Stack: (0xe0081c00 to 0xe0082000) [ 1.215002] 1c00: c2876b40 c13b3fc8 c2823810 c056061c 00000001 00000000 c121a9f4 c0f4c25c [ 1.223217] 1c20: c2823810 c13b3fc8 00000001 c2823810 c1a46580 c0f4c13c 00000001 00000001 [ 1.231432] 1c40: 00000003 344f201f 00000000 00000000 c2823810 c1300af8 00000000 c1a46580 [ 1.239647] 1c60: df9cf500 00000000 c13135ec c06c6ca4 c2823810 00000000 c1300af8 c06c45a4 [ 1.247862] 1c80: c2823810 c1300af8 c2823810 0000005c c1a46580 c06c4850 60000113 df9cf500 [ 1.256077] 1ca0: c13b8758 c1300af8 c2823810 0000005c c1a46580 c06c4998 00000001 c1300af8 [ 1.264292] 1cc0: e0081d14 c2823810 c1a46580 c06c4fa0 00000000 e0081d14 c1a46580 c06c4f0c [ 1.272506] 1ce0: c1a46580 c06c26ec 60000113 c18b235c c1bae334 344f201f c13135ec c2823810 [ 1.280722] 1d00: 00000001 c1a46580 c2823854 c06c4c44 df9d04fc c2823810 00000001 344f201f [ 1.288937] 1d20: c1a46580 c2823810 c1313ba8 c2823810 c1912410 c06c389c c2823810 00000000 [ 1.297152] 1d40: c13b8728 c06c0b84 00000200 00000000 00000000 00000000 00000000 344f201f [ 1.305367] 1d60: c2823810 c2823800 df9cf4f4 c121a9f4 00000000 00000000 c121a9f4 c1a46580 [ 1.313582] 1d80: 00000001 c09e3418 df9cf4f4 c121a898 c121a9d8 00000000 00000000 c09e3650 [ 1.321796] 1da0: 00000000 344f201f 00000000 00000000 c1912410 00000001 c1912410 47400000 [ 1.330011] 1dc0: 47400003 ff8efc54 00000200 00000000 00000000 00000000 00000000 344f201f [ 1.338226] 1de0: df9cf00c df9cf4f4 df99f4a8 00000000 c121a898 c1912410 00000001 00000000 [ 1.346440] 1e00: c1313958 c09e39b4 00000001 00000000 c1912410 df99f4a8 c121a898 00000000 [ 1.354656] 1e20: 00000000 c1a46580 c181200d c055d358 00000000 c1912410 c1300a14 c06c6ca4 [ 1.362870] 1e40: c1912410 00000000 c1300a14 c06c45a4 c1912410 c1300a14 c1912410 00000001 [ 1.371085] 1e60: 00000000 c06c4850 60000113 c1a46580 c13b8758 c1300a14 c1912410 00000001 [ 1.379300] 1e80: 00000000 c06c4998 00000001 c1300a14 e0081ee4 c1912410 00000000 c06c4fa0 [ 1.387515] 1ea0: 00000000 e0081ee4 c1a46580 c06c4f0c 00000000 c06c26ec 60000113 c18b235c [ 1.395730] 1ec0: c1bae234 344f201f c1313958 c1912410 00000001 c1a46580 c1912454 c06c4c44 [ 1.403945] 1ee0: c1912410 c1912410 00000001 344f201f 00000000 c1912410 c1313ba8 c1912410 [ 1.412160] 1f00: 00000000 c06c389c c1912410 c1313924 c1313930 c06c3ce0 c1313954 c1aeeb00 [ 1.420375] 1f20: c1366a80 c1812000 00000000 c0147300 c1805600 c1805600 c1805618 c1aeeb00 [ 1.428590] 1f40: c1805600 c1aeeb18 c1805618 c1287ce0 00000088 c1a46580 c1805600 c014782c [ 1.436805] 1f60: c1aeeb00 c1366106 60000113 c1afd380 c1a46580 c01475fc c1aeeb00 c1afd440 [ 1.445020] 1f80: e006dec0 00000000 00000000 c014e2a8 c1afd380 c014e1d0 00000000 00000000 [ 1.453234] 1fa0: 00000000 00000000 00000000 c0100148 00000000 00000000 00000000 00000000 [ 1.461449] 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 1.469663] 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000 [ 1.477886] sysc_reset from sysc_probe+0xf4c/0x150c [ 1.482879] sysc_probe from platform_probe+0x5c/0xbc [ 1.487962] platform_probe from really_probe+0xc8/0x2ec [ 1.493308] really_probe from __driver_probe_device+0x88/0x1a0 [ 1.499267] __driver_probe_device from driver_probe_device+0x30/0x104 [ 1.505837] driver_probe_device from __device_attach_driver+0x94/0x108 [ 1.512494] __device_attach_driver from bus_for_each_drv+0x7c/0xc0 [ 1.518802] bus_for_each_drv from __device_attach+0xa8/0x1d8 [ 1.524583] __device_attach from bus_probe_device+0x84/0x8c [ 1.530280] bus_probe_device from device_add+0x3a0/0x77c [ 1.535714] device_add from of_platform_device_create_pdata+0x9c/0xd0 [ 1.542284] of_platform_device_create_pdata from of_platform_bus_create+0x1a0/0x398 [ 1.550067] of_platform_bus_create from of_platform_populate+0x70/0xe0 [ 1.556716] of_platform_populate from simple_pm_bus_probe+0x90/0x94 [ 1.563104] simple_pm_bus_probe from platform_probe+0x5c/0xbc [ 1.568965] platform_probe from really_probe+0xc8/0x2ec [ 1.574308] really_probe from __driver_probe_device+0x88/0x1a0 [ 1.580267] __driver_probe_device from driver_probe_device+0x30/0x104 [ 1.586836] driver_probe_device from __device_attach_driver+0x94/0x108 [ 1.593493] __device_attach_driver from bus_for_each_drv+0x7c/0xc0 [ 1.599799] bus_for_each_drv from __device_attach+0xa8/0x1d8 [ 1.605583] __device_attach from bus_probe_device+0x84/0x8c [ 1.611279] bus_probe_device from deferred_probe_work_func+0x78/0xa4 [ 1.617761] deferred_probe_work_func from process_one_work+0x1c0/0x4bc [ 1.624430] process_one_work from worker_thread+0x230/0x584 [ 1.630128] worker_thread from kthread+0xd8/0x108 [ 1.634958] kthread from ret_from_fork+0x14/0x2c [ 1.639690] Exception stack(0xe0081fb0 to 0xe0081ff8) [ 1.644763] 1fa0: 00000000 00000000 00000000 00000000 [ 1.652978] 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 1.661191] 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 [ 1.667839] Code: e5865000 e3530000 baffffd0 e0803003 (e5933000) [ 1.673962] ---[ end trace 0000000000000000 ]--- [ 1.678598] note: kworker/u2:3[30] exited with irqs disabled
This is the device-tree
/*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/* state the resources this carrier uses for audio function*/
/* the pin header uses for Audio*/
/*
"S.39", mcasp1: mcasp0_fsr.mcasp1_fsx mode3
"S.40", mcasp1: mcasp0_axr1.mcasp1_axr0 mode3
"S.41", mcasp1: mcasp0_ahclkx.mcasp1_axr1 mode3
"S.42", mcasp1: mcasp0_aclkr.mcasp1_aclkx mode3
*/
/* the pin header uses for SPI1*/
/*
"P.54", spi1: mcasp0_ahclkr.spi1_cs0n mode3
"P.55", spi1: xdma_event_intro0.spi1_cs1n mode4
"P.56", spi1: mcasp0_aclkx.spi1_sclk mode3
"P.57", spi1: mcasp0_fsx.spi1_d0 mode3
"P.58", spi1: mcasp0_axr0.spi1_d1 mode3
*/
/* the pin header uses for LCD*/
/*
"S.114", lcd: lcd_data0.lcd_data0 mode0
"S.115", lcd: lcd_data1.lcd_data1 mode0
"S.116", lcd: lcd_data2.lcd_data2 mode0
"S.117", lcd: lcd_data3.lcd_data3 mode0
"S.118", lcd: lcd_data4.lcd_data4 mode0
"S.104", lcd: lcd_data5.lcd_data5 mode0
"S.105", lcd: lcd_data6.lcd_data6 mode0
"S.106", lcd: lcd_data7.lcd_data7 mode0
"S.107", lcd: lcd_data8.lcd_data8 mode0
"S.108", lcd: lcd_data9.lcd_data9 mode0
"S.109", lcd: lcd_data10.lcd_data10 mode0
"S.96", lcd: lcd_data11.lcd_data11 mode0
"S.97", lcd: lcd_data12.lcd_data12 mode0
"S.98", lcd: lcd_data13.lcd_data13 mode0
"S.99", lcd: lcd_data14.lcd_data14 mode0
"S.100", lcd: lcd_data15.lcd_data15 mode0
"S.113", lcd: lcd_data16.gpmc_ad15 mode0
"S.95", lcd: lcd_data17.gpmc_ad14 mode0
"S.112", lcd: lcd_data18.gpmc_ad13 mode0
"S.103", lcd: lcd_data19.gpmc_ad12 mode0
"S.94", lcd: lcd_data20.gpmc_ad11 mode0
"S.111", lcd: lcd_data21.gpmc_ad10 mode0
"S.102", lcd: lcd_data22.gpmc_ad9 mode0
"S.93", lcd: lcd_data23.gpmc_ad8 mode0
"S.121", lcd: lcd_vsync.lcd_vsync mode0
"S.122", lcd: lcd_hsync.lcd_hsync mode0
"S.123", lcd: lcd_pclk.lcd_pclk mode0
"S.120", lcd_de: lcd_ac_bias_en.lcd_ac_bias_en mode0
"S.133", lcd_vdd_en: gpmc_a7.gpio1_23 mode7
"S.127", lcd_bklt_en: gpmc_a6.gpio1_22 mode7
*/
/* the pin header uses for DCAN0*/
/*
"P.143", dcan0_tx: gmii1_txd3.dcan0_tx mode1
"P.144", dcan0_rx: gmii1_txd2.dcan0_rx mode1
*/
/* the hardware ip uses */
/*
"mcasp1",
"i2c0",
"i2c1",
"i2c2",
"uart0",
"uart2",
"uart3",
"touch",
"mmc0/SD",
"emmc",
"ecap0/backlight",
"emac0",
"emac1",
"gpio1_22",
"gpio1_23",
"gpio1_19",
"lcd",
"dcan0",
"spi0",
"spi1";
*/
/ {
model = "TI AM335x SMARCT335X";
compatible = "ti,am335x-smarct335x", "ti,am33xx";
aliases {
rtc0 = &s35390a;
rtc1 = &rtc;
};
cpus {
cpu@0 {
cpu0-supply = <&dcdc2_reg>;
};
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x20000000>; /* 512 MB */
};
vmmcsd_fixed: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "vmmcsd_fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
backlight: backlight {
compatible = "pwm-backlight";
enable-gpios = <&gpio1 22 0>; /* Backlight Enable Pin*/
pwms = <&ecap0 0 50000 0>;
brightness-levels = <0 51 53 56 62 75 101 152 255>;
default-brightness-level = <8>;
};
panel: panel {
compatible = "ti,tilcdc,panel";
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&lcd_pins_default>;
pinctrl-1 = <&lcd_pins_sleep>;
panel-info {
ac-bias = <255>;
ac-bias-intrpt = <0>;
dma-burst-sz = <16>;
bpp = <32>;
fdd = <0x80>;
sync-edge = <0>;
sync-ctrl = <1>;
raster-order = <0>;
fifo-th = <0>;
/*invert-pxl-clk;*/ /*pixel clock polarity*/
};
/* Display type: Data Image FG0500M0DSSWBG01 */
display_timings: display-timings {
native-mode = <&timing0>;
timing0: 800x480p60 {
clock-frequency = <32000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <42>;
hback-porch = <84>;
hsync-len = <128>;
vback-porch = <33>;
vfront-porch = <10>;
vsync-len = <2>;
hsync-active = <0>;
vsync-active = <0>;
};
};
};
sound: sound {
compatible = "ti,da830-evm-audio";
ti,model = "TLV320AIC3X SOUND CARD";
ti,audio-codec = <&tlv320aic3106>;
ti,mcasp-controller = <&mcasp1>;
ti,codec-clock-rate = <24576000>;
ti,audio-routing =
"Headphone Jack", "HPLOUT",
"Headphone Jack", "HPROUT",
"LINE1L", "Line In",
"LINE1R", "Line In";
};
};
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&clkout2_pin &gpio_pins_default>;
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rxd.i2c1_sda */
AM33XX_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_txd.i2c1_scl */
>;
};
i2c2_pins: pinmux_i2c2_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* (D18) uart1_ctsn.i2c2_sda */
AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* (D17) uart1_rtsn.i2c2_scl */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE6) /* uart0_ctsn.uart0_ctsn */
AM33XX_IOPAD(0x96c, PIN_OUTPUT | MUX_MODE6) /* uart0_rtsn.uart0_rtsn */
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
uart0_pins_sleep: pinmux_uart0_pins_sleep {
pinctrl-single,pins = <
AM33XX_IOPAD(0x968, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x96c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x970, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x974, PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_txclk.uart2_rxd */
AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_rxclk.uart2_txd */
>;
};
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd3.uart3_rxd */
AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd2.uart3_txd */
>;
};
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
>;
};
/*GPIO0-GPIO11, GPIO0-5 is input and GPIO6-11 is output by default.*/
gpio_pins_default: pinmux_gpio_pin {
pinctrl-single,pins = <
AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gmii1_rx_dv.gpio3_4 */
AM33XX_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
AM33XX_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */
AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a8.gpio1_24 */
AM33XX_IOPAD(0x898, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wen.gpio2_4 */
AM33XX_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oenren.gpio2_3 */
AM33XX_IOPAD(0x878, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben1.gpio1_28 */
AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn0.gpio1_29 */
AM33XX_IOPAD(0x888, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn3.gpio2_0 */
AM33XX_IOPAD(0x88c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_clk.gpio2_1 */
AM33XX_IOPAD(0x9e4, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* emu0.gpio3_7 */
AM33XX_IOPAD(0x9e8, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* emu1.gpio3_8 */
>;
};
ecap0_pins: backlight_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x964, PULL_DISABLE | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
>;
};
ecap0_pins_sleep: ecap0_pins_sleep {
pinctrl-single,pins = <
AM33XX_IOPAD(0x964, PULL_DISABLE | MUX_MODE7) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
AM33XX_IOPAD(0x90c, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */
AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
AM33XX_IOPAD(0x944, PIN_INPUT_PULLUP | MUX_MODE0) /* rmii1_ref_clk.rmii1_ref_clk */
/* Slave 2 */
AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wait0.rmii2_crs_dv */
AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wpn.rmii2_rxerr */
AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a0.rmii2_txen */
AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a4.rmii2_txd1 */
AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a5.rmii2_txd0 */
AM33XX_IOPAD(0x868, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a10.rmii2_rxd1 */
AM33XX_IOPAD(0x86c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a11.rmii2_rxd0 */
AM33XX_IOPAD(0x908, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_col.rmii2_ref_clk */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
/* Slave 2 reset value */
AM33XX_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x874, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
AM33XX_IOPAD(0x848, PIN_INPUT | MUX_MODE7) /* GPIO1_18, MMC0_CD */
AM33XX_IOPAD(0x844, PIN_INPUT | MUX_MODE7) /* GPIO1_17, MMC0_WP */
>;
};
mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
pinctrl-single,pins = <
AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x900, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x904, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
emmc_pins: pinmux_emmc_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
>;
};
lcd_pins_default: lcd_pins_default {
pinctrl-single,pins = <
AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad15.lcd_data16, OUTPUT | MODE1 */
AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad14.lcd_data17, OUTPUT | MODE1 */
AM33XX_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad13.lcd_data18, OUTPUT | MODE1 */
AM33XX_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad12.lcd_data19, OUTPUT | MODE1 */
AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad11.lcd_data20, OUTPUT | MODE1 */
AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data21, OUTPUT | MODE1 */
AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad9.lcd_data22, OUTPUT | MODE1 */
AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data23, OUTPUT | MODE1 */
AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */
AM33XX_IOPAD(0x85c, PIN_OUTPUT | MUX_MODE7) /* gpmc_a7.gpio1_23, MODE7 - LCD_VDD_EN */
>;
};
lcd_pins_sleep: lcd_pins_sleep {
pinctrl-single,pins = <
AM33XX_IOPAD(0x83c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad15.lcd_data16, OUTPUT | MODE1 */
AM33XX_IOPAD(0x838, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad14.lcd_data17, OUTPUT | MODE1 */
AM33XX_IOPAD(0x834, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad13.lcd_data18, OUTPUT | MODE1 */
AM33XX_IOPAD(0x830, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.lcd_data19, OUTPUT | MODE1 */
AM33XX_IOPAD(0x82c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad11.lcd_data20, OUTPUT | MODE1 */
AM33XX_IOPAD(0x828, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad10.lcd_data21, OUTPUT | MODE1 */
AM33XX_IOPAD(0x824, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad9.lcd_data22, OUTPUT | MODE1 */
AM33XX_IOPAD(0x820, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad8.lcd_data23, OUTPUT | MODE1 */
AM33XX_IOPAD(0x8a0, PULL_DISABLE | MUX_MODE7) /* lcd_data0.lcd_data0, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8a4, PULL_DISABLE | MUX_MODE7) /* lcd_data1.lcd_data1, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8a8, PULL_DISABLE | MUX_MODE7) /* lcd_data2.lcd_data2, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8ac, PULL_DISABLE | MUX_MODE7) /* lcd_data3.lcd_data3, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8b0, PULL_DISABLE | MUX_MODE7) /* lcd_data4.lcd_data4, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8b4, PULL_DISABLE | MUX_MODE7) /* lcd_data5.lcd_data5, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8b8, PULL_DISABLE | MUX_MODE7) /* lcd_data6.lcd_data6, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8bc, PULL_DISABLE | MUX_MODE7) /* lcd_data7.lcd_data7, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8c0, PULL_DISABLE | MUX_MODE7) /* lcd_data8.lcd_data8, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8c4, PULL_DISABLE | MUX_MODE7) /* lcd_data9.lcd_data9, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8c8, PULL_DISABLE | MUX_MODE7) /* lcd_data10.lcd_data10, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8cc, PULL_DISABLE | MUX_MODE7) /* lcd_data11.lcd_data11, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8d0, PULL_DISABLE | MUX_MODE7) /* lcd_data12.lcd_data12, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8d4, PULL_DISABLE | MUX_MODE7) /* lcd_data13.lcd_data13, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8d8, PULL_DISABLE | MUX_MODE7) /* lcd_data14.lcd_data14, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8dc, PULL_DISABLE | MUX_MODE7) /* lcd_data15.lcd_data15, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.lcd_hsync, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.lcd_pclk, OUTPUT | MODE0 */
AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */
>;
};
mcasp1_pins: mcasp1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_aclkr.mcasp1_aclkx */
AM33XX_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_fsr.mcasp1_fsx */
AM33XX_IOPAD(0x9a8, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* mcasp0_axr1.mcasp1_axr0 */
AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_ahclkx.mcasp1_axr1 */
>;
};
mcasp1_sleep_pins: mcasp1_sleep_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
spi0_pins: pinmux_spi0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */
AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */
AM33XX_IOPAD(0x958, PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */
AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
AM33XX_IOPAD(0x960, PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_cs1.spi0_cs1 */
>;
};
spi1_pins: pinmux_spi1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x990, PIN_INPUT_PULLUP | MUX_MODE3) /* mcasp0_aclkx.spi1_sclk */
AM33XX_IOPAD(0x994, PIN_INPUT_PULLUP | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */
AM33XX_IOPAD(0x998, PIN_OUTPUT_PULLUP | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */
AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLUP | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */
AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLUP | MUX_MODE4) /* xdma_event_intr0.spi1_cs1 */
>;
};
dcan0_default: dcan0_default_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gmii1_txd3.dcan0_tx */
AM33XX_IOPAD(0x920, PIN_INPUT_PULLUP | MUX_MODE1) /* gmii1_txd2.dcan0_rx */
>;
};
};
&uart0 {
pinctrl-names = "default, sleep";
pinctrl-0 = <&uart0_pins>;
pinctrl-1 = <&uart0_pins_sleep>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <100000>;
tps: tps@24 {
reg = <0x24>;
};
s35390a: s35390a@30 {
compatible = "s35390a";
reg = <0x30>;
};
baseboard_eeprom: baseboard_eeprom@50 {
compatible = "atmel,24c256";
reg = <0x50>;
vcc-supply = <&ldo2_reg>;
};
cape_eeprom0: cape_eeprom@57 {
compatible = "atmel,24c256";
reg = <0x57>;
vcc-supply = <&ldo3_reg>;
};
tlv320aic3106: tlv320aic3106@1f {
compatible = "ti,tlv320aic3106";
reg = <0x1b>;
status = "okay";
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
status = "okay";
clock-frequency = <100000>;
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
status = "okay";
clock-frequency = <100000>;
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
status = "okay";
spidev0: spi@0 {
compatible = "spidev";
reg = <0>;
spi-max-frequency = <16000000>;
spi-cpha;
};
spidev2: spi@1 {
compatible = "spidev";
reg = <1>;
spi-max-frequency = <16000000>;
};
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins>;
status = "okay";
spidev1: spi@0 {
compatible = "spidev";
reg = <0>;
spi-max-frequency = <16000000>;
spi-cpha;
};
spidev3: spi@1 {
compatible = "spidev";
reg = <1>;
spi-max-frequency = <16000000>;
};
};
&lcdc {
status = "okay";
};
&epwmss0 {
status = "okay";
ecap0: pwm@100 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap0_pins>;
pinctrl-1 = <&ecap0_pins_sleep>;
};
};
/include/ "tps65217.dtsi"
&mcasp1 {
pinctrl-names = "default";
pinctrl-0 = <&mcasp1_pins>;
pinctrl-1 = <&mcasp1_sleep_pins>;
status = "okay";
op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>;
/* 4 serializers */
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
1 2 0 0
>;
tx-num-evt = <1>;
rx-num-evt = <1>;
};
&tps {
/*
* Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
* mode") at poweroff. Most BeagleBone versions do not support RTC-only
* mode and risk hardware damage if this mode is entered.
*
* For details, see linux-omap mailing list May 2015 thread
* [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
* In particular, messages:
* http://www.spinics.net/lists/linux-omap/msg118585.html
* http://www.spinics.net/lists/linux-omap/msg118615.html
*
* You can override this later with
* &tps { /delete-property/ ti,pmic-shutdown-controller; }
* if you want to use RTC-only mode and made sure you are not affected
* by the hardware problems. (Tip: double-check by performing a current
* measurement after shutdown: it should be less than 1 mA.)
*/
ti,pmic-shutdown-controller;
pmic {
compatible = "ti,tps65217-pmic";
status = "okay";
};
bl {
compatible = "ti,tps65217-bl";
status = "disabled";
};
regulators {
dcdc1_reg: regulator@0 {
regulator-name = "vdds_dpr";
regulator-always-on;
};
dcdc2_reg: regulator@1 {
/* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */
regulator-name = "vdd_mpu";
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <1351500>;
regulator-boot-on;
regulator-always-on;
};
dcdc3_reg: regulator@2 {
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
regulator-name = "vdd_core";
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
regulator-always-on;
};
ldo1_reg: regulator@3 {
regulator-name = "vio,vrtc,vdds";
regulator-always-on;
};
ldo2_reg: regulator@4 {
regulator-name = "vdd_3v3aux";
regulator-always-on;
};
ldo3_reg: regulator@5 {
regulator-name = "vdd_1v8";
regulator-always-on;
};
ldo4_reg: regulator@6 {
regulator-name = "vdd_3v3a";
regulator-always-on;
};
};
};
&mac {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
dual_emac = <1>;
status = "okay";
};
&davinci_mdio {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-mode = "rmii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
phy-mode = "rmii";
dual_emac_res_vlan = <2>;
};
&usb {
status = "okay";
};
&usb_ctrl_mod {
status = "okay";
};
&usb0_phy {
status = "okay";
};
&usb1_phy {
status = "okay";
};
&usb0 {
status = "okay";
dr_mode = "host";
};
&usb1 {
status = "okay";
dr_mode = "host";
};
&cppi41dma {
status = "okay";
};
&tscadc {
status = "disabled";
tsc {
ti,wires = <4>;
ti,x-plate-resistance = <200>;
ti,coordinate-readouts = <5>;
ti,wire-config = <0x00 0x11 0x22 0x33>;
ti,charge-delay = <0x400>;
};
adc {
ti,adc-channels = <0 1 2 3>;
};
};
&mmc2 {
vmmc-supply = <&vmmcsd_fixed>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_pins>;
bus-width = <8>;
status = "okay";
ti,non-removable;
};
&mmc1 {
vmmc-supply = <&vmmcsd_fixed>;
vqmmc-supply = <&vmmcsd_fixed>;
status = "okay";
bus-width = <0x4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
gpios = <&gpio1 19 1>; /* mmc0 power enable*/
cd-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
wp-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
cd-inverted;
};
&dcan0 {
pinctrl-names = "default";
pinctrl-0 = <&dcan0_default>;
status = "okay";
};
&sham {
status = "okay";
};
&aes {
status = "okay";
};
&gpio0_target {
ti,no-reset-on-init;
};
&wkup_m3_ipc {
ti,scale-data-fw = "am335x-evm-scale-data.bin";
};
Kind regards.
