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Using DMA with I2S module

Hi,

I need to use DMA with I2S, for both reading and writing (stereo). To do this I used 4 channels of DMA0, two channels each for read and write. I used dma in auto reload and with ping-pong buffers, but only the right read channel dma interrupt is enabled, so I assume on each interrupt both channels (left/right) read operations completed and hence the received data is copies to write buffers. But this approach generates a little noise while playing music etc. Is there any fault in my approach? please give suggestions.

Thanking You,

Ras

  • Ras,

    I assume you are using this with an audio codec - taking in music from an external source through line-in and sending it back out to line out. Are you doing any processing on the data or are any other peripherals running that might interfere with access to the data buffers?

    Your DMA-I2S setup seems fine and we have tested a similar setup at our end. You can try increasing the CPU frequency and see if it helps.

    You should have eight buffers in all for ping/pong input and output for left and right channels - please make sure you are copying data to the buffer not currently used by output DMA channel. Also please make sure to do the data copy from input to output buffers outside of the DMA ISR.

    Regards,

    Sunil Kamath

  • Hi,

    On the right channel receive interrupt, it will check the status register to know ping or pong buffer is active, and assumes the same is valid for all other channels, do I need to check all other channels status reg?

    I found another bug in my program. I used a single buffer for both ping and pong (half for each), and sizeof() function is used to configure the dma transfer size. But the "sizeof" doesn't returns size in bytes, instead it returns "no of short" in the buffer, so half of expected value.

    Thanks for your help,

    Ras

  • Hello, have you found a solution for your problem?

    I am also having trouble with DMA channels. It looks like each channel must be running separately. 

    I guess on receive/transmit events, an interrupt must occur and switch channels numbers...

    It's all a bit blurry so far! 

    Any help would be much appreciated

    ps: I post my code below, feel free to give me feedback

    Silvere

     

    5857.DSP MODULES.rar

  • Hi,

    You need 4 channels of a DMA module for both read and write of I2S stereo channel

    Ras

  • hi ,

    here YOU put  some code regarding on  codec(AIC3254),this is working code..please explain..which is the most configurations for master i2s