TDA4VEN-Q1: SPL boot fail

log:

U-Boot SPL 2024.04 (Oct 15 2024 - 10:57:41 +0800)
SYSFW ABI: 4.0 (firmware rev 0x000a '10.0.8--v10.00.08 (Fiery Fox)')
SPL initial stack usage: 17048 bytes

TDA4VEN_SCH_20240806_1_Reviewed 15.pdf

TDA4VEN_SCH_20240806_1_Reviewed 15.pdf

Hi,

A few comments,

• You should leave write DBI enabled.
• The latency values look incorrect for a 1600 MHz clock.
  
  • Settings appear to be set to:
    • Read Latency: 6
    • Write Latency: 4
    • nWR: 6
    • ODTLon: 0
    • ODTLoff: 0
  • Expected values:
    • Read Latency: 28
    • Write Latency: 14
    • nWR: 30
    • ODTLon: 6
    • ODTLoff: 24
• Both CA and DQ ODT of the memory appears to be disabled. These should be enabled.

Regards,
Kevin

Hi, Kevin

I followed your instructions and I re-changed the configuration and it still fails to initialise. ddr configuration is as follows:

7776.all.zip

Best Regards,

Bing

Thanks for the update Bing - glad to hear the issue has been resolved! 

Regards,
Kevin