Tool/software:
Hello，TI
Now I research the code about SPL, found the arch\arm\mach-k3\j721e\clk-data.c can config the board clock resource.
And about program this file have some user guide to add other resources if user want to use resource early before sysfw sci load?
and for example:
CLK_MUX("mcu_clkout_mux_out0", mcu_clkout_mux_out0_parents, 2, 0x40f08010, 0, 1, 0),
how to explain this code? the param about resource name \ parents group \ the address how to get it and set?
Thanks
Hi, Keerthy
Actually, we want to use MCU_MCSPI0 immediately after spl_early_init() in arch/arm/mach-k3/j721e_init.c , is this possible？Where can I use MCU_SPI0 first?
Hi， Keerthy
Here is the diff for using mcu_stpi0 in spl
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index 5d898d3b45..49eb4f8d85 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -13,6 +13,7 @@
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a72_0;
+ spi2 = &mcu_spi0;
};
chosen {
@@ -157,6 +158,16 @@
J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */
>;
};
+
+ mcu_spi0_pins_default: mcu_spi0_pins_default {
+ u-boot,dm-spl;
+ pinctrl-single,pins = <
+ J721E_WKUP_IOPAD(0x90, PIN_OUTPUT, 0) /* (E27) MCU_SPI0_CLK */
+ J721E_WKUP_IOPAD(0x94, PIN_OUTPUT, 0) /* (E24) MCU_SPI0_D0 */
+ J721E_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (E28) MCU_SPI0_D1 */
+ J721E_WKUP_IOPAD(0x9C, PIN_OUTPUT, 0) /* (E25) MCU_SPI0_CS0 */
+ >;
+ };
};
&main_pmx0 {
@@ -476,3 +487,22 @@
&wkup_i2c0 {
/delete-property/ power-domains;
};
+
+&cbass_mcu_wakeup {
+ status = "okay";
+ u-boot,dm-spl;
+ mcu_spi0: spi@40300000 {
+ u-boot,dm-spl;
+ compatible = "ti,omap4-mcspi";
+ reg = <0x00 0x040300000 0x00 0x400>;
+ interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 274 0>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_spi0_pins_default>;
+ ti,pindir-d0-out-d1-in;
+ };
+};
diff --git a/arch/arm/mach-k3/j721e/clk-data.c b/arch/arm/mach-k3/j721e/clk-data.c
index 5540c7af62..1b8a4f6591 100644
--- a/arch/arm/mach-k3/j721e/clk-data.c
+++ b/arch/arm/mach-k3/j721e/clk-data.c
@@ -513,6 +513,7 @@ static const struct clk_data clk_list[] = {
CLK_FIXED_RATE("ddr32ss_16ffc_ew_dv_wrap_main_0_ddrss_io_ck_n", 0, 0),
CLK_FIXED_RATE("emmc8ss_16ffc_main_0_emmcss_io_clk", 0, 0),
CLK_FIXED_RATE("emmcsd4ss_main_0_emmcsdss_io_clk_o", 0, 0),
+ CLK_FIXED_RATE("spi_mcu_0_io_clkspio_clk", 0, 0),
CLK_DIV_DEFFREQ("hsdiv4_16fft_main_1_hsdivout0_clk", "pllfrac2_ssmod_16fft_main_1_foutvcop_clk", 0x681080, 0, 7, 0, 192000000),
CLK_DIV("hsdiv4_16fft_main_1_hsdivout2_clk", "pllfrac2_ssmod_16fft_main_1_foutvcop_clk", 0x681088, 0, 7, 0),
CLK_DIV("hsdiv4_16fft_mcu_1_hsdivout1_clk", "pllfrac2_ssmod_16fft_mcu_1_foutvcop_clk", 0x40d01084, 0, 7, 0),
@@ -771,12 +772,15 @@ static const struct dev_clk soc_dev_clk_data[] = {
DEV_CLK(289, 17, "board_0_hfosc1_clk_out"),
DEV_CLK(289, 18, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
DEV_CLK(289, 19, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
+ DEV_CLK(157, 14, "spi_mcu_0_io_clkspio_clk"),
+ DEV_CLK(274, 0, "k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk"),
+ DEV_CLK(274, 1, "hsdiv4_16fft_mcu_2_hsdivout0_clk"),
};
const struct ti_k3_clk_platdata j721e_clk_platdata = {
.clk_list = clk_list,
- .clk_list_cnt = 156,
+ .clk_list_cnt = 157,
.soc_dev_clk_data = soc_dev_clk_data,
- .soc_dev_clk_data_cnt = 171,
+ .soc_dev_clk_data_cnt = 174,
};
diff --git a/arch/arm/mach-k3/j721e/dev-data.c b/arch/arm/mach-k3/j721e/dev-data.c
index 32a8aed55a..cadf17a6e4 100644
--- a/arch/arm/mach-k3/j721e/dev-data.c
+++ b/arch/arm/mach-k3/j721e/dev-data.c
@@ -61,6 +61,7 @@ static struct ti_dev soc_dev_list[] = {
PSC_DEV(103, &soc_lpsc_list[13]),
PSC_DEV(104, &soc_lpsc_list[14]),
PSC_DEV(102, &soc_lpsc_list[15]),
+ PSC_DEV(274, &soc_lpsc_list[11]),
};
const struct ti_k3_pd_platdata j721e_pd_platdata = {
@@ -71,6 +72,6 @@ const struct ti_k3_pd_platdata j721e_pd_platdata = {
.num_psc = 2,
.num_pd = 5,
.num_lpsc = 16,
- .num_devs = 22,
+ .num_devs = 23,
};
diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c
index ae1fb94dd1..70a261f6a9 100644
--- a/arch/arm/mach-k3/j721e_init.c
+++ b/arch/arm/mach-k3/j721e_init.c
@@ -218,7 +218,17 @@ void board_init_f(ulong dummy)
/* Init DM early */
spl_early_init();
-
+ u32 debug;
+ debug = readl(0x40300000);
+ printf("\n");
+ ret = uclass_find_device_by_seq(UCLASS_SPI, 2, true, &dev);
+ if (ret)
+ panic("failed to find spi2!\n");
+ /*struct udevice *bus;
+ ret = uclass_get_device_by_seq(UCLASS_SPI, 2, &bus);
+ if (ret)
+ panic("failed to get spi2!\n");
+ */
#ifdef CONFIG_K3_LOAD_SYSFW
/*
* Process pinctrl for the serial0 a.k.a. MCU_UART0 module and continue
@@ -259,6 +269,7 @@ void board_init_f(ulong dummy)
/* Prepare console output */
preloader_console_init();
+ printf("xiuqi:0x%x\n", debug);
/* Disable ROM configured firewalls right after loading sysfw */
#ifdef CONFIG_TI_SECURE_DEVICE
diff --git a/configs/pecu_r5_defconfig b/configs/pecu_r5_defconfig
index 5c7fba370c..d45a740b06 100644
--- a/configs/pecu_r5_defconfig
+++ b/configs/pecu_r5_defconfig
@@ -162,3 +162,4 @@ CONFIG_FS_EXT4=y
CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
CONFIG_LIB_RATIONAL=y
CONFIG_SPL_LIB_RATIONAL=y
+CONFIG_OMAP3_SPI=y
I read the register after spl_early_init() and print it after preloader_console_init()，the serial port output is as follows
But once I add uclass_get_device_by_seq after uclass_find_device_by_seq，spl will get stuck and there will no output from serial port
