Other Parts Discussed in Thread: UNIFLASH
Tool/software:
I am attempting to run the Low Power Mode (LPM) Demo from the PDK 10_00_00. I am using a J721E EVM with a DR829.
When running the LPM demo, Linux is unable to boot on the MPU1_0 and fails in an early stage. Here is the output from UART when Linux tries to boot:
NOTICE: BL31: v2.10.0(release):v2.10.0-367-g00f1ec6b87-dirty NOTICE: BL31: Built : 16:09:05, Feb 9 2024 ERROR: Timeout waiting for thread SP_RESPONSE to fill ERROR: Thread SP_RESPONSE verification failed (-60) ERROR: Message receive failed (-60) ERROR: Failed to get response (-60) ERROR: Transfer send failed (-60) ERROR: Timeout waiting for thread SP_RESPONSE to fill ERROR: Thread SP_RESPONSE verification failed (-60) ERROR: Message receive failed (-60) ERROR: Failed to get response (-60) ERROR: Transfer send failed (-60) ERROR: Unable to query firmware capabilities (-60) I/TC: I/TC: OP-TEE version: 4.2.0-dev (gcc version 13.3.0 (GCC)) #1 Fri Apr 12 09:51:21 UTC 2024 aarch64 I/TC: WARNING: This OP-TEE configuration might be insecure! I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html I/TC: Primary CPU initializing I/TC: GIC redistributor base address not provided I/TC: Assuming default GIC group status and modifier E/TC:0 0 k3_sec_proxy_verify_thread:108 Queue is busy E/TC:0 0 k3_sec_proxy_recv:196 Thread SEC_PROXY_RESPONSE_THREAD verification failed. ret = -65523 E/TC:0 0 ti_sci_get_response:101 Message receive failed (-65523) E/TC:0 0 ti_sci_do_xfer:150 Failed to get response (-65523) E/TC:0 0 ti_sci_init:486 Unable to communicate with control firmware (-65523) E/TC:0 0 call_initcalls:43 Initcall __text_start + 0x00070b10 failed E/TC:0 0 k3_sec_proxy_verify_thread:108 Queue is busy E/TC:0 0 k3_sec_proxy_recv:196 Thread SEC_PROXY_RESPONSE_THREAD verification failed. ret = -65523 E/TC:0 0 ti_sci_get_response:101 Message receive failed (-65523) E/TC:0 0 ti_sci_do_xfer:150 Failed to get response (-65523) E/TC:0 0 k3_sec_proxy_verify_thread:108 Queue is busy E/TC:0 0 k3_sec_proxy_recv:196 Thread SEC_PROXY_RESPONSE_THREAD verification failed. ret = -65523 E/TC:0 0 ti_sci_get_response:101 Message receive failed (-65523) E/TC:0 0 ti_sci_do_xfer:150 Failed to get response (-65523) E/TC:0 0 k3_sec_proxy_verify_thread:108 Queue is busy E/TC:0 0 k3_sec_proxy_recv:196 Thread SEC_PROXY_RESPONSE_THREAD verification failed. ret = -65523 E/TC:0 0 ti_sci_get_response:101 Message receive failed (-65523) E/TC:0 0 ti_sci_do_xfer:150 Failed to get response (-65523) E/TC:0 0 tee_otp_get_hw_unique_key:97 Could not get HUK E/TC:0 0 call_initcalls:43 Initcall __text_start + 0x00070b38 failed E/TC:0 0 k3_sec_proxy_verify_thread:108 Queue is busy E/TC:0 0 k3_sec_proxy_recv:196 Thread SEC_PROXY_RESPONSE_THREAD verification failed. ret = -65523 E/TC:0 0 ti_sci_get_response:101 Message receive failed (-65523) E/TC:0 0 ti_sci_do_xfer:150 Failed to get response (-65523) E/TC:0 0 sa2ul_init:61 Failed to get SA2UL device E/TC:0 0 call_initcalls:43 Initcall __text_start + 0x00070b40 failed E/TC:0 0 E/TC:0 0 Core data-abort at address 0x14 (translation fault) E/TC:0 0 esr 0x96000005 ttbr0 0x9e8a2000 ttbr1 0x00000000 cidr 0x0 E/TC:0 0 cpu #0 cpsr 0x600003c4 E/TC:0 0 x0 000000009e875000 x1 0000000000000000 E/TC:0 0 x2 0000000000000000 x3 0000000000000000 E/TC:0 0 x4 0000000000000050 x5 000000009e892d70 E/TC:0 0 x6 ffffffffffffffb0 x7 0000000000010cb0 E/TC:0 0 x8 0000000000010cb0 x9 000000009e892f80 E/TC:0 0 x10 000000009e882070 x11 0000000000000008 E/TC:0 0 x12 0000000000000000 x13 000000009e8a3e60 E/TC:0 0 x14 0000000000000000 x15 0000000000000000 E/TC:0 0 x16 000000009e81cc5c x17 0000000000000000 E/TC:0 0 x18 0000000000000000 x19 000000009e8a41e0 E/TC:0 0 x20 000000009e8a41e8 x21 000000009e875000 E/TC:0 0 x22 000000009e875000 x23 000000009e875f00 E/TC:0 0 x24 000000009e874dc0 x25 0000000000000000 E/TC:0 0 x26 0000000000000000 x27 0000000000000000 E/TC:0 0 x28 0000000000000000 x29 000000009e8a4170 E/TC:0 0 x30 000000009e81741c elr 000000009e81742c E/TC:0 0 sp_el0 000000009e8a4170 E/TC:0 0 TEE load address @ 0x9e800000 E/TC:0 0 Call stack: E/TC:0 0 0x9e81742c E/TC:0 0 0x9e807ca0 E/TC:0 0 0x9e8225fc E/TC:0 0 0x9e807e9c E/TC:0 0 Panic 'unhandled pageable abort' at /usr/src/debug/optee-os/4.2.0+git/core/arch/arm/kernel/abort.c:582 <abort_> E/TC:0 0 TEE load address @ 0x9e800000 E/TC:0 0 Call stack: E/TC:0 0 0x9e80817c E/TC:0 0 0x9e81f0c0 E/TC:0 0 0x9e807884 E/TC:0 0 0x9e804a68
On the MCU1_0, everything runs perfectly. There are no errors and I measured the test points to confirm that as the MCU proceeds through the demo it is properly turning the MAIN domain on and off. Here is the output from MCU1_0:
MCU R5F App started at 33002 usecs PMIC initialization done. IPC_echo_test (core : mcu1_0) ..... Waiting for Linux VDev ready... Calling Sciclient_procBootRequestProcessor, ProcId 0x6... Calling Sciclient_procBootRequestProcessor, ProcId 0x7... Loading BootImage BootImage completed, status = 0 Sciclient_procBootReleaseProcessor, ProcId 0x6... Sciclient_procBootReleaseProcessor, ProcId 0x7... Sleeping for 10 seconds after each stage MCU2_0 booted MCU2_1 booted Calling Sciclient_procBootRequestProcessor, ProcId 0x8... Calling Sciclient_procBootRequestProcessor, ProcId 0x9... Calling Sciclient_procBootRequestProcessor, ProcId 0x3... Calling Sciclient_procBootRequestProcessor, ProcId 0x4... Calling Sciclient_procBootRequestProcessor, ProcId 0x30... Loading BootImage BootImage completed, status = 0 Sciclient_procBootReleaseProcessor, ProcId 0x8... Sciclient_procBootReleaseProcessor, ProcId 0x9... Sciclient_procBootReleaseProcessor, ProcId 0x3... Sciclient_procBootReleaseProcessor, ProcId 0x4... Sciclient_procBootReleaseProcessor, ProcId 0x30... C7X_0 booted Sleeping for 10 seconds after each stage MCU3_0 booted MCU3_1 booted Calling Sciclient_procBootRequestProcessor, ProcId 0x20... Loading BootImage BootImage completed, status = 0 Sciclient_procBootReleaseProcessor, ProcId 0x20... Sleeping for 20 seconds after the last stage Boot App: Started at 2335180 usec Boot App: Total Num booted cores = 8 Boot App: Booted Core ID #10 at 3646001 usecs Boot App: Booted Core ID #11 at 4646000 usecs Boot App: Booted Core ID #12 at 16345000 usecs Boot App: Booted Core ID #13 at 17345000 usecs Boot App: Booted Core ID #16 at 18345001 usecs Boot App: Booted Core ID #17 at 19345001 usecs Boot App: Booted Core ID #18 at 20345001 usecs Boot App: Booted Core ID #0 at 35901000 usecs Exiting rpmsg_vdevMonitorFxn! MCU only app: Inside MCU ONLY task! MCU only app: Disabling MAXT_OUTRG_EN for TMPSENS1:4 in MAIN domain! MCU only app: STATE INFO :: CURRENTLY IN ACTIVE MODE! MCU only app: LED LD5 should be ON MCU only app: Please measure TP133 and TP134! MCU only app: Expected values in ACTIVE mode: TP133: HIGH TP134: HIGH MCU only app: Kindly unload Remoteproc modules from Linux. Type these commands : modprobe -r ti_k3_r5_remoteproc modprobe -r ti_k3_dsp_remoteproc MCU only app: After modules have been removed, press 1 and enter
I am simply trying to get the demo to work in a default state and I have not modified anything (except for the necessary devicetree changes outlined in the documentation). Here are the steps I took while following these insutrctions.
- I modified the k3-j721e-common-proc-board.dts file in the Linux SDK and did a full yocto build. Then, I flashed the SD card and put it in the EVM. At this point, I checked that the device still booted as normal when in SD card mode.
- I located the 11 binaries needed for flashing the OSPI.
- uart_j721e_evm_flash_programmer_release.tiimage
C:\ti\uniflash_8.8.0\processors\FlashWriter\j721e_evm\uart_j721e_evm_flash_programmer_release.tiimage
- found in the uniflash installation path. I am using version 8.8.
- sbl_cust_img_mcu1_0_release.tiimage
- ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/boot/sbl/binary/j721e_evm/cust/bin/sbl_cust_img_mcu1_0_release.tiimage
- found after running make all for J721E_EVM and MCU1_0
- tifs.bin
- ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/drv/sciclient/soc/V1/tifs.bin
- I found this prebuilt. I don't know how to rebuild it or if I should.
- lpm_example_freertos_mcu1_0_release.appimage
- ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/binary/lpm_example_freertos/bin/j721e_evm/lpm_example_freertos_mcu1_0_release.appimage
- built by running the make command from the LPM documentation: make lpm_example_freertos BOARD=j721e_evm CORE=mcu1_0 -sj8 BUILD_PROFILE=release
- multicore_MCU2_0_MCU2_1_stage1.appimage
- ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/boot/sbl/example/boot_app/multicore_images/j721e_evm/multicore_MCU2_0_MCU2_1_stage1.appimage
- found pre-built
- I would like to know if this is supposed to be rebuilt for this demo
- multicore_DSPs_MCU3_0_MCU3_1_stage2.appimage
- ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/boot/sbl/example/boot_app/multicore_images/j721e_evm/multicore_DSPs_MCU3_0_MCU3_1_stage2.appimage
- found pre-built
- I would like to know if this is supposed to be rebuilt for this demo
- multicore_MPU1_0_stage3.appimage
- ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/boot/sbl/example/boot_app/multicore_images/j721e_evm/multicore_MPU1_0_stage3.appimage
- found pre-built
- I would like to know if this is supposed to be rebuilt for this demo
- atf_optee.appimage
- ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/boot/sbl/tools/BootApp_binaries/linux/j721e_evm/atf_optee.appimage
- found pre-built
- I would like to know if this is supposed to be rebuilt for this demo
- tikernelimage_linux.appimage
- ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/boot/sbl/tools/BootApp_binaries/linux/j721e_evm/tikernelimage_linux.appimage
- found pre-built
- I would like to know if this is supposed to be rebuilt for this demo
- tidtb_linux.appimage
- ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/boot/sbl/tools/BootApp_binaries/linux/j721e_evm/tidtb_linux.appimage
- found pre-built
- I would like to know if this is supposed to be rebuilt for this demo
- nor_spi_patterns.bin
- ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/board/src/flash/nor/ospi/nor_spi_patterns.bin
- found pre-built
- uart_j721e_evm_flash_programmer_release.tiimage
- I put in the EVM into UART boot mode, found the COM port with the 'C' character being printed out, and flashed each binary to the instructed offset. There were no error messages.
- I switched to OSPI boot mode and power cycled the board. At this point I saw the successful UART output from MCU1_0 followed by the failed Linux boot over the MAIN UART.