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Using Boundary Scan



I am developing a production test solution for a PCB that contains a TMS320C6457CCMHA2 DSP using boundary scan.

My question is what voltage are the boundary scan I/O cells at ? (3.3V,1.8V)

I am having difficulty testing a ddr2 sdram device that is directly connected to the DSP.

The DSP never sees a '1' coming back from the sdram. The sdram is powered at 1.8V and I am thinking that if the boundary scan cells are at 3.3V then it would never see a '1'.

Can anyone help ?

  • The DDR2 is a 1.8V interface.  The only 3.3V interfaces are HPI, EMIFA, and UTOPIA.  This is documented in Table 6-4 "Power Supply to Peripheral I/O Mapping" of the data sheet.

    Is boundary scan for the rest of the chip working?  I don't know of anything different with respect to the DDR2.

  • Yes the rest of the boundary scan test is working OK. I have an interconnect test that interacts with other boundary scan devices on the board.

    I am concerned that although the DDR2 interface is 1.8V maybe the boundary scan cells are at 3.3V.

    I don't know and cannot find any information to confirm or deny this theory.

  • My new board of C6457 just passed DDR2 test (500MHz), nothing special for JTAG. You should follow the steps in DDR2 design guid to check your DDR2 register setting, PCB layout etc.