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AM35x Power down sequence clarification 2

Dear Sir,

I found detail description of  "simultaneously option" of AM35x power down sequence.
http://e2e.ti.com/support/dsp/sitara_arm174_microprocessors/f/416/p/117673/418038.aspx#418038
But I still do not clear about 2V differences between 1.8V and 3.3V. If we look at another option,

(a) Power off all complex I/O domains
(b) Power off core domain (VDD_CORE)
(c) Power off all PLL domains (VDDS_DPLL_MPU_USBHOST and VDDS_DPLL_PER_CORE)
(d) Power off all SRAM LDOs
(e) Power off all standard I/O domains (VDDS and VDDSHV)

(a) include 1.8V and 3.3V. (e) also include 1.8V and 3.3V.
Therefore I recognize regarding to 2V differences restriction is related between only within the "Complex I/O domains" and also within only "Standard I/O domains". Is my understanding correct? Because I can not control 1.8V of (a) and 3.3V of (e).

This mean the 1.8V transistors are sitting only between 1.8V and 3.3V of "complex I/O domain" and are sitting only between VDDS(1.8V) and VDDSHV(3.3V).

Regards,
Takeshi